OvmfPkg: AcpiTimerLib: Access power mgmt regs based on host bridge type

[mirror_edk2.git] / OvmfPkg / Library / AcpiTimerLib / AcpiTimerLib.c

/** @file\r
  ACPI Timer implements one instance of Timer Library.\r
\r
  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>\r
  Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>\r
\r
  This program and the accompanying materials are\r
  licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <Base.h>\r
#include <Library/TimerLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/PciLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PcdLib.h>\r
#include <IndustryStandard/Pci22.h>\r
#include <IndustryStandard/Acpi.h>\r
\r
//\r
// PCI Location of PIIX4 Power Management PCI Configuration Registers\r
//\r
#define PIIX4_POWER_MANAGEMENT_BUS       0x00\r
#define PIIX4_POWER_MANAGEMENT_DEVICE    0x01\r
#define PIIX4_POWER_MANAGEMENT_FUNCTION  0x03\r
\r
//\r
// Macro to access PIIX4 Power Management PCI Configuration Registers\r
//\r
#define PIIX4_PCI_POWER_MANAGEMENT_REGISTER(Register) \\r
  PCI_LIB_ADDRESS (                                   \\r
    PIIX4_POWER_MANAGEMENT_BUS,                       \\r
    PIIX4_POWER_MANAGEMENT_DEVICE,                    \\r
    PIIX4_POWER_MANAGEMENT_FUNCTION,                  \\r
    Register                                          \\r
    )\r
\r
//\r
// PCI Location of Q35 Power Management PCI Configuration Registers\r
//\r
#define Q35_POWER_MANAGEMENT_BUS       0x00\r
#define Q35_POWER_MANAGEMENT_DEVICE    0x1f\r
#define Q35_POWER_MANAGEMENT_FUNCTION  0x00\r
\r
//\r
// Macro to access Q35 Power Management PCI Configuration Registers\r
//\r
#define Q35_PCI_POWER_MANAGEMENT_REGISTER(Register) \\r
  PCI_LIB_ADDRESS (                                 \\r
    Q35_POWER_MANAGEMENT_BUS,                       \\r
    Q35_POWER_MANAGEMENT_DEVICE,                    \\r
    Q35_POWER_MANAGEMENT_FUNCTION,                  \\r
    Register                                        \\r
    )\r
\r
//\r
// PCI Location of Host Bridge PCI Configuration Registers\r
//\r
#define HOST_BRIDGE_BUS       0x00\r
#define HOST_BRIDGE_DEVICE    0x00\r
#define HOST_BRIDGE_FUNCTION  0x00\r
\r
//\r
// Macro to access Host Bridge Configuration Registers\r
//\r
#define HOST_BRIDGE_REGISTER(Register) \\r
  PCI_LIB_ADDRESS (                    \\r
    HOST_BRIDGE_BUS,                   \\r
    HOST_BRIDGE_DEVICE,                \\r
    HOST_BRIDGE_FUNCTION,              \\r
    Register                           \\r
    )\r
\r
//\r
// Host Bridge Device ID (DID) Register\r
//\r
#define HOST_BRIDGE_DID  HOST_BRIDGE_REGISTER (0x02)\r
\r
//\r
// Host Bridge DID Register values\r
//\r
#define PCI_DEVICE_ID_INTEL_82441    0x1237  // DID value for PIIX4\r
#define PCI_DEVICE_ID_INTEL_Q35_MCH  0x29C0  // DID value for Q35\r
\r
//\r
// Access Power Management PCI Config Regs based on Host Bridge type\r
//\r
#define PCI_POWER_MANAGEMENT_REGISTER(Register)                   \\r
  ((PciRead16 (HOST_BRIDGE_DID) == PCI_DEVICE_ID_INTEL_Q35_MCH) ? \\r
    Q35_PCI_POWER_MANAGEMENT_REGISTER (Register) :                \\r
    PIIX4_PCI_POWER_MANAGEMENT_REGISTER (Register))\r
\r
//\r
// Power Management PCI Configuration Registers\r
//\r
#define PMBA                PCI_POWER_MANAGEMENT_REGISTER (0x40)\r
#define   PMBA_RTE          BIT0\r
#define PMREGMISC           PCI_POWER_MANAGEMENT_REGISTER (0x80)\r
#define   PMIOSE            BIT0\r
\r
//\r
// The ACPI Time is a 24-bit counter\r
//\r
#define ACPI_TIMER_COUNT_SIZE  BIT24\r
\r
//\r
// Offset in the Power Management Base Address to the ACPI Timer\r
//\r
#define ACPI_TIMER_OFFSET      0x8\r
\r
/**\r
  The constructor function enables ACPI IO space.\r
\r
  If ACPI I/O space not enabled, this function will enable it.\r
  It will always return RETURN_SUCCESS.\r
\r
  @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.\r
\r
**/\r
RETURN_STATUS\r
EFIAPI\r
AcpiTimerLibConstructor (\r
  VOID\r
  )\r
{\r
  //\r
  // Check to see if the Power Management Base Address is already enabled\r
  //\r
  if ((PciRead8 (PMREGMISC) & PMIOSE) == 0) {\r
    //\r
    // If the Power Management Base Address is not programmed,\r
    // then program the Power Management Base Address from a PCD.\r
    //\r
    PciAndThenOr32 (PMBA, (UINT32)(~0x0000FFC0), PcdGet16 (PcdAcpiPmBaseAddress));\r
\r
    //\r
    // Enable PMBA I/O port decodes in PMREGMISC\r
    //\r
    PciOr8 (PMREGMISC, PMIOSE);\r
  }\r
  \r
  return RETURN_SUCCESS;\r
}\r
\r
/**\r
  Internal function to read the current tick counter of ACPI.\r
\r
  Internal function to read the current tick counter of ACPI.\r
\r
  @return The tick counter read.\r
\r
**/\r
UINT32\r
InternalAcpiGetTimerTick (\r
  VOID\r
  )\r
{\r
  //\r
  //   Read PMBA to read and return the current ACPI timer value.\r
  //\r
  return IoRead32 ((PciRead32 (PMBA) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of ticks.\r
\r
  Stalls the CPU for at least the given number of ticks. It's invoked by\r
  MicroSecondDelay() and NanoSecondDelay().\r
\r
  @param  Delay     A period of time to delay in ticks.\r
\r
**/\r
VOID\r
InternalAcpiDelay (\r
  IN      UINT32                    Delay\r
  )\r
{\r
  UINT32                            Ticks;\r
  UINT32                            Times;\r
\r
  Times    = Delay >> 22;\r
  Delay   &= BIT22 - 1;\r
  do {\r
    //\r
    // The target timer count is calculated here\r
    //\r
    Ticks    = InternalAcpiGetTimerTick () + Delay;\r
    Delay    = BIT22;\r
    //\r
    // Wait until time out\r
    // Delay >= 2^23 could not be handled by this function\r
    // Timer wrap-arounds are handled correctly by this function\r
    //\r
    while (((Ticks - InternalAcpiGetTimerTick ()) & BIT23) == 0) {\r
      CpuPause ();\r
    }\r
  } while (Times-- > 0);\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of microseconds.\r
\r
  Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
\r
  @param  MicroSeconds  The minimum number of microseconds to delay.\r
\r
  @return MicroSeconds\r
\r
**/\r
UINTN\r
EFIAPI\r
MicroSecondDelay (\r
  IN      UINTN                     MicroSeconds\r
  )\r
{\r
  InternalAcpiDelay (\r
    (UINT32)DivU64x32 (\r
              MultU64x32 (\r
                MicroSeconds,\r
                ACPI_TIMER_FREQUENCY\r
                ),\r
              1000000u\r
              )\r
    );\r
  return MicroSeconds;\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of nanoseconds.\r
\r
  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
\r
  @param  NanoSeconds The minimum number of nanoseconds to delay.\r
\r
  @return NanoSeconds\r
\r
**/\r
UINTN\r
EFIAPI\r
NanoSecondDelay (\r
  IN      UINTN                     NanoSeconds\r
  )\r
{\r
  InternalAcpiDelay (\r
    (UINT32)DivU64x32 (\r
              MultU64x32 (\r
                NanoSeconds,\r
                ACPI_TIMER_FREQUENCY\r
                ),\r
              1000000000u\r
              )\r
    );\r
  return NanoSeconds;\r
}\r
\r
/**\r
  Retrieves the current value of a 64-bit free running performance counter.\r
\r
  Retrieves the current value of a 64-bit free running performance counter. The\r
  counter can either count up by 1 or count down by 1. If the physical\r
  performance counter counts by a larger increment, then the counter values\r
  must be translated. The properties of the counter can be retrieved from\r
  GetPerformanceCounterProperties().\r
\r
  @return The current value of the free running performance counter.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounter (\r
  VOID\r
  )\r
{\r
  return (UINT64)InternalAcpiGetTimerTick ();\r
}\r
\r
/**\r
  Retrieves the 64-bit frequency in Hz and the range of performance counter\r
  values.\r
\r
  If StartValue is not NULL, then the value that the performance counter starts\r
  with immediately after is it rolls over is returned in StartValue. If\r
  EndValue is not NULL, then the value that the performance counter end with\r
  immediately before it rolls over is returned in EndValue. The 64-bit\r
  frequency of the performance counter in Hz is always returned. If StartValue\r
  is less than EndValue, then the performance counter counts up. If StartValue\r
  is greater than EndValue, then the performance counter counts down. For\r
  example, a 64-bit free running counter that counts up would have a StartValue\r
  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
\r
  @param  StartValue  The value the performance counter starts with when it\r
                      rolls over.\r
  @param  EndValue    The value that the performance counter ends with before\r
                      it rolls over.\r
\r
  @return The frequency in Hz.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounterProperties (\r
  OUT      UINT64                    *StartValue,  OPTIONAL\r
  OUT      UINT64                    *EndValue     OPTIONAL\r
  )\r
{\r
  if (StartValue != NULL) {\r
    *StartValue = 0;\r
  }\r
\r
  if (EndValue != NULL) {\r
    *EndValue = ACPI_TIMER_COUNT_SIZE - 1;\r
  }\r
\r
  return ACPI_TIMER_FREQUENCY;\r
}\r
\r
/**\r
  Converts elapsed ticks of performance counter to time in nanoseconds.\r
\r
  This function converts the elapsed ticks of running performance counter to\r
  time value in unit of nanoseconds.\r
\r
  @param  Ticks     The number of elapsed ticks of running performance counter.\r
\r
  @return The elapsed time in nanoseconds.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetTimeInNanoSecond (\r
  IN      UINT64                     Ticks\r
  )\r
{\r
  UINT64  NanoSeconds;\r
  UINT32  Remainder;\r
\r
  //\r
  //          Ticks\r
  // Time = --------- x 1,000,000,000\r
  //        Frequency\r
  //\r
  NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, ACPI_TIMER_FREQUENCY, &Remainder), 1000000000u);\r
\r
  //\r
  // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)\r
  // will not overflow 64-bit.\r
  //\r
  NanoSeconds += DivU64x32 (MultU64x32 ((UINT64) Remainder, 1000000000u), ACPI_TIMER_FREQUENCY);\r
\r
  return NanoSeconds;\r
}\r