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[mirror_edk2.git] / OvmfPkg / Library / AcpiTimerLib / BaseAcpiTimerLib.c
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1/** @file\r
2 Provide constructor and GetTick for Base instance of ACPI Timer Library\r
3\r
4 Copyright (C) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r
5\r
b26f0cf9 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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7**/\r
8\r
9#include <Library/DebugLib.h>\r
10#include <Library/IoLib.h>\r
11#include <Library/PciLib.h>\r
12#include <OvmfPlatforms.h>\r
13\r
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14//\r
15// Cached ACPI Timer IO Address\r
16//\r
ac0a286f 17STATIC UINT32 mAcpiTimerIoAddr;\r
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18\r
19/**\r
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20 The constructor function caches the ACPI tick counter address, and,\r
21 if necessary, enables ACPI IO space.\r
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22\r
23 @retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.\r
24\r
25**/\r
26RETURN_STATUS\r
27EFIAPI\r
28AcpiTimerLibConstructor (\r
29 VOID\r
30 )\r
31{\r
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32 UINT16 HostBridgeDevId;\r
33 UINTN Pmba;\r
34 UINT32 PmbaAndVal;\r
35 UINT32 PmbaOrVal;\r
36 UINTN AcpiCtlReg;\r
37 UINT8 AcpiEnBit;\r
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38\r
39 //\r
40 // Query Host Bridge DID to determine platform type\r
41 //\r
42 HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
43 switch (HostBridgeDevId) {\r
44 case INTEL_82441_DEVICE_ID:\r
da372167 45 Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);\r
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46 PmbaAndVal = ~(UINT32)PIIX4_PMBA_MASK;\r
47 PmbaOrVal = PIIX4_PMBA_VALUE;\r
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48 AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);\r
49 AcpiEnBit = PIIX4_PMREGMISC_PMIOSE;\r
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50 break;\r
51 case INTEL_Q35_MCH_DEVICE_ID:\r
bc9d05d6 52 Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);\r
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53 PmbaAndVal = ~(UINT32)ICH9_PMBASE_MASK;\r
54 PmbaOrVal = ICH9_PMBASE_VALUE;\r
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55 AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);\r
56 AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;\r
170ef2d9 57 break;\r
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58 case CLOUDHV_DEVICE_ID:\r
59 mAcpiTimerIoAddr = CLOUDHV_ACPI_TIMER_IO_ADDRESS;\r
60 return RETURN_SUCCESS;\r
170ef2d9 61 default:\r
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62 DEBUG ((\r
63 DEBUG_ERROR,\r
64 "%a: Unknown Host Bridge Device ID: 0x%04x\n",\r
65 __FUNCTION__,\r
66 HostBridgeDevId\r
67 ));\r
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68 ASSERT (FALSE);\r
69 return RETURN_UNSUPPORTED;\r
70 }\r
71\r
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72 //\r
73 // Check to see if the Power Management Base Address is already enabled\r
74 //\r
e2ab3f81 75 if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {\r
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76 //\r
77 // If the Power Management Base Address is not programmed,\r
b2f4da39 78 // then program it now.\r
f122712b 79 //\r
1466b76f 80 PciAndThenOr32 (Pmba, PmbaAndVal, PmbaOrVal);\r
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81\r
82 //\r
e2ab3f81 83 // Enable PMBA I/O port decodes\r
f122712b 84 //\r
e2ab3f81 85 PciOr8 (AcpiCtlReg, AcpiEnBit);\r
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86 }\r
87\r
ac759060 88 mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;\r
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89 return RETURN_SUCCESS;\r
90}\r
91\r
92/**\r
93 Internal function to read the current tick counter of ACPI.\r
94\r
95 Read the current ACPI tick counter using the counter address cached\r
96 by this instance's constructor.\r
97\r
98 @return The tick counter read.\r
99\r
100**/\r
101UINT32\r
102InternalAcpiGetTimerTick (\r
103 VOID\r
104 )\r
105{\r
106 //\r
107 // Return the current ACPI timer value.\r
108 //\r
109 return IoRead32 (mAcpiTimerIoAddr);\r
110}\r