projects / mirror_edk2.git / blame
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|---|---|---|
| a1f22614 BS |
1 | /** @file\r |
| 2 | \r | |
| 3 | Secure Encrypted Virtualization (SEV) library helper function\r | |
| 4 | \r | |
| 5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r | |
| 6 | \r | |
| b26f0cf9 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| a1f22614 BS |
8 | \r |
| 9 | **/\r | |
| 10 | \r | |
| 11 | #include <Library/BaseLib.h>\r | |
| 12 | #include <Library/DebugLib.h>\r | |
| bd13ecf3 | 13 | #include <Library/MemEncryptSevLib.h>\r |
| a1f22614 BS |
14 | #include <Register/Amd/Cpuid.h>\r |
| 15 | #include <Register/Amd/Msr.h>\r | |
| bd13ecf3 | 16 | #include <Register/Cpuid.h>\r |
| a1f22614 BS |
17 | \r |
| 18 | /**\r | |
| 5b5028e6 LE |
19 | This function clears memory encryption bit for the memory region specified by\r |
| 20 | BaseAddress and NumPages from the current page table context.\r | |
| a1f22614 | 21 | \r |
| 5b5028e6 LE |
22 | @param[in] Cr3BaseAddress Cr3 Base Address (if zero then use\r |
| 23 | current CR3)\r | |
| 24 | @param[in] BaseAddress The physical address that is the start\r | |
| 25 | address of a memory region.\r | |
| 26 | @param[in] NumPages The number of pages from start memory\r | |
| 27 | region.\r | |
| 28 | @param[in] Flush Flush the caches before clearing the bit\r | |
| 29 | (mostly TRUE except MMIO addresses)\r | |
| a1f22614 | 30 | \r |
| 5b5028e6 LE |
31 | @retval RETURN_SUCCESS The attributes were cleared for the\r |
| 32 | memory region.\r | |
| 33 | @retval RETURN_INVALID_PARAMETER Number of pages is zero.\r | |
| 34 | @retval RETURN_UNSUPPORTED Clearing the memory encryption attribute\r | |
| 35 | is not supported\r | |
| 36 | **/\r | |
| a1f22614 BS |
37 | RETURN_STATUS\r |
| 38 | EFIAPI\r | |
| 39 | MemEncryptSevClearPageEncMask (\r | |
| 40 | IN PHYSICAL_ADDRESS Cr3BaseAddress,\r | |
| 41 | IN PHYSICAL_ADDRESS BaseAddress,\r | |
| 5b5028e6 | 42 | IN UINTN NumPages,\r |
| a1f22614 BS |
43 | IN BOOLEAN Flush\r |
| 44 | )\r | |
| 45 | {\r | |
| 46 | //\r | |
| 47 | // Memory encryption bit is not accessible in 32-bit mode\r | |
| 48 | //\r | |
| 49 | return RETURN_UNSUPPORTED;\r | |
| 50 | }\r | |
| 51 | \r | |
| 52 | /**\r | |
| 53 | This function sets memory encryption bit for the memory region specified by\r | |
| 154dcd6c | 54 | BaseAddress and NumPages from the current page table context.\r |
| a1f22614 | 55 | \r |
| 154dcd6c LE |
56 | @param[in] Cr3BaseAddress Cr3 Base Address (if zero then use\r |
| 57 | current CR3)\r | |
| 58 | @param[in] BaseAddress The physical address that is the start\r | |
| 59 | address of a memory region.\r | |
| 60 | @param[in] NumPages The number of pages from start memory\r | |
| 61 | region.\r | |
| 62 | @param[in] Flush Flush the caches before setting the bit\r | |
| 63 | (mostly TRUE except MMIO addresses)\r | |
| a1f22614 | 64 | \r |
| 154dcd6c LE |
65 | @retval RETURN_SUCCESS The attributes were set for the memory\r |
| 66 | region.\r | |
| 67 | @retval RETURN_INVALID_PARAMETER Number of pages is zero.\r | |
| 68 | @retval RETURN_UNSUPPORTED Setting the memory encryption attribute\r | |
| 69 | is not supported\r | |
| 70 | **/\r | |
| a1f22614 BS |
71 | RETURN_STATUS\r |
| 72 | EFIAPI\r | |
| 73 | MemEncryptSevSetPageEncMask (\r | |
| 74 | IN PHYSICAL_ADDRESS Cr3BaseAddress,\r | |
| 75 | IN PHYSICAL_ADDRESS BaseAddress,\r | |
| 154dcd6c | 76 | IN UINTN NumPages,\r |
| a1f22614 BS |
77 | IN BOOLEAN Flush\r |
| 78 | )\r | |
| 79 | {\r | |
| 80 | //\r | |
| 81 | // Memory encryption bit is not accessible in 32-bit mode\r | |
| 82 | //\r | |
| 83 | return RETURN_UNSUPPORTED;\r | |
| 84 | }\r |