OvmfPkg: Implement MeasureHobList/MeasureFvImage

[mirror_edk2.git] / OvmfPkg / Library / PeilessStartupLib / PeilessStartup.c

/** @file\r
\r
  Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <PiPei.h>\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/DebugLib.h>\r
#include <Protocol/DebugSupport.h>\r
#include <Library/TdxLib.h>\r
#include <IndustryStandard/Tdx.h>\r
#include <Library/PrePiLib.h>\r
#include <Library/PeilessStartupLib.h>\r
#include <Library/PlatformInitLib.h>\r
#include <ConfidentialComputingGuestAttr.h>\r
#include <Guid/MemoryTypeInformation.h>\r
#include <OvmfPlatforms.h>\r
#include "PeilessStartupInternal.h"\r
\r
#define GET_GPAW_INIT_STATE(INFO)  ((UINT8) ((INFO) & 0x3f))\r
\r
EFI_MEMORY_TYPE_INFORMATION  mDefaultMemoryTypeInformation[] = {\r
  { EfiACPIMemoryNVS,       0x004 },\r
  { EfiACPIReclaimMemory,   0x008 },\r
  { EfiReservedMemoryType,  0x004 },\r
  { EfiRuntimeServicesData, 0x024 },\r
  { EfiRuntimeServicesCode, 0x030 },\r
  { EfiBootServicesCode,    0x180 },\r
  { EfiBootServicesData,    0xF00 },\r
  { EfiMaxMemoryType,       0x000 }\r
};\r
\r
EFI_STATUS\r
EFIAPI\r
InitializePlatform (\r
  EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  )\r
{\r
  UINT32  LowerMemorySize;\r
\r
  DEBUG ((DEBUG_INFO, "InitializePlatform in Pei-less boot\n"));\r
  PlatformDebugDumpCmos ();\r
\r
  PlatformInfoHob->DefaultMaxCpuNumber = 64;\r
  PlatformInfoHob->PcdPciMmio64Size    = 0x800000000;\r
\r
  PlatformInfoHob->HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
  DEBUG ((DEBUG_INFO, "HostBridgeDeviceId = 0x%x\n", PlatformInfoHob->HostBridgeDevId));\r
\r
  PlatformAddressWidthInitialization (PlatformInfoHob);\r
  DEBUG ((\r
    DEBUG_INFO,\r
    "PhysMemAddressWidth=0x%x, Pci64Base=0x%llx, Pci64Size=0x%llx\n",\r
    PlatformInfoHob->PhysMemAddressWidth,\r
    PlatformInfoHob->PcdPciMmio64Base,\r
    PlatformInfoHob->PcdPciMmio64Size\r
    ));\r
\r
  PlatformMaxCpuCountInitialization (PlatformInfoHob);\r
  DEBUG ((\r
    DEBUG_INFO,\r
    "MaxCpuCount=%d, BootCpuCount=%d\n",\r
    PlatformInfoHob->PcdCpuMaxLogicalProcessorNumber,\r
    PlatformInfoHob->PcdCpuBootLogicalProcessorNumber\r
    ));\r
\r
  LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
  PlatformQemuUc32BaseInitialization (PlatformInfoHob);\r
  DEBUG ((\r
    DEBUG_INFO,\r
    "Uc32Base = 0x%x, Uc32Size = 0x%x, LowerMemorySize = 0x%x\n",\r
    PlatformInfoHob->Uc32Base,\r
    PlatformInfoHob->Uc32Size,\r
    LowerMemorySize\r
    ));\r
\r
  if (TdIsEnabled ()) {\r
    PlatformTdxPublishRamRegions ();\r
  } else {\r
    PlatformQemuInitializeRam (PlatformInfoHob);\r
    PlatformQemuInitializeRamForS3 (PlatformInfoHob);\r
  }\r
\r
  //\r
  // Create Memory Type Information HOB\r
  //\r
  BuildGuidDataHob (\r
    &gEfiMemoryTypeInformationGuid,\r
    mDefaultMemoryTypeInformation,\r
    sizeof (mDefaultMemoryTypeInformation)\r
    );\r
\r
  PlatformMemMapInitialization (PlatformInfoHob);\r
\r
  PlatformNoexecDxeInitialization (PlatformInfoHob);\r
\r
  if (TdIsEnabled ()) {\r
    PlatformInfoHob->PcdConfidentialComputingGuestAttr = CCAttrIntelTdx;\r
    PlatformInfoHob->PcdTdxSharedBitMask               = TdSharedPageMask ();\r
    PlatformInfoHob->PcdSetNxForStack                  = TRUE;\r
  }\r
\r
  PlatformMiscInitialization (PlatformInfoHob);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
 * This function brings up the Tdx guest from SEC phase to DXE phase.\r
 * PEI phase is skipped because most of the components in PEI phase\r
 * is not needed for Tdx guest, for example, MP Services, TPM etc.\r
 * In this way, the attack surfaces are reduced as much as possible.\r
 *\r
 * @param Context   The pointer to the SecCoreData\r
 * @return VOID     This function never returns\r
 */\r
VOID\r
EFIAPI\r
PeilessStartup (\r
  IN VOID  *Context\r
  )\r
{\r
  EFI_SEC_PEI_HAND_OFF        *SecCoreData;\r
  EFI_FIRMWARE_VOLUME_HEADER  *BootFv;\r
  EFI_STATUS                  Status;\r
  EFI_HOB_PLATFORM_INFO       PlatformInfoHob;\r
  UINT32                      DxeCodeBase;\r
  UINT32                      DxeCodeSize;\r
  TD_RETURN_DATA              TdReturnData;\r
  VOID                        *VmmHobList;\r
  UINT8                       *CfvBase;\r
\r
  Status      = EFI_SUCCESS;\r
  BootFv      = NULL;\r
  VmmHobList  = NULL;\r
  SecCoreData = (EFI_SEC_PEI_HAND_OFF *)Context;\r
  CfvBase     = (UINT8 *)(UINTN)FixedPcdGet32 (PcdCfvBase);\r
\r
  ZeroMem (&PlatformInfoHob, sizeof (PlatformInfoHob));\r
\r
  if (TdIsEnabled ()) {\r
    VmmHobList = (VOID *)(UINTN)FixedPcdGet32 (PcdOvmfSecGhcbBase);\r
    Status     = TdCall (TDCALL_TDINFO, 0, 0, 0, &TdReturnData);\r
    ASSERT (Status == EFI_SUCCESS);\r
\r
    DEBUG ((\r
      DEBUG_INFO,\r
      "Tdx started with(Hob: 0x%x, Gpaw: 0x%x, Cpus: %d)\n",\r
      (UINT32)(UINTN)VmmHobList,\r
      GET_GPAW_INIT_STATE (TdReturnData.TdInfo.Gpaw),\r
      TdReturnData.TdInfo.NumVcpus\r
      ));\r
\r
    Status = ConstructFwHobList (VmmHobList);\r
  } else {\r
    DEBUG ((DEBUG_INFO, "Ovmf started\n"));\r
    Status = ConstructSecHobList ();\r
  }\r
\r
  if (EFI_ERROR (Status)) {\r
    ASSERT (FALSE);\r
    CpuDeadLoop ();\r
  }\r
\r
  DEBUG ((DEBUG_INFO, "HobList: %p\n", GetHobList ()));\r
\r
  if (TdIsEnabled ()) {\r
    //\r
    // Measure HobList\r
    //\r
    Status = MeasureHobList (VmmHobList);\r
    if (EFI_ERROR (Status)) {\r
      ASSERT (FALSE);\r
      CpuDeadLoop ();\r
    }\r
\r
    //\r
    // Validate Tdx CFV\r
    //\r
    if (!TdxValidateCfv (CfvBase, FixedPcdGet32 (PcdCfvRawDataSize))) {\r
      ASSERT (FALSE);\r
      CpuDeadLoop ();\r
    }\r
\r
    //\r
    // Measure Tdx CFV\r
    //\r
    Status = MeasureFvImage ((EFI_PHYSICAL_ADDRESS)(UINTN)CfvBase, FixedPcdGet32 (PcdCfvRawDataSize), 1);\r
    if (EFI_ERROR (Status)) {\r
      ASSERT (FALSE);\r
      CpuDeadLoop ();\r
    }\r
  }\r
\r
  //\r
  // Initialize the Platform\r
  //\r
  Status = InitializePlatform (&PlatformInfoHob);\r
  if (EFI_ERROR (Status)) {\r
    ASSERT (FALSE);\r
    CpuDeadLoop ();\r
  }\r
\r
  BuildGuidDataHob (&gUefiOvmfPkgPlatformInfoGuid, &PlatformInfoHob, sizeof (EFI_HOB_PLATFORM_INFO));\r
\r
  //\r
  // SecFV\r
  //\r
  BootFv = (EFI_FIRMWARE_VOLUME_HEADER *)SecCoreData->BootFirmwareVolumeBase;\r
  BuildFvHob ((UINTN)BootFv, BootFv->FvLength);\r
\r
  //\r
  // DxeFV\r
  //\r
  DxeCodeBase = PcdGet32 (PcdBfvBase);\r
  DxeCodeSize = PcdGet32 (PcdBfvRawDataSize) - (UINT32)BootFv->FvLength;\r
  BuildFvHob (DxeCodeBase, DxeCodeSize);\r
\r
  DEBUG ((DEBUG_INFO, "SecFv : %p, 0x%x\n", BootFv, BootFv->FvLength));\r
  DEBUG ((DEBUG_INFO, "DxeFv : %x, 0x%x\n", DxeCodeBase, DxeCodeSize));\r
\r
  BuildStackHob ((UINTN)SecCoreData->StackBase, SecCoreData->StackSize <<= 1);\r
\r
  BuildResourceDescriptorHob (\r
    EFI_RESOURCE_SYSTEM_MEMORY,\r
    EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
    EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
    EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
    EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
    EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
    EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
    EFI_RESOURCE_ATTRIBUTE_TESTED,\r
    (UINT64)SecCoreData->TemporaryRamBase,\r
    (UINT64)SecCoreData->TemporaryRamSize\r
    );\r
\r
  //\r
  // Load the DXE Core and transfer control to it.\r
  // Only DxeFV is in the compressed section.\r
  //\r
  Status = DxeLoadCore (1);\r
\r
  //\r
  // Never arrive here.\r
  //\r
  ASSERT (FALSE);\r
  CpuDeadLoop ();\r
}\r