[mirror_edk2.git] / OvmfPkg / OvmfPkg.dec

## @file\r
#  EFI/Framework Open Virtual Machine Firmware (OVMF) platform\r
#\r
#  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
#\r
#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
##\r
\r
[Defines]\r
  DEC_SPECIFICATION              = 0x00010005\r
  PACKAGE_NAME                   = OvmfPkg\r
  PACKAGE_GUID                   = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5\r
  PACKAGE_VERSION                = 0.1\r
\r
[Includes]\r
  Include\r
  Csm/Include\r
\r
[LibraryClasses]\r
  ##  @libraryclass  Loads and boots a Linux kernel image\r
  #\r
  LoadLinuxLib|Include/Library/LoadLinuxLib.h\r
\r
  ##  @libraryclass  Declares helper functions for Secure Encrypted\r
  #                  Virtualization (SEV) guests.\r
  MemEncryptSevLib|Include/Library/MemEncryptSevLib.h\r
\r
  ##  @libraryclass  Save and restore variables using a file\r
  #\r
  NvVarsFileLib|Include/Library/NvVarsFileLib.h\r
\r
  ##  @libraryclass  Provides services to work with PCI capabilities in PCI\r
  #                  config space.\r
  PciCapLib|Include/Library/PciCapLib.h\r
\r
  ##  @libraryclass  Layered on top of PciCapLib, allows clients to plug an\r
  #                  EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config\r
  #                  space access.\r
  PciCapPciIoLib|Include/Library/PciCapPciIoLib.h\r
\r
  ##  @libraryclass  Layered on top of PciCapLib, allows clients to plug a\r
  #                  PciSegmentLib backend into PciCapLib, for config space\r
  #                  access.\r
  PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h\r
\r
  ##  @libraryclass  Register a status code handler for printing the Boot\r
  #                  Manager's LoadImage() and StartImage() preparations, and\r
  #                  return codes, to the UEFI console.\r
  PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h\r
\r
  ##  @libraryclass  Customize FVB2 protocol member functions for a platform.\r
  PlatformFvbLib|Include/Library/PlatformFvbLib.h\r
\r
  ##  @libraryclass  Access QEMU's firmware configuration interface\r
  #\r
  QemuFwCfgLib|Include/Library/QemuFwCfgLib.h\r
\r
  ##  @libraryclass  S3 support for QEMU fw_cfg\r
  #\r
  QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h\r
\r
  ##  @libraryclass  Rewrite the BootOrder NvVar based on QEMU's "bootorder"\r
  #                  fw_cfg file.\r
  #\r
  QemuBootOrderLib|Include/Library/QemuBootOrderLib.h\r
\r
  ##  @libraryclass  Load a kernel image and command line passed to QEMU via\r
  #                  the command line\r
  #\r
  QemuLoadImageLib|Include/Library/QemuLoadImageLib.h\r
\r
  ##  @libraryclass  Serialize (and deserialize) variables\r
  #\r
  SerializeVariablesLib|Include/Library/SerializeVariablesLib.h\r
\r
  ##  @libraryclass  Declares utility functions for virtio device drivers.\r
  VirtioLib|Include/Library/VirtioLib.h\r
\r
  ##  @libraryclass  Install Virtio Device Protocol instances on virtio-mmio\r
  #                  transports.\r
  VirtioMmioDeviceLib|Include/Library/VirtioMmioDeviceLib.h\r
\r
  ##  @libraryclass  Invoke Xen hypercalls\r
  #\r
  XenHypercallLib|Include/Library/XenHypercallLib.h\r
\r
  ##  @libraryclass  Manage XenBus device path and I/O handles\r
  #\r
  XenIoMmioLib|Include/Library/XenIoMmioLib.h\r
\r
  ##  @libraryclass  Get information about Xen\r
  #\r
  XenPlatformLib|Include/Library/XenPlatformLib.h\r
\r
[Guids]\r
  gUefiOvmfPkgTokenSpaceGuid            = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}\r
  gEfiXenInfoGuid                       = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}\r
  gOvmfPkKek1AppPrefixGuid              = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}\r
  gOvmfPlatformConfigGuid               = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}\r
  gVirtioMmioTransportGuid              = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}\r
  gQemuRamfbGuid                        = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}\r
  gXenBusRootDeviceGuid                 = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}\r
  gRootBridgesConnectedEventGroupGuid   = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}\r
  gMicrosoftVendorGuid                  = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}\r
  gEfiLegacyBiosGuid                    = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}\r
  gEfiLegacyDevOrderVariableGuid        = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}\r
  gLinuxEfiInitrdMediaGuid              = {0x5568e427, 0x68fc, 0x4f3d, {0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68}}\r
  gQemuKernelLoaderFsMediaGuid          = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}\r
\r
[Ppis]\r
  # PPI whose presence in the PPI database signals that the TPM base address\r
  # has been discovered and recorded\r
  gOvmfTpmDiscoveredPpiGuid             = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}\r
\r
[Protocols]\r
  gVirtioDeviceProtocolGuid             = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}\r
  gXenBusProtocolGuid                   = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}\r
  gXenIoProtocolGuid                    = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}\r
  gIoMmuAbsentProtocolGuid              = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}\r
  gEfiLegacy8259ProtocolGuid            = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}\r
  gEfiFirmwareVolumeProtocolGuid        = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}\r
  gEfiIsaAcpiProtocolGuid               = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}\r
  gEfiIsaIoProtocolGuid                 = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}\r
  gEfiLegacyBiosProtocolGuid            = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}\r
  gEfiLegacyBiosPlatformProtocolGuid    = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}\r
  gEfiLegacyInterruptProtocolGuid       = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}\r
  gEfiVgaMiniPortProtocolGuid           = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}\r
  gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}\r
\r
[PcdsFixedAtBuild]\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16\r
\r
  ## This flag is used to control the destination port for PlatformDebugLibIoPort\r
  gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4\r
\r
  ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and\r
  #  LUNs are retrieved from the host during virtio-scsi setup.\r
  #  MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun\r
  #  possible devices. This can take extremely long, for example with\r
  #  MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit\r
  #  MaxTarget and MaxLun, independently, should the host report higher values,\r
  #  so that scanning the number of devices given by their product is still\r
  #  acceptably fast.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6\r
  gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7\r
\r
  ## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for\r
  #  scan by ScsiBusDxe.\r
  #  As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun\r
  #  possible devices, which can take extremely long. Thus, the below constants\r
  #  are used so that scanning the number of devices given by their product\r
  #  is still acceptably fast.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x36\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x37\r
\r
  ## After PvScsiDxe sends a SCSI request to the device, it waits for\r
  #  the request completion in a polling loop.\r
  #  This constant defines how many micro-seconds to wait between each\r
  #  polling loop iteration.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x38\r
\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19\r
  gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f\r
\r
  ## Pcd8259LegacyModeMask defines the default mask value for platform. This\r
  #  value is determined.\r
  #  1) If platform only support pure UEFI, value should be set to 0xFFFF or\r
  #     0xFFFE; Because only clock interrupt is allowed in legacy mode in pure\r
  #     UEFI platform.\r
  #  2) If platform install CSM and use thunk module:\r
  #     a) If thunk call provided by CSM binary requires some legacy interrupt\r
  #        support, the corresponding bit should be opened as 0.\r
  #        For example, if keyboard interfaces provided CSM binary use legacy\r
  #        keyboard interrupt in 8259 bit 1, then the value should be set to\r
  #        0xFFFC.\r
  #     b) If all thunk call provied by CSM binary do not require legacy\r
  #        interrupt support, value should be set to 0xFFFF or 0xFFFE.\r
  #\r
  #  The default value of legacy mode mask could be changed by\r
  #  EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it\r
  #  except some special cases such as when initializing the CSM binary, it\r
  #  should be set to 0xFFFF to mask all legacy interrupt. Please restore the\r
  #  original legacy mask value if changing is made for these special case.\r
  gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3\r
\r
  ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy\r
  #  mode's interrrupt controller.\r
  #  For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.\r
  gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5\r
\r
  ## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when\r
  #  exiting boot service.\r
  #   TRUE  - Switch to Text VGA Mode.\r
  #   FALSE - Does not switch to Text VGA Mode.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable|FALSE|BOOLEAN|0x28\r
\r
  ## Indicates if BiosVideo driver will check for VESA BIOS Extension service\r
  #  support.\r
  #   TRUE  - Check for VESA BIOS Extension service.\r
  #   FALSE - Does not check for VESA BIOS Extension service.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE|BOOLEAN|0x29\r
\r
  ## Indicates if BiosVideo driver will check for VGA service support.\r
  #  NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable\r
  #  are set to FALSE, that means Graphics Output protocol will not be\r
  #  installed, the VGA miniport protocol will be installed instead.\r
  #   TRUE  - Check for VGA service.<BR>\r
  #   FALSE - Does not check for VGA service.<BR>\r
  gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE|BOOLEAN|0x2a\r
\r
  ## Indicates if memory space for legacy region will be set as cacheable.\r
  #   TRUE  - Set cachebility for legacy region.\r
  #   FALSE - Does not set cachebility for legacy region.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|TRUE|BOOLEAN|0x2b\r
\r
  ## Specify memory size with bytes to reserve EBDA below 640K for OPROM.\r
  #  The value should be a multiple of 4KB.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x2c\r
\r
  ## Specify memory base address for OPROM to find free memory.\r
  #  Some OPROMs do not use EBDA or PMM to allocate memory for its usage,\r
  #  instead they find the memory filled with zero from 0x20000.\r
  #  The value should be a multiple of 4KB.\r
  #  The range should be below the EBDA reserved range from\r
  #  (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to\r
  #  CONVENTIONAL_MEMORY_TOP.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x2d\r
\r
  ## Specify memory size with bytes for OPROM to find free memory.\r
  #  The value should be a multiple of 4KB. And the range should be below the\r
  #  EBDA reserved range from\r
  #  (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to\r
  #  CONVENTIONAL_MEMORY_TOP.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x2e\r
\r
  ## Specify the end of address below 1MB for the OPROM.\r
  #  The last shadowed OpROM should not exceed this address.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress|0xdffff|UINT32|0x2f\r
\r
  ## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.\r
  #  The value should be a multiple of 4KB.\r
  # @Prompt Low PMM (Post Memory Manager) Size\r
  gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize|0x10000|UINT32|0x30\r
\r
  ## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.\r
  #  The value should be a multiple of 4KB.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize|0x400000|UINT32|0x31\r
\r
  gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|0x0|UINT32|0x17\r
  gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize|0x0|UINT32|0x32\r
\r
  ## Number of page frames to use for storing grant table entries.\r
  gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33\r
\r
[PcdsDynamic, PcdsDynamicEx]\r
  gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b\r
  gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21\r
\r
  ## The IO port aperture shared by all PCI root bridges.\r
  #\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23\r
\r
  ## The 32-bit MMIO aperture shared by all PCI root bridges.\r
  #\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25\r
\r
  ## The 64-bit MMIO aperture shared by all PCI root bridges.\r
  #\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27\r
\r
  ## The following setting controls how many megabytes we configure as TSEG on\r
  #  Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults\r
  #  cause undefined behavior. During boot, the PCD is updated by PlatformPei\r
  #  to reflect the extended TSEG size, if one is advertized by QEMU.\r
  #\r
  #  This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).\r
  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20\r
\r
  ## Set to TRUE by PlatformPei if the Q35 board supports the "SMRAM at default\r
  #  SMBASE" feature.\r
  #\r
  #  This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).\r
  gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE|BOOLEAN|0x34\r
\r
[PcdsFeatureFlag]\r
  gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c\r
  gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d\r
\r
  ## This feature flag enables SMM/SMRAM support. Note that it also requires\r
  #  such support from the underlying QEMU instance; if that support is not\r
  #  present, the firmware will reject continuing after a certain point.\r
  #\r
  #  The flag also acts as a general "security switch"; when TRUE, many\r
  #  components will change behavior, with the goal of preventing a malicious\r
  #  runtime OS from tampering with firmware structures (special memory ranges\r
  #  used by OVMF, the varstore pflash chip, LockBox etc).\r
  gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e\r
\r
  ## Informs modules (including pre-DXE-phase modules) whether the platform\r
  #  firmware contains a CSM (Compatibility Support Module).\r
  #\r
  gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35\r
Commit	Line	Data
7b202cb0	1	## @file\r
49ba9447	2	# EFI/Framework Open Virtual Machine Firmware (OVMF) platform\r
49ba9447	3	#\r
10fa47e5	4	# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
49ba9447	5	#\r
b26f0cf9	6	# SPDX-License-Identifier: BSD-2-Clause-Patent\r
49ba9447	7	#\r
7b202cb0	8	##\r
49ba9447	9	\r
49ba9447	10	[Defines]\r
46293a42	11	DEC_SPECIFICATION = 0x00010005\r
49ba9447	12	PACKAGE_NAME = OvmfPkg\r
	13	PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5\r
	14	PACKAGE_VERSION = 0.1\r
	15	\r
50944545	16	[Includes]\r
50944545	17	Include\r
eb7cad3f	18	Csm/Include\r
50944545	19	\r
28b29a70	20	[LibraryClasses]\r
f6c6c020	21	## @libraryclass Loads and boots a Linux kernel image\r
	22	#\r
	23	LoadLinuxLib\|Include/Library/LoadLinuxLib.h\r
	24	\r
7cfc48fe LE	25	## @libraryclass Declares helper functions for Secure Encrypted\r
	26	# Virtualization (SEV) guests.\r
	27	MemEncryptSevLib\|Include/Library/MemEncryptSevLib.h\r
	28	\r
28b29a70	29	## @libraryclass Save and restore variables using a file\r
	30	#\r
	31	NvVarsFileLib\|Include/Library/NvVarsFileLib.h\r
	32	\r
392a3146 LE	33	## @libraryclass Provides services to work with PCI capabilities in PCI\r
	34	# config space.\r
	35	PciCapLib\|Include/Library/PciCapLib.h\r
	36	\r
02b9a834 LE	37	## @libraryclass Layered on top of PciCapLib, allows clients to plug an\r
	38	# EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config\r
	39	# space access.\r
	40	PciCapPciIoLib\|Include/Library/PciCapPciIoLib.h\r
	41	\r
6a744d40 LE	42	## @libraryclass Layered on top of PciCapLib, allows clients to plug a\r
	43	# PciSegmentLib backend into PciCapLib, for config space\r
	44	# access.\r
	45	PciCapPciSegmentLib\|Include/Library/PciCapPciSegmentLib.h\r
	46	\r
77874cee LE	47	## @libraryclass Register a status code handler for printing the Boot\r
	48	# Manager's LoadImage() and StartImage() preparations, and\r
	49	# return codes, to the UEFI console.\r
	50	PlatformBmPrintScLib\|Include/Library/PlatformBmPrintScLib.h\r
	51	\r
7cfc48fe LE	52	## @libraryclass Customize FVB2 protocol member functions for a platform.\r
	53	PlatformFvbLib\|Include/Library/PlatformFvbLib.h\r
	54	\r
f1ec65ba	55	## @libraryclass Access QEMU's firmware configuration interface\r
	56	#\r
	57	QemuFwCfgLib\|Include/Library/QemuFwCfgLib.h\r
	58	\r
f70b071e LE	59	## @libraryclass S3 support for QEMU fw_cfg\r
	60	#\r
	61	QemuFwCfgS3Lib\|Include/Library/QemuFwCfgS3Lib.h\r
	62	\r
cca7475b LE	63	## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"\r
	64	# fw_cfg file.\r
	65	#\r
	66	QemuBootOrderLib\|Include/Library/QemuBootOrderLib.h\r
	67	\r
28de1a55 AB	68	## @libraryclass Load a kernel image and command line passed to QEMU via\r
	69	# the command line\r
	70	#\r
	71	QemuLoadImageLib\|Include/Library/QemuLoadImageLib.h\r
	72	\r
28b29a70	73	## @libraryclass Serialize (and deserialize) variables\r
	74	#\r
	75	SerializeVariablesLib\|Include/Library/SerializeVariablesLib.h\r
	76	\r
7cfc48fe LE	77	## @libraryclass Declares utility functions for virtio device drivers.\r
	78	VirtioLib\|Include/Library/VirtioLib.h\r
	79	\r
	80	## @libraryclass Install Virtio Device Protocol instances on virtio-mmio\r
	81	# transports.\r
	82	VirtioMmioDeviceLib\|Include/Library/VirtioMmioDeviceLib.h\r
	83	\r
cd8ff8fd AB	84	## @libraryclass Invoke Xen hypercalls\r
	85	#\r
	86	XenHypercallLib\|Include/Library/XenHypercallLib.h\r
	87	\r
0169352e AB	88	## @libraryclass Manage XenBus device path and I/O handles\r
	89	#\r
	90	XenIoMmioLib\|Include/Library/XenIoMmioLib.h\r
	91	\r
f496443e AP	92	## @libraryclass Get information about Xen\r
	93	#\r
	94	XenPlatformLib\|Include/Library/XenPlatformLib.h\r
	95	\r
7b202cb0	96	[Guids]\r
1dc875a7 AB	97	gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}\r
	98	gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}\r
	99	gOvmfPkKek1AppPrefixGuid = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}\r
	100	gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}\r
	101	gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}\r
	102	gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}\r
	103	gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}\r
	104	gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}\r
	105	gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}\r
	106	gEfiLegacyBiosGuid = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}\r
	107	gEfiLegacyDevOrderVariableGuid = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}\r
	108	gLinuxEfiInitrdMediaGuid = {0x5568e427, 0x68fc, 0x4f3d, {0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68}}\r
	109	gQemuKernelLoaderFsMediaGuid = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}\r
49ba9447	110	\r
6b3d196a AB	111	[Ppis]\r
	112	# PPI whose presence in the PPI database signals that the TPM base address\r
	113	# has been discovered and recorded\r
1dc875a7	114	gOvmfTpmDiscoveredPpiGuid = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}\r
6b3d196a	115	\r
b0f51446	116	[Protocols]\r
1dc875a7 AB	117	gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}\r
	118	gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}\r
	119	gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}\r
	120	gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}\r
	121	gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}\r
	122	gEfiFirmwareVolumeProtocolGuid = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}\r
	123	gEfiIsaAcpiProtocolGuid = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}\r
	124	gEfiIsaIoProtocolGuid = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}\r
	125	gEfiLegacyBiosProtocolGuid = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}\r
	126	gEfiLegacyBiosPlatformProtocolGuid = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}\r
	127	gEfiLegacyInterruptProtocolGuid = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}\r
	128	gEfiVgaMiniPortProtocolGuid = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}\r
	129	gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}\r
b0f51446	130	\r
61069836	131	[PcdsFixedAtBuild]\r
b36f701d JJ	132	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase\|0x0\|UINT32\|0\r
	133	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize\|0x0\|UINT32\|1\r
	134	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase\|0x0\|UINT32\|0x15\r
	135	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize\|0x0\|UINT32\|0x16\r
61069836	136	\r
b90aefa9	137	## This flag is used to control the destination port for PlatformDebugLibIoPort\r
	138	gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort\|0x402\|UINT16\|4\r
	139	\r
37078a63	140	## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and\r
	141	# LUNs are retrieved from the host during virtio-scsi setup.\r
	142	# MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun\r
	143	# possible devices. This can take extremely long, for example with\r
	144	# MaxTarget=255 and MaxLun=16383. The inclusive constants below limit\r
	145	# MaxTarget and MaxLun, independently, should the host report higher values,\r
	146	# so that scanning the number of devices given by their product is still\r
	147	# acceptably fast.\r
	148	gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit\|31\|UINT16\|6\r
	149	gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit\|7\|UINT32\|7\r
	150	\r
7efce2e5 LA	151	## Sets the inclusive number of targets and LUNs that PvScsi exposes for\r
	152	# scan by ScsiBusDxe.\r
	153	# As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun\r
	154	# possible devices, which can take extremely long. Thus, the below constants\r
	155	# are used so that scanning the number of devices given by their product\r
	156	# is still acceptably fast.\r
	157	gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit\|64\|UINT8\|0x36\r
	158	gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit\|0\|UINT8\|0x37\r
	159	\r
c4c15b87 LA	160	## After PvScsiDxe sends a SCSI request to the device, it waits for\r
	161	# the request completion in a polling loop.\r
	162	# This constant defines how many micro-seconds to wait between each\r
	163	# polling loop iteration.\r
	164	gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs\|5\|UINT32\|0x38\r
	165	\r
501e08fc JJ	166	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase\|0x0\|UINT32\|0x8\r
	167	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize\|0x0\|UINT32\|0x9\r
	168	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize\|0x0\|UINT32\|0xa\r
	169	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize\|0\|UINT32\|0xb\r
	170	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase\|0x0\|UINT32\|0xc\r
	171	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase\|0x0\|UINT32\|0xd\r
	172	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase\|0x0\|UINT32\|0xe\r
	173	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress\|0x0\|UINT32\|0xf\r
b382ede3 JJ	174	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase\|0x0\|UINT32\|0x11\r
b382ede3 JJ	175	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize\|0x0\|UINT32\|0x12\r
7cb6b0e0 JJ	176	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase\|0x0\|UINT32\|0x13\r
7cb6b0e0 JJ	177	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\|0x0\|UINT32\|0x14\r
6a7cba79 LE	178	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase\|0x0\|UINT32\|0x18\r
6a7cba79 LE	179	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize\|0x0\|UINT32\|0x19\r
ad43bc6b	180	gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize\|0x0\|UINT32\|0x1a\r
9beac0d8	181	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd\|0x0\|UINT32\|0x1f\r
501e08fc	182	\r
460ffed2 HW	183	## Pcd8259LegacyModeMask defines the default mask value for platform. This\r
	184	# value is determined.\r
	185	# 1) If platform only support pure UEFI, value should be set to 0xFFFF or\r
	186	# 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure\r
	187	# UEFI platform.\r
	188	# 2) If platform install CSM and use thunk module:\r
	189	# a) If thunk call provided by CSM binary requires some legacy interrupt\r
	190	# support, the corresponding bit should be opened as 0.\r
	191	# For example, if keyboard interfaces provided CSM binary use legacy\r
	192	# keyboard interrupt in 8259 bit 1, then the value should be set to\r
	193	# 0xFFFC.\r
	194	# b) If all thunk call provied by CSM binary do not require legacy\r
	195	# interrupt support, value should be set to 0xFFFF or 0xFFFE.\r
	196	#\r
	197	# The default value of legacy mode mask could be changed by\r
	198	# EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it\r
	199	# except some special cases such as when initializing the CSM binary, it\r
	200	# should be set to 0xFFFF to mask all legacy interrupt. Please restore the\r
	201	# original legacy mask value if changing is made for these special case.\r
	202	gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask\|0xFFFF\|UINT16\|0x3\r
	203	\r
	204	## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy\r
	205	# mode's interrrupt controller.\r
	206	# For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.\r
	207	gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel\|0x0000\|UINT16\|0x5\r
	208	\r
51e55d81 HW	209	## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when\r
	210	# exiting boot service.\r
	211	# TRUE - Switch to Text VGA Mode.\r
	212	# FALSE - Does not switch to Text VGA Mode.\r
	213	gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable\|FALSE\|BOOLEAN\|0x28\r
	214	\r
	215	## Indicates if BiosVideo driver will check for VESA BIOS Extension service\r
	216	# support.\r
	217	# TRUE - Check for VESA BIOS Extension service.\r
	218	# FALSE - Does not check for VESA BIOS Extension service.\r
	219	gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable\|TRUE\|BOOLEAN\|0x29\r
	220	\r
	221	## Indicates if BiosVideo driver will check for VGA service support.\r
	222	# NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable\r
	223	# are set to FALSE, that means Graphics Output protocol will not be\r
	224	# installed, the VGA miniport protocol will be installed instead.\r
	225	# TRUE - Check for VGA service.<BR>\r
	226	# FALSE - Does not check for VGA service.<BR>\r
	227	gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable\|TRUE\|BOOLEAN\|0x2a\r
	228	\r
	229	## Indicates if memory space for legacy region will be set as cacheable.\r
	230	# TRUE - Set cachebility for legacy region.\r
	231	# FALSE - Does not set cachebility for legacy region.\r
	232	gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion\|TRUE\|BOOLEAN\|0x2b\r
	233	\r
	234	## Specify memory size with bytes to reserve EBDA below 640K for OPROM.\r
	235	# The value should be a multiple of 4KB.\r
	236	gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize\|0x8000\|UINT32\|0x2c\r
	237	\r
	238	## Specify memory base address for OPROM to find free memory.\r
	239	# Some OPROMs do not use EBDA or PMM to allocate memory for its usage,\r
	240	# instead they find the memory filled with zero from 0x20000.\r
	241	# The value should be a multiple of 4KB.\r
	242	# The range should be below the EBDA reserved range from\r
	243	# (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to\r
	244	# CONVENTIONAL_MEMORY_TOP.\r
	245	gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase\|0x60000\|UINT32\|0x2d\r
	246	\r
	247	## Specify memory size with bytes for OPROM to find free memory.\r
	248	# The value should be a multiple of 4KB. And the range should be below the\r
	249	# EBDA reserved range from\r
	250	# (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to\r
	251	# CONVENTIONAL_MEMORY_TOP.\r
	252	gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize\|0x28000\|UINT32\|0x2e\r
	253	\r
	254	## Specify the end of address below 1MB for the OPROM.\r
	255	# The last shadowed OpROM should not exceed this address.\r
	256	gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress\|0xdffff\|UINT32\|0x2f\r
	257	\r
	258	## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.\r
	259	# The value should be a multiple of 4KB.\r
	260	# @Prompt Low PMM (Post Memory Manager) Size\r
	261	gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize\|0x10000\|UINT32\|0x30\r
	262	\r
	263	## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.\r
	264	# The value should be a multiple of 4KB.\r
	265	gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize\|0x400000\|UINT32\|0x31\r
	266	\r
93314ae5 AP	267	gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr\|0x0\|UINT32\|0x17\r
	268	gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize\|0x0\|UINT32\|0x32\r
	269	\r
8f39d79d AP	270	## Number of page frames to use for storing grant table entries.\r
	271	gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames\|4\|UINT32\|0x33\r
	272	\r
70c66df5	273	[PcdsDynamic, PcdsDynamicEx]\r
85c0b5ee	274	gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent\|0\|UINT64\|2\r
9d35ac26	275	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable\|FALSE\|BOOLEAN\|0x10\r
d55004da	276	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId\|0\|UINT16\|0x1b\r
6fbef93e	277	gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated\|FALSE\|BOOLEAN\|0x21\r
49ba9447	278	\r
c4df7fd0 LE	279	## The IO port aperture shared by all PCI root bridges.\r
	280	#\r
	281	gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase\|0x0\|UINT64\|0x22\r
	282	gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\|0x0\|UINT64\|0x23\r
	283	\r
03845e90 LE	284	## The 32-bit MMIO aperture shared by all PCI root bridges.\r
	285	#\r
	286	gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base\|0x0\|UINT64\|0x24\r
	287	gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size\|0x0\|UINT64\|0x25\r
	288	\r
7e5b1b67 LE	289	## The 64-bit MMIO aperture shared by all PCI root bridges.\r
	290	#\r
	291	gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base\|0x0\|UINT64\|0x26\r
	292	gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size\|0x0\|UINT64\|0x27\r
	293	\r
966dbaf4	294	## The following setting controls how many megabytes we configure as TSEG on\r
d04b72c6 LE	295	# Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults\r
	296	# cause undefined behavior. During boot, the PCD is updated by PlatformPei\r
	297	# to reflect the extended TSEG size, if one is advertized by QEMU.\r
966dbaf4	298	#\r
d04b72c6	299	# This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).\r
966dbaf4 LE	300	gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes\|8\|UINT16\|0x20\r
966dbaf4 LE	301	\r
d74d56fc LE	302	## Set to TRUE by PlatformPei if the Q35 board supports the "SMRAM at default\r
	303	# SMBASE" feature.\r
	304	#\r
	305	# This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).\r
	306	gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase\|FALSE\|BOOLEAN\|0x34\r
	307	\r
e05061c5	308	[PcdsFeatureFlag]\r
2f9c55cc	309	gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation\|TRUE\|BOOLEAN\|0x1c\r
43336916	310	gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation\|FALSE\|BOOLEAN\|0x1d\r
1f695483 LE	311	\r
	312	## This feature flag enables SMM/SMRAM support. Note that it also requires\r
	313	# such support from the underlying QEMU instance; if that support is not\r
	314	# present, the firmware will reject continuing after a certain point.\r
	315	#\r
	316	# The flag also acts as a general "security switch"; when TRUE, many\r
	317	# components will change behavior, with the goal of preventing a malicious\r
	318	# runtime OS from tampering with firmware structures (special memory ranges\r
	319	# used by OVMF, the varstore pflash chip, LockBox etc).\r
	320	gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire\|FALSE\|BOOLEAN\|0x1e\r
50f911d2 LE	321	\r
	322	## Informs modules (including pre-DXE-phase modules) whether the platform\r
	323	# firmware contains a CSM (Compatibility Support Module).\r
	324	#\r
	325	gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable\|FALSE\|BOOLEAN\|0x35\r