OvmfPkg/build.sh: Recognize '-p' switch

[mirror_edk2.git] / OvmfPkg / PlatformPei / Platform.c

/**@file\r
  Platform PEI driver\r
\r
  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
//\r
// The package level header files this module uses\r
//\r
#include <PiPei.h>\r
\r
//\r
// The Library classes this module consumes\r
//\r
#include <Library/DebugLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/PciLib.h>\r
#include <Library/PeimEntryPoint.h>\r
#include <Library/ResourcePublicationLib.h>\r
#include <Guid/MemoryTypeInformation.h>\r
\r
#include "Platform.h"\r
\r
EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {\r
  { EfiACPIMemoryNVS,       0x004 },\r
  { EfiACPIReclaimMemory,   0x008 },\r
  { EfiReservedMemoryType,  0x004 },\r
  { EfiRuntimeServicesData, 0x024 },\r
  { EfiRuntimeServicesCode, 0x030 },\r
  { EfiBootServicesCode,    0x180 },\r
  { EfiBootServicesData,    0xF00 },\r
  { EfiMaxMemoryType,       0x000 }\r
};\r
\r
\r
VOID\r
AddIoMemoryBaseSizeHob (\r
  EFI_PHYSICAL_ADDRESS        MemoryBase,\r
  UINT64                      MemorySize\r
  )\r
{\r
  BuildResourceDescriptorHob (\r
    EFI_RESOURCE_MEMORY_MAPPED_IO,\r
      EFI_RESOURCE_ATTRIBUTE_PRESENT     |\r
      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
      EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_TESTED,\r
    MemoryBase,\r
    MemorySize\r
    );\r
}\r
\r
\r
VOID\r
AddIoMemoryRangeHob (\r
  EFI_PHYSICAL_ADDRESS        MemoryBase,\r
  EFI_PHYSICAL_ADDRESS        MemoryLimit\r
  )\r
{\r
  AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r
}\r
\r
\r
VOID\r
AddMemoryBaseSizeHob (\r
  EFI_PHYSICAL_ADDRESS        MemoryBase,\r
  UINT64                      MemorySize\r
  )\r
{\r
  BuildResourceDescriptorHob (\r
    EFI_RESOURCE_SYSTEM_MEMORY,\r
      EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
      EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_TESTED,\r
    MemoryBase,\r
    MemorySize\r
    );\r
}\r
\r
\r
VOID\r
AddMemoryRangeHob (\r
  EFI_PHYSICAL_ADDRESS        MemoryBase,\r
  EFI_PHYSICAL_ADDRESS        MemoryLimit\r
  )\r
{\r
  AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r
}\r
\r
VOID\r
MemMapInitialization (\r
  EFI_PHYSICAL_ADDRESS  TopOfMemory\r
  )\r
{\r
  //\r
  // Create Memory Type Information HOB\r
  //\r
  BuildGuidDataHob (\r
    &gEfiMemoryTypeInformationGuid,\r
    mDefaultMemoryTypeInformation,\r
    sizeof(mDefaultMemoryTypeInformation)\r
    );\r
\r
  //\r
  // Add PCI IO Port space available for PCI resource allocations.\r
  //\r
  BuildResourceDescriptorHob (\r
    EFI_RESOURCE_IO,\r
      EFI_RESOURCE_ATTRIBUTE_PRESENT     |\r
      EFI_RESOURCE_ATTRIBUTE_INITIALIZED,\r
    0x1000,\r
    0xF000\r
    );\r
\r
  //\r
  // Add PCI MMIO space available to PCI resource allocations\r
  //\r
  if (TopOfMemory < BASE_2GB) {\r
    AddIoMemoryBaseSizeHob (BASE_2GB, 0xFEC00000 - BASE_2GB);\r
  } else {\r
    AddIoMemoryBaseSizeHob (TopOfMemory, 0xFEC00000 - TopOfMemory);\r
  }\r
\r
  //\r
  // Local APIC range\r
  //\r
  AddIoMemoryBaseSizeHob (0xFEC80000, SIZE_512KB);\r
\r
  //\r
  // I/O APIC range\r
  //\r
  AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_512KB);\r
\r
  //\r
  // Video memory + Legacy BIOS region\r
  //\r
  AddIoMemoryRangeHob (0x0A0000, BASE_1MB);\r
}\r
\r
\r
VOID\r
MiscInitialization (\r
  )\r
{\r
  //\r
  // Disable A20 Mask\r
  //\r
  IoOr8 (0x92, BIT1);\r
\r
  //\r
  // Build the CPU hob with 36-bit addressing and 16-bits of IO space.\r
  //\r
  BuildCpuHob (36, 16);\r
}\r
\r
\r
VOID\r
ReserveEmuVariableNvStore (\r
  )\r
{\r
  EFI_PHYSICAL_ADDRESS VariableStore;\r
\r
  //\r
  // Allocate storage for NV variables early on so it will be\r
  // at a consistent address.  Since VM memory is preserved\r
  // across reboots, this allows the NV variable storage to survive\r
  // a VM reboot.\r
  //\r
  VariableStore =\r
    (EFI_PHYSICAL_ADDRESS)(UINTN)\r
      AllocateRuntimePool (\r
        2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)\r
        );\r
  DEBUG ((EFI_D_INFO,\r
          "Reserved variable store memory: 0x%lX; size: %dkb\n",\r
          VariableStore,\r
          (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024\r
        ));\r
  PcdSet64 (PcdEmuVariableNvStoreReserved, VariableStore);\r
}\r
\r
\r
/**\r
  Perform Platform PEI initialization.\r
\r
  @param  FileHandle      Handle of the file being invoked.\r
  @param  PeiServices     Describes the list of possible PEI Services.\r
\r
  @return EFI_SUCCESS     The PEIM initialized successfully.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
InitializePlatform (\r
  IN       EFI_PEI_FILE_HANDLE  FileHandle,\r
  IN CONST EFI_PEI_SERVICES     **PeiServices\r
  )\r
{\r
  EFI_PHYSICAL_ADDRESS  TopOfMemory;\r
\r
  DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));\r
\r
  TopOfMemory = MemDetect ();\r
\r
  ReserveEmuVariableNvStore ();\r
\r
  PeiFvInitialization ();\r
\r
  MemMapInitialization (TopOfMemory);\r
\r
  MiscInitialization ();\r
\r
  return EFI_SUCCESS;\r
}\r