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Commit | Line | Data |
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49ba9447 | 1 | /** @file\r |
2 | Platform PEI module include file.\r | |
3 | \r | |
035ce3b3 | 4 | Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r |
b26f0cf9 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
49ba9447 | 6 | \r |
7 | **/\r | |
8 | \r | |
9 | #ifndef _PLATFORM_PEI_H_INCLUDED_\r | |
10 | #define _PLATFORM_PEI_H_INCLUDED_\r | |
11 | \r | |
bb6a9a93 WL |
12 | #include <IndustryStandard/E820.h>\r |
13 | \r | |
49ba9447 | 14 | VOID\r |
15 | AddIoMemoryBaseSizeHob (\r | |
16 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
17 | UINT64 MemorySize\r | |
18 | );\r | |
19 | \r | |
20 | VOID\r | |
21 | AddIoMemoryRangeHob (\r | |
22 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
23 | EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
24 | );\r | |
25 | \r | |
26 | VOID\r | |
27 | AddMemoryBaseSizeHob (\r | |
28 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
29 | UINT64 MemorySize\r | |
30 | );\r | |
31 | \r | |
32 | VOID\r | |
33 | AddMemoryRangeHob (\r | |
34 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
35 | EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
36 | );\r | |
37 | \r | |
eec7d420 | 38 | VOID\r |
39 | AddReservedMemoryBaseSizeHob (\r | |
40 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
cdef34ec LE |
41 | UINT64 MemorySize,\r |
42 | BOOLEAN Cacheable\r | |
eec7d420 | 43 | );\r |
44 | \r | |
bc89fe48 LE |
45 | VOID\r |
46 | AddressWidthInitialization (\r | |
47 | VOID\r | |
48 | );\r | |
49 | \r | |
23bfb5c0 LE |
50 | VOID\r |
51 | Q35TsegMbytesInitialization (\r | |
52 | VOID\r | |
53 | );\r | |
54 | \r | |
73974f80 LE |
55 | VOID\r |
56 | Q35SmramAtDefaultSmbaseInitialization (\r | |
57 | VOID\r | |
58 | );\r | |
59 | \r | |
36658fff WL |
60 | EFI_STATUS\r |
61 | PublishPeiMemory (\r | |
62 | VOID\r | |
63 | );\r | |
64 | \r | |
4b455f7b JJ |
65 | UINT32\r |
66 | GetSystemMemorySizeBelow4gb (\r | |
67 | VOID\r | |
68 | );\r | |
69 | \r | |
49edde15 LE |
70 | VOID\r |
71 | QemuUc32BaseInitialization (\r | |
72 | VOID\r | |
73 | );\r | |
74 | \r | |
c034906e JJ |
75 | VOID\r |
76 | InitializeRamRegions (\r | |
49ba9447 | 77 | VOID\r |
78 | );\r | |
79 | \r | |
80 | EFI_STATUS\r | |
81 | PeiFvInitialization (\r | |
82 | VOID\r | |
83 | );\r | |
84 | \r | |
dbab9949 LE |
85 | VOID\r |
86 | InstallFeatureControlCallback (\r | |
87 | VOID\r | |
88 | );\r | |
89 | \r | |
d20ae95a MAL |
90 | VOID\r |
91 | InstallClearCacheCallback (\r | |
92 | VOID\r | |
93 | );\r | |
94 | \r | |
eec7d420 | 95 | EFI_STATUS\r |
96 | InitializeXen (\r | |
b98b4941 | 97 | VOID\r |
c7ea55b9 WL |
98 | );\r |
99 | \r | |
b98b4941 | 100 | BOOLEAN\r |
c7ea55b9 | 101 | XenDetect (\r |
eec7d420 | 102 | VOID\r |
103 | );\r | |
104 | \r | |
13b5d743 BS |
105 | VOID\r |
106 | AmdSevInitialize (\r | |
107 | VOID\r | |
108 | );\r | |
109 | \r | |
b621bb0a JJ |
110 | extern BOOLEAN mXen;\r |
111 | \r | |
18f31ada JJ |
112 | VOID\r |
113 | XenPublishRamRegions (\r | |
114 | VOID\r | |
bb6a9a93 WL |
115 | );\r |
116 | \r | |
979420df JJ |
117 | extern EFI_BOOT_MODE mBootMode;\r |
118 | \r | |
7cdba634 JJ |
119 | extern BOOLEAN mS3Supported;\r |
120 | \r | |
bc89fe48 LE |
121 | extern UINT8 mPhysMemAddressWidth;\r |
122 | \r | |
45a70db3 LE |
123 | extern UINT32 mMaxCpuCount;\r |
124 | \r | |
d5e06444 LE |
125 | extern UINT16 mHostBridgeDevId;\r |
126 | \r | |
73974f80 LE |
127 | extern BOOLEAN mQ35SmramAtDefaultSmbase;\r |
128 | \r | |
49edde15 LE |
129 | extern UINT32 mQemuUc32Base;\r |
130 | \r | |
49ba9447 | 131 | #endif // _PLATFORM_PEI_H_INCLUDED_\r |