OvmfPkg/PlatformPei: detect SMRAM at default SMBASE (for real)

[mirror_edk2.git] / OvmfPkg / PlatformPei / PlatformPei.inf

## @file\r
#  Platform PEI driver\r
#\r
#  This module provides platform specific function to detect boot mode.\r
#  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
#\r
#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
##\r
\r
[Defines]\r
  INF_VERSION                    = 0x00010005\r
  BASE_NAME                      = PlatformPei\r
  FILE_GUID                      = 222c386d-5abc-4fb4-b124-fbb82488acf4\r
  MODULE_TYPE                    = PEIM\r
  VERSION_STRING                 = 1.0\r
  ENTRY_POINT                    = InitializePlatform\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
#  VALID_ARCHITECTURES           = IA32 X64 EBC\r
#\r
\r
[Sources]\r
  AmdSev.c\r
  ClearCache.c\r
  Cmos.c\r
  Cmos.h\r
  FeatureControl.c\r
  Fv.c\r
  MemDetect.c\r
  Platform.c\r
  Platform.h\r
  Xen.c\r
  Xen.h\r
\r
[Packages]\r
  MdePkg/MdePkg.dec\r
  MdeModulePkg/MdeModulePkg.dec\r
  SecurityPkg/SecurityPkg.dec\r
  UefiCpuPkg/UefiCpuPkg.dec\r
  OvmfPkg/OvmfPkg.dec\r
\r
[Guids]\r
  gEfiMemoryTypeInformationGuid\r
  gEfiXenInfoGuid\r
\r
[LibraryClasses]\r
  BaseLib\r
  CacheMaintenanceLib\r
  DebugLib\r
  HobLib\r
  IoLib\r
  PciLib\r
  ResourcePublicationLib\r
  PeiServicesLib\r
  PeiServicesTablePointerLib\r
  PeimEntryPoint\r
  QemuFwCfgLib\r
  QemuFwCfgS3Lib\r
  MtrrLib\r
  MemEncryptSevLib\r
  PcdLib\r
\r
[Pcd]\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize\r
  gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base\r
  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size\r
  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd\r
  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes\r
  gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase\r
  gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask\r
  gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy\r
  gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress\r
  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber\r
  gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber\r
  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize\r
\r
[FixedPcd]\r
  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress\r
\r
[FeaturePcd]\r
  gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable\r
  gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire\r
\r
[Ppis]\r
  gEfiPeiMasterBootModePpiGuid\r
  gEfiPeiMpServicesPpiGuid\r
\r
[Depex]\r
  TRUE\r
\r