OvmfPkg/ResetVector: update SEV support to use new work area format

[mirror_edk2.git] / OvmfPkg / ResetVector / Ia32 / PageTables64.asm

;------------------------------------------------------------------------------\r
; @file\r
; Sets the CR3 register for 64-bit paging\r
;\r
; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>\r
; Copyright (c) 2017 - 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
;------------------------------------------------------------------------------\r
\r
BITS    32\r
\r
%define PAGE_PRESENT            0x01\r
%define PAGE_READ_WRITE         0x02\r
%define PAGE_USER_SUPERVISOR    0x04\r
%define PAGE_WRITE_THROUGH      0x08\r
%define PAGE_CACHE_DISABLE     0x010\r
%define PAGE_ACCESSED          0x020\r
%define PAGE_DIRTY             0x040\r
%define PAGE_PAT               0x080\r
%define PAGE_GLOBAL           0x0100\r
%define PAGE_2M_MBO            0x080\r
%define PAGE_2M_PAT          0x01000\r
\r
%define PAGE_4K_PDE_ATTR (PAGE_ACCESSED + \\r
                          PAGE_DIRTY + \\r
                          PAGE_READ_WRITE + \\r
                          PAGE_PRESENT)\r
\r
%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \\r
                          PAGE_ACCESSED + \\r
                          PAGE_DIRTY + \\r
                          PAGE_READ_WRITE + \\r
                          PAGE_PRESENT)\r
\r
%define PAGE_PDP_ATTR (PAGE_ACCESSED + \\r
                       PAGE_READ_WRITE + \\r
                       PAGE_PRESENT)\r
\r
;\r
; Modified:  EAX, EBX, ECX, EDX\r
;\r
SetCr3ForPageTables64:\r
\r
    ; Clear the WorkArea header. The SEV probe routines will populate the\r
    ; work area when detected.\r
    mov     byte[WORK_AREA_GUEST_TYPE], 0\r
\r
    OneTimeCall   CheckSevFeatures\r
    xor     edx, edx\r
    test    eax, eax\r
    jz      SevNotActive\r
\r
    ; If SEV is enabled, C-bit is always above 31\r
    sub     eax, 32\r
    bts     edx, eax\r
\r
SevNotActive:\r
\r
    ;\r
    ; For OVMF, build some initial page tables at\r
    ; PcdOvmfSecPageTablesBase - (PcdOvmfSecPageTablesBase + 0x6000).\r
    ;\r
    ; This range should match with PcdOvmfSecPageTablesSize which is\r
    ; declared in the FDF files.\r
    ;\r
    ; At the end of PEI, the pages tables will be rebuilt into a\r
    ; more permanent location by DxeIpl.\r
    ;\r
\r
    mov     ecx, 6 * 0x1000 / 4\r
    xor     eax, eax\r
clearPageTablesMemoryLoop:\r
    mov     dword[ecx * 4 + PT_ADDR (0) - 4], eax\r
    loop    clearPageTablesMemoryLoop\r
\r
    ;\r
    ; Top level Page Directory Pointers (1 * 512GB entry)\r
    ;\r
    mov     dword[PT_ADDR (0)], PT_ADDR (0x1000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (4)], edx\r
\r
    ;\r
    ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)\r
    ;\r
    mov     dword[PT_ADDR (0x1000)], PT_ADDR (0x2000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (0x1004)], edx\r
    mov     dword[PT_ADDR (0x1008)], PT_ADDR (0x3000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (0x100C)], edx\r
    mov     dword[PT_ADDR (0x1010)], PT_ADDR (0x4000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (0x1014)], edx\r
    mov     dword[PT_ADDR (0x1018)], PT_ADDR (0x5000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (0x101C)], edx\r
\r
    ;\r
    ; Page Table Entries (2048 * 2MB entries => 4GB)\r
    ;\r
    mov     ecx, 0x800\r
pageTableEntriesLoop:\r
    mov     eax, ecx\r
    dec     eax\r
    shl     eax, 21\r
    add     eax, PAGE_2M_PDE_ATTR\r
    mov     [ecx * 8 + PT_ADDR (0x2000 - 8)], eax\r
    mov     [(ecx * 8 + PT_ADDR (0x2000 - 8)) + 4], edx\r
    loop    pageTableEntriesLoop\r
\r
    OneTimeCall   IsSevEsEnabled\r
    test    eax, eax\r
    jz      SetCr3\r
\r
    ;\r
    ; The initial GHCB will live at GHCB_BASE and needs to be un-encrypted.\r
    ; This requires the 2MB page for this range be broken down into 512 4KB\r
    ; pages.  All will be marked encrypted, except for the GHCB.\r
    ;\r
    mov     ecx, (GHCB_BASE >> 21)\r
    mov     eax, GHCB_PT_ADDR + PAGE_PDP_ATTR\r
    mov     [ecx * 8 + PT_ADDR (0x2000)], eax\r
\r
    ;\r
    ; Page Table Entries (512 * 4KB entries => 2MB)\r
    ;\r
    mov     ecx, 512\r
pageTableEntries4kLoop:\r
    mov     eax, ecx\r
    dec     eax\r
    shl     eax, 12\r
    add     eax, GHCB_BASE & 0xFFE0_0000\r
    add     eax, PAGE_4K_PDE_ATTR\r
    mov     [ecx * 8 + GHCB_PT_ADDR - 8], eax\r
    mov     [(ecx * 8 + GHCB_PT_ADDR - 8) + 4], edx\r
    loop    pageTableEntries4kLoop\r
\r
    ;\r
    ; Clear the encryption bit from the GHCB entry\r
    ;\r
    mov     ecx, (GHCB_BASE & 0x1F_FFFF) >> 12\r
    mov     [ecx * 8 + GHCB_PT_ADDR + 4], strict dword 0\r
\r
    mov     ecx, GHCB_SIZE / 4\r
    xor     eax, eax\r
clearGhcbMemoryLoop:\r
    mov     dword[ecx * 4 + GHCB_BASE - 4], eax\r
    loop    clearGhcbMemoryLoop\r
\r
SetCr3:\r
    ;\r
    ; Set CR3 now that the paging structures are available\r
    ;\r
    mov     eax, PT_ADDR (0)\r
    mov     cr3, eax\r
\r
    OneTimeCallRet SetCr3ForPageTables64\r