projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| e1aaef00 S |
1 | /** @file\r |
| 2 | RISC-V SEC phase module for Qemu Virt.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>\r | |
| 5 | Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>\r | |
| 6 | \r | |
| 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
| 8 | \r | |
| 9 | **/\r | |
| 10 | \r | |
| 11 | #include "SecMain.h"\r | |
| 12 | \r | |
| 13 | STATIC\r | |
| 14 | EFI_STATUS\r | |
| 15 | EFIAPI\r | |
| 16 | SecInitializePlatform (\r | |
| 17 | VOID\r | |
| 18 | )\r | |
| 19 | {\r | |
| 20 | EFI_STATUS Status;\r | |
| 21 | \r | |
| 22 | MemoryPeimInitialization ();\r | |
| 23 | \r | |
| 24 | CpuPeimInitialization ();\r | |
| 25 | \r | |
| 26 | // Set the Boot Mode\r | |
| 27 | SetBootMode (BOOT_WITH_FULL_CONFIGURATION);\r | |
| 28 | \r | |
| 29 | Status = PlatformPeimInitialization ();\r | |
| 30 | ASSERT_EFI_ERROR (Status);\r | |
| 31 | \r | |
| 32 | return EFI_SUCCESS;\r | |
| 33 | }\r | |
| 34 | \r | |
| 35 | /**\r | |
| 36 | \r | |
| 37 | Entry point to the C language phase of SEC. After the SEC assembly\r | |
| 38 | code has initialized some temporary memory and set up the stack,\r | |
| 39 | the control is transferred to this function.\r | |
| 40 | \r | |
| 41 | \r | |
| 42 | @param[in] BootHartId Hardware thread ID of boot hart.\r | |
| 43 | @param[in] DeviceTreeAddress Pointer to Device Tree (DTB)\r | |
| 44 | **/\r | |
| 45 | VOID\r | |
| 46 | NORETURN\r | |
| 47 | EFIAPI\r | |
| 48 | SecStartup (\r | |
| 49 | IN UINTN BootHartId,\r | |
| 50 | IN VOID *DeviceTreeAddress\r | |
| 51 | )\r | |
| 52 | {\r | |
| 53 | EFI_HOB_HANDOFF_INFO_TABLE *HobList;\r | |
| 54 | EFI_RISCV_FIRMWARE_CONTEXT FirmwareContext;\r | |
| 55 | EFI_STATUS Status;\r | |
| 56 | UINT64 UefiMemoryBase;\r | |
| 57 | UINT64 StackBase;\r | |
| f80f0522 | 58 | UINT32 StackSize;\r |
| e1aaef00 S |
59 | \r |
| 60 | //\r | |
| 61 | // Report Status Code to indicate entering SEC core\r | |
| 62 | //\r | |
| 63 | DEBUG ((\r | |
| 64 | DEBUG_INFO,\r | |
| 65 | "%a() BootHartId: 0x%x, DeviceTreeAddress=0x%x\n",\r | |
| 66 | __FUNCTION__,\r | |
| 67 | BootHartId,\r | |
| 68 | DeviceTreeAddress\r | |
| 69 | ));\r | |
| 70 | \r | |
| 71 | FirmwareContext.BootHartId = BootHartId;\r | |
| 72 | FirmwareContext.FlattenedDeviceTree = (UINT64)DeviceTreeAddress;\r | |
| 73 | SetFirmwareContextPointer (&FirmwareContext);\r | |
| 74 | \r | |
| f80f0522 S |
75 | StackBase = (UINT64)FixedPcdGet32 (PcdOvmfSecPeiTempRamBase);\r |
| 76 | StackSize = FixedPcdGet32 (PcdOvmfSecPeiTempRamSize);\r | |
| 77 | UefiMemoryBase = StackBase + StackSize - SIZE_32MB;\r | |
| e1aaef00 S |
78 | \r |
| 79 | // Declare the PI/UEFI memory region\r | |
| 80 | HobList = HobConstructor (\r | |
| 81 | (VOID *)UefiMemoryBase,\r | |
| 82 | SIZE_32MB,\r | |
| 83 | (VOID *)UefiMemoryBase,\r | |
| 84 | (VOID *)StackBase // The top of the UEFI Memory is reserved for the stacks\r | |
| 85 | );\r | |
| 86 | PrePeiSetHobList (HobList);\r | |
| 87 | \r | |
| 88 | SecInitializePlatform ();\r | |
| 89 | \r | |
| f80f0522 S |
90 | BuildStackHob (StackBase, StackSize);\r |
| 91 | \r | |
| e1aaef00 S |
92 | //\r |
| 93 | // Process all libraries constructor function linked to SecMain.\r | |
| 94 | //\r | |
| 95 | ProcessLibraryConstructorList ();\r | |
| 96 | \r | |
| 97 | // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r | |
| 98 | Status = DecompressFirstFv ();\r | |
| 99 | ASSERT_EFI_ERROR (Status);\r | |
| 100 | \r | |
| 101 | // Load the DXE Core and transfer control to it\r | |
| 102 | Status = LoadDxeCoreFromFv (NULL, 0);\r | |
| 103 | ASSERT_EFI_ERROR (Status);\r | |
| 104 | //\r | |
| 105 | // Should not come here.\r | |
| 106 | //\r | |
| 107 | UNREACHABLE ();\r | |
| 108 | }\r |