projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 49ba9447 | 1 | ;------------------------------------------------------------------------------\r |
| 2 | ;*\r | |
| 7cb6b0e0 | 3 | ;* Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r |
| b26f0cf9 | 4 | ;* SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 49ba9447 | 5 | ;*\r |
| 6 | ;* CpuAsm.asm\r | |
| 7 | ;*\r | |
| 8 | ;* Abstract:\r | |
| 9 | ;*\r | |
| 10 | ;------------------------------------------------------------------------------\r | |
| 11 | \r | |
| 42a83e80 | 12 | #include <Base.h>\r |
| 49ba9447 | 13 | \r |
| d8cfdb5f JJ |
14 | DEFAULT REL\r |
| 15 | SECTION .text\r | |
| 49ba9447 | 16 | \r |
| d8cfdb5f | 17 | extern ASM_PFX(SecCoreStartupWithStack)\r |
| 49ba9447 | 18 | \r |
| 19 | ;\r | |
| 0913fadc | 20 | ; SecCore Entry Point\r |
| 49ba9447 | 21 | ;\r |
| 0913fadc | 22 | ; Processor is in flat protected mode\r |
| 49ba9447 | 23 | ;\r |
| 0913fadc | 24 | ; @param[in] RAX Initial value of the EAX register (BIST: Built-in Self Test)\r |
| 25 | ; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor\r | |
| 26 | ; @param[in] RBP Pointer to the start of the Boot Firmware Volume\r | |
| 2278b8a8 LE |
27 | ; @param[in] DS Selector allowing flat access to all addresses\r |
| 28 | ; @param[in] ES Selector allowing flat access to all addresses\r | |
| 29 | ; @param[in] FS Selector allowing flat access to all addresses\r | |
| 30 | ; @param[in] GS Selector allowing flat access to all addresses\r | |
| 31 | ; @param[in] SS Selector allowing flat access to all addresses\r | |
| 49ba9447 | 32 | ;\r |
| 0913fadc | 33 | ; @return None This routine does not return\r |
| 49ba9447 | 34 | ;\r |
| d8cfdb5f JJ |
35 | global ASM_PFX(_ModuleEntryPoint)\r |
| 36 | ASM_PFX(_ModuleEntryPoint):\r | |
| 49ba9447 | 37 | \r |
| 2278b8a8 LE |
38 | ;\r |
| 39 | ; Fill the temporary RAM with the initial stack value.\r | |
| 40 | ; The loop below will seed the heap as well, but that's harmless.\r | |
| 41 | ;\r | |
| 46c6b956 RN |
42 | mov rax, (FixedPcdGet32 (PcdInitValueInTempStack) << 32) | FixedPcdGet32 (PcdInitValueInTempStack)\r |
| 43 | ; qword to store\r | |
| 2278b8a8 LE |
44 | mov rdi, FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) ; base address,\r |
| 45 | ; relative to\r | |
| 46 | ; ES\r | |
| 47 | mov rcx, FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) / 8 ; qword count\r | |
| 48 | cld ; store from base\r | |
| 49 | ; up\r | |
| 50 | rep stosq\r | |
| 51 | \r | |
| 49ba9447 | 52 | ;\r |
| 7cb6b0e0 | 53 | ; Load temporary RAM stack based on PCDs\r |
| 49ba9447 | 54 | ;\r |
| d8cfdb5f | 55 | %define SEC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + \\r |
| 7cb6b0e0 JJ |
56 | FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))\r |
| 57 | mov rsp, SEC_TOP_OF_STACK\r | |
| 49ba9447 | 58 | nop\r |
| 59 | \r | |
| 60 | ;\r | |
| 61 | ; Setup parameters and call SecCoreStartupWithStack\r | |
| 62 | ; rcx: BootFirmwareVolumePtr\r | |
| 0913fadc | 63 | ; rdx: TopOfCurrentStack\r |
| 49ba9447 | 64 | ;\r |
| 65 | mov rcx, rbp\r | |
| 0913fadc | 66 | mov rdx, rsp\r |
| d8cfdb5f JJ |
67 | sub rsp, 0x20\r |
| 68 | call ASM_PFX(SecCoreStartupWithStack)\r | |
| 49ba9447 | 69 | \r |