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90b8b0ec 1/** @file\r
2 Driver implementing the Tiano Legacy 8259 Protocol\r
1166d068 3\r
47ca9c95 4Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>\r
e1d302e5 5SPDX-License-Identifier: BSD-2-Clause-Patent\r
1166d068 6\r
1166d068 7**/\r
8\r
9#ifndef _8259_H__\r
10#define _8259_H__\r
11\r
12#include <FrameworkDxe.h>\r
13\r
1166d068 14#include <Protocol/Legacy8259.h>\r
ae6a37f0 15#include <Protocol/PciIo.h>\r
1166d068 16\r
17#include <Library/UefiBootServicesTableLib.h>\r
18#include <Library/DebugLib.h>\r
8be701c3 19#include <Library/IoLib.h>\r
ae6a37f0 20#include <Library/BaseLib.h>\r
0547cf4b 21#include <Library/PcdLib.h>\r
1166d068 22\r
6844f188 23#include <IndustryStandard/Pci.h>\r
47ca9c95 24\r
1166d068 25// 8259 Hardware definitions\r
47ca9c95 26\r
1166d068 27#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08\r
28#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70\r
29\r
30#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68\r
31#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70\r
32\r
33#define LEGACY_8259_CONTROL_REGISTER_MASTER 0x20\r
34#define LEGACY_8259_MASK_REGISTER_MASTER 0x21\r
35#define LEGACY_8259_CONTROL_REGISTER_SLAVE 0xA0\r
36#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1\r
37#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER 0x4D0\r
38#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE 0x4D1\r
39\r
40#define LEGACY_8259_EOI 0x20\r
41\r
1166d068 42// Protocol Function Prototypes\r
47ca9c95 43\r
24115e44
ED
44/**\r
45 Sets the base address for the 8259 master and slave PICs.\r
47ca9c95 46\r
24115e44
ED
47 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
48 @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.\r
49 @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.\r
50\r
51 @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
52 @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.\r
53\r
54**/\r
1166d068 55EFI_STATUS\r
56EFIAPI\r
57Interrupt8259SetVectorBase (\r
90b8b0ec 58 IN EFI_LEGACY_8259_PROTOCOL *This,\r
59 IN UINT8 MasterBase,\r
60 IN UINT8 SlaveBase\r
61 );\r
1166d068 62\r
24115e44
ED
63/**\r
64 Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.\r
65\r
66 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
67 @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.\r
68 @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.\r
69 @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.\r
70 @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.\r
71\r
72 @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
73 @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.\r
74\r
75**/\r
1166d068 76EFI_STATUS\r
77EFIAPI\r
78Interrupt8259GetMask (\r
90b8b0ec 79 IN EFI_LEGACY_8259_PROTOCOL *This,\r
1166d068 80 OUT UINT16 *LegacyMask, OPTIONAL\r
81 OUT UINT16 *LegacyEdgeLevel, OPTIONAL\r
82 OUT UINT16 *ProtectedMask, OPTIONAL\r
83 OUT UINT16 *ProtectedEdgeLevel OPTIONAL\r
90b8b0ec 84 );\r
1166d068 85\r
24115e44
ED
86/**\r
87 Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.\r
88\r
89 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
90 @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.\r
91 @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.\r
92 @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.\r
93 @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.\r
94\r
95 @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
96 @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.\r
97\r
98**/\r
1166d068 99EFI_STATUS\r
100EFIAPI\r
101Interrupt8259SetMask (\r
90b8b0ec 102 IN EFI_LEGACY_8259_PROTOCOL *This,\r
103 IN UINT16 *LegacyMask, OPTIONAL\r
104 IN UINT16 *LegacyEdgeLevel, OPTIONAL\r
105 IN UINT16 *ProtectedMask, OPTIONAL\r
106 IN UINT16 *ProtectedEdgeLevel OPTIONAL\r
107 );\r
1166d068 108\r
24115e44
ED
109/**\r
110 Sets the mode of the PICs.\r
111\r
112 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
113 @param[in] Mode 16-bit real or 32-bit protected mode.\r
114 @param[in] Mask The value with which to set the interrupt mask.\r
115 @param[in] EdgeLevel The value with which to set the edge/level mask.\r
116\r
117 @retval EFI_SUCCESS The mode was set successfully.\r
118 @retval EFI_INVALID_PARAMETER The mode was not set.\r
119\r
120**/\r
1166d068 121EFI_STATUS\r
122EFIAPI\r
123Interrupt8259SetMode (\r
90b8b0ec 124 IN EFI_LEGACY_8259_PROTOCOL *This,\r
125 IN EFI_8259_MODE Mode,\r
126 IN UINT16 *Mask, OPTIONAL\r
127 IN UINT16 *EdgeLevel OPTIONAL\r
128 );\r
1166d068 129\r
24115e44
ED
130/**\r
131 Translates the IRQ into a vector.\r
132\r
133 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
134 @param[in] Irq IRQ0-IRQ15.\r
135 @param[out] Vector The vector that is assigned to the IRQ.\r
136\r
137 @retval EFI_SUCCESS The Vector that matches Irq was returned.\r
138 @retval EFI_INVALID_PARAMETER Irq is not valid.\r
139\r
140**/\r
1166d068 141EFI_STATUS\r
142EFIAPI\r
143Interrupt8259GetVector (\r
144 IN EFI_LEGACY_8259_PROTOCOL *This,\r
145 IN EFI_8259_IRQ Irq,\r
146 OUT UINT8 *Vector\r
90b8b0ec 147 );\r
1166d068 148\r
24115e44
ED
149/**\r
150 Enables the specified IRQ.\r
151\r
152 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
153 @param[in] Irq IRQ0-IRQ15.\r
154 @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.\r
155\r
156 @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.\r
157 @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
158\r
159**/\r
1166d068 160EFI_STATUS\r
161EFIAPI\r
162Interrupt8259EnableIrq (\r
90b8b0ec 163 IN EFI_LEGACY_8259_PROTOCOL *This,\r
164 IN EFI_8259_IRQ Irq,\r
165 IN BOOLEAN LevelTriggered\r
166 );\r
1166d068 167\r
24115e44
ED
168/**\r
169 Disables the specified IRQ.\r
170\r
171 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
172 @param[in] Irq IRQ0-IRQ15.\r
173\r
174 @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.\r
175 @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
176\r
177**/\r
1166d068 178EFI_STATUS\r
179EFIAPI\r
180Interrupt8259DisableIrq (\r
90b8b0ec 181 IN EFI_LEGACY_8259_PROTOCOL *This,\r
182 IN EFI_8259_IRQ Irq\r
183 );\r
1166d068 184\r
24115e44
ED
185/**\r
186 Reads the PCI configuration space to get the interrupt number that is assigned to the card.\r
187\r
188 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
189 @param[in] PciHandle PCI function for which to return the vector.\r
190 @param[out] Vector IRQ number that corresponds to the interrupt line.\r
191\r
192 @retval EFI_SUCCESS The interrupt line value was read successfully.\r
193\r
194**/\r
1166d068 195EFI_STATUS\r
196EFIAPI\r
197Interrupt8259GetInterruptLine (\r
198 IN EFI_LEGACY_8259_PROTOCOL *This,\r
199 IN EFI_HANDLE PciHandle,\r
200 OUT UINT8 *Vector\r
90b8b0ec 201 );\r
1166d068 202\r
24115e44
ED
203/**\r
204 Issues the End of Interrupt (EOI) commands to PICs.\r
205\r
206 @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
207 @param[in] Irq The interrupt for which to issue the EOI command.\r
208\r
209 @retval EFI_SUCCESS The EOI command was issued.\r
210 @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
211\r
212**/\r
1166d068 213EFI_STATUS\r
214EFIAPI\r
215Interrupt8259EndOfInterrupt (\r
216 IN EFI_LEGACY_8259_PROTOCOL *This,\r
217 IN EFI_8259_IRQ Irq\r
90b8b0ec 218 );\r
1166d068 219\r
220#endif\r