projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9b6bbcdb MK |
1 | /** @file\r |
| 2 | Registers definition for Intel QuarkNcSocId.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2013-2015 Intel Corporation.\r | |
| 5 | \r | |
| c9f231d0 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 9b6bbcdb MK |
7 | \r |
| 8 | **/\r | |
| 9 | \r | |
| 10 | #ifndef __INTEL_QNC_REGS_H__\r | |
| 11 | #define __INTEL_QNC_REGS_H__\r | |
| 12 | \r | |
| 13 | #include <QNCAccess.h>\r | |
| 14 | \r | |
| 15 | //\r | |
| 16 | // PCI HostBridge Segment number\r | |
| 17 | //\r | |
| 18 | #define QNC_PCI_HOST_BRIDGE_SEGMENT_NUMBER 0\r | |
| 19 | \r | |
| 20 | //\r | |
| 21 | // PCI RootBridge resource allocation's attribute\r | |
| 22 | //\r | |
| 23 | #define QNC_PCI_ROOT_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTE \\r | |
| 24 | EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM\r | |
| 25 | \r | |
| 26 | //\r | |
| 27 | // PCI HostBridge resource appeture\r | |
| 28 | //\r | |
| 29 | #define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSBASE 0x0\r | |
| 30 | #define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSLIMIT 0xff\r | |
| 31 | #define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_TSEG_SIZE 0x10000000\r | |
| 32 | \r | |
| 33 | //\r | |
| 34 | // PCI RootBridge configure port\r | |
| 35 | //\r | |
| 36 | #define QNC_PCI_ROOT_BRIDGE_CONFIGURATION_ADDRESS_PORT 0xCF8\r | |
| 37 | #define QNC_PCI_ROOT_BRIDGE_CONFIGURATION_DATA_PORT 0xCFC\r | |
| 38 | \r | |
| 39 | //\r | |
| 40 | // PCI Rootbridge's support feature\r | |
| 41 | //\r | |
| 42 | #define QNC_PCI_ROOT_BRIDGE_SUPPORTED (EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | \\r | |
| 43 | EFI_PCI_ATTRIBUTE_ISA_IO | \\r | |
| 44 | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO | \\r | |
| 45 | EFI_PCI_ATTRIBUTE_VGA_MEMORY | \\r | |
| 46 | EFI_PCI_ATTRIBUTE_VGA_IO)\r | |
| 47 | \r | |
| 48 | #endif // __INTEL_QNC_REGS_H__\r |