QuarkSocPkg: Add new package for Quark SoC X1000

[mirror_edk2.git] / QuarkSocPkg / QuarkNorthCluster / Include / Library / IntelQNCLib.h

/** @file\r
Library that provides QNC specific library services in PEI phase\r
\r
Copyright (c) 2013-2015 Intel Corporation.\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef __INTEL_QNC_LIB_H__\r
#define __INTEL_QNC_LIB_H__\r
\r
/**\r
  This function initializes the QNC register before MRC.\r
  It sets RCBA, PMBASE, disable Watchdog timer and initialize QNC GPIO.\r
  If the function cannot complete it'll ASSERT().\r
**/\r
VOID\r
EFIAPI\r
PeiQNCPreMemInit (\r
  VOID\r
  );\r
\r
\r
/**\r
  Used to check SCH if it's S3 state.  Clear the register state after query.\r
\r
  @retval TRUE if it's S3 state.\r
  @retval FALSE if it's not S3 state.\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
QNCCheckS3AndClearState (\r
   VOID\r
  );\r
\r
/**\r
  Used to check SCH if system wakes up from power on reset. Clear the register state after query.\r
\r
  @retval TRUE  if system wakes up from power on reset\r
  @retval FALSE if system does not wake up from power on reset\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
QNCCheckPowerOnResetAndClearState (\r
   VOID\r
  );\r
\r
/**\r
  This function is used to clear SMI and wake status.\r
\r
**/\r
VOID\r
EFIAPI\r
QNCClearSmiAndWake (\r
  VOID\r
  );\r
\r
/**\r
  Used to initialize the QNC register after MRC.\r
\r
**/\r
VOID\r
EFIAPI\r
PeiQNCPostMemInit (\r
  VOID\r
  );\r
\r
/** Send DRAM Ready opcode.\r
\r
  @param[in]       OpcodeParam  Parameter to DRAM ready opcode.\r
\r
  @retval          VOID\r
**/\r
VOID\r
EFIAPI\r
QNCSendOpcodeDramReady (\r
  IN UINT32   OpcodeParam\r
  );\r
\r
/**\r
\r
  Relocate RMU Main binary to memory after MRC to improve performance.\r
\r
  @param[in]  DestBaseAddress  - Specify the new memory address for the RMU Main binary.\r
  @param[in]  SrcBaseAddress   - Specify the current memory address for the RMU Main binary.\r
  @param[in]  Size             - Specify size of the RMU Main binary.\r
\r
  @retval     VOID\r
\r
**/\r
VOID\r
EFIAPI\r
RmuMainRelocation (\r
  IN CONST UINT32   DestBaseAddress,\r
  IN CONST UINT32   SrcBaseAddress,\r
  IN CONST UINTN    Size\r
  );\r
\r
/**\r
  Get the total memory size\r
\r
**/\r
UINT32\r
EFIAPI\r
QNCGetTotalMemorysize (\r
  VOID\r
  );\r
\r
/**\r
  Get the memory range of TSEG.\r
  The TSEG's memory is below TOLM.\r
\r
  @param[out] BaseAddress The base address of TSEG's memory range\r
  @param[out] MemorySize  The size of TSEG's memory range\r
\r
**/\r
VOID\r
EFIAPI\r
QNCGetTSEGMemoryRange (\r
  OUT UINT64  *BaseAddress,\r
  OUT UINT64  *MemorySize\r
  );\r
\r
/**\r
  Updates the PAM registers in the MCH for the requested range and mode.\r
\r
  @param   Start        The start address of the memory region\r
  @param   Length       The length, in bytes, of the memory region\r
  @param   ReadEnable   Pointer to the boolean variable on whether to enable read for legacy memory section.\r
                        If NULL, then read attribute will not be touched by this call.\r
  @param   ReadEnable   Pointer to the boolean variable on whether to enable write for legacy memory section.\r
                        If NULL, then write attribute will not be touched by this call.\r
  @param   Granularity  A pointer to granularity, in bytes, that the PAM registers support\r
\r
  @retval  RETURN_SUCCESS            The PAM registers in the MCH were updated\r
  @retval  RETURN_INVALID_PARAMETER  The memory range is not valid in legacy region.\r
\r
**/\r
RETURN_STATUS\r
EFIAPI\r
QNCLegacyRegionManipulation (\r
  IN  UINT32                  Start,\r
  IN  UINT32                  Length,\r
  IN  BOOLEAN                 *ReadEnable,\r
  IN  BOOLEAN                 *WriteEnable,\r
  OUT UINT32                  *Granularity\r
  );\r
\r
/**\r
  Do early init of pci express rootports on Soc.\r
\r
**/\r
VOID\r
EFIAPI\r
PciExpressEarlyInit (\r
  VOID\r
  );\r
\r
/**\r
  Complete initialization of all the pci express rootports on Soc.\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciExpressInit (\r
  );\r
\r
/**\r
  Determine if QNC is supported.\r
\r
  @retval FALSE  QNC is not supported.\r
  @retval TRUE   QNC is supported.\r
**/\r
BOOLEAN\r
EFIAPI\r
IsQncSupported (\r
  VOID\r
  );\r
\r
/**\r
  Get the DeviceId of the SoC\r
\r
  @retval PCI DeviceId of the SoC\r
**/\r
UINT16\r
EFIAPI\r
QncGetSocDeviceId (\r
  VOID\r
  );\r
\r
/**\r
  Enable SMI detection of legacy flash access violations.\r
**/\r
VOID\r
EFIAPI\r
QncEnableLegacyFlashAccessViolationSmi (\r
  VOID\r
  );\r
\r
/**\r
  Setup RMU Thermal sensor registers for Vref mode.\r
**/\r
VOID\r
EFIAPI\r
QNCThermalSensorSetVRefMode (\r
  VOID\r
  );\r
\r
/**\r
  Setup RMU Thermal sensor registers for Ratiometric mode.\r
**/\r
VOID\r
EFIAPI\r
QNCThermalSensorSetRatiometricMode (\r
  VOID\r
  );\r
\r
/**\r
  Setup RMU Thermal sensor trip point values.\r
\r
  @param[in]  CatastrophicTripOnDegreesCelsius  - Catastrophic set trip point threshold.\r
  @param[in]  HotTripOnDegreesCelsius           - Hot set trip point threshold.\r
  @param[in]  HotTripOffDegreesCelsius          - Hot clear trip point threshold.\r
\r
  @retval     VOID\r
**/\r
EFI_STATUS\r
EFIAPI\r
QNCThermalSensorSetTripValues (\r
  IN  CONST UINTN             CatastrophicTripOnDegreesCelsius,\r
  IN  CONST UINTN             HotTripOnDegreesCelsius,\r
  IN  CONST UINTN             HotTripOffDegreesCelsius\r
  );\r
\r
/**\r
  Enable RMU Thermal sensor with a Catastrophic Trip point.\r
\r
  @retval  EFI_SUCCESS            Trip points setup.\r
  @retval  EFI_INVALID_PARAMETER  Invalid trip point value.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
QNCThermalSensorEnableWithCatastrophicTrip (\r
  IN  CONST UINTN             CatastrophicTripOnDegreesCelsius\r
  );\r
\r
/**\r
  Lock all RMU Thermal sensor control & trip point registers.\r
\r
**/\r
VOID\r
EFIAPI\r
QNCThermalSensorLockAllRegisters (\r
  VOID\r
  );\r
\r
/**\r
  Set chipset policy for double bit ECC error.\r
\r
  @param[in]       PolicyValue  Policy to config on double bit ECC error.\r
\r
**/\r
VOID\r
EFIAPI\r
QNCPolicyDblEccBitErr (\r
  IN  CONST UINT32                        PolicyValue\r
  );\r
\r
/**\r
  Determine if running on secure Quark hardware Sku.\r
\r
  @retval FALSE  Base Quark Sku or unprovisioned Secure Sku running.\r
  @retval TRUE   Provisioned SecureSku hardware running.\r
**/\r
BOOLEAN\r
EFIAPI\r
QncIsSecureProvisionedSku (\r
  VOID\r
  );\r
#endif\r
\r