projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9b6bbcdb MK |
1 | /** @file\r |
| 2 | Common definitions and compilation switches for MRC\r | |
| 3 | \r | |
| 4 | Copyright (c) 2013-2015 Intel Corporation.\r | |
| 5 | \r | |
| 6 | This program and the accompanying materials\r | |
| 7 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 8 | which accompanies this distribution. The full text of the license may be found at\r | |
| 9 | http://opensource.org/licenses/bsd-license.php\r | |
| 10 | \r | |
| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | \r | |
| 14 | **/\r | |
| 15 | #ifndef __MEMORY_OPTIONS_H\r | |
| 16 | #define __MEMORY_OPTIONS_H\r | |
| 17 | \r | |
| 18 | #include "core_types.h"\r | |
| 19 | \r | |
| 20 | // MRC COMPILE TIME SWITCHES:\r | |
| 21 | // ==========================\r | |
| 22 | \r | |
| 23 | \r | |
| 24 | \r | |
| 25 | //#define MRC_SV // enable some validation opitons\r | |
| 26 | \r | |
| 27 | #if defined (SIM) || defined(EMU)\r | |
| 28 | #define QUICKSIM // reduce execution time using shorter rd/wr sequences\r | |
| 29 | #endif\r | |
| 30 | \r | |
| 31 | #define CLT // required for Quark project\r | |
| 32 | \r | |
| 33 | \r | |
| 34 | \r | |
| 35 | //#define BACKUP_RCVN // enable STATIC timing settings for RCVN (BACKUP_MODE)\r | |
| 36 | //#define BACKUP_WDQS // enable STATIC timing settings for WDQS (BACKUP_MODE)\r | |
| 37 | //#define BACKUP_RDQS // enable STATIC timing settings for RDQS (BACKUP_MODE)\r | |
| 38 | //#define BACKUP_WDQ // enable STATIC timing settings for WDQ (BACKUP_MODE)\r | |
| 39 | \r | |
| 40 | \r | |
| 41 | \r | |
| 42 | //#define BACKUP_COMPS // enable *COMP overrides (BACKUP_MODE)\r | |
| 43 | //#define RX_EYE_CHECK // enable the RD_TRAIN eye check\r | |
| 44 | #define HMC_TEST // enable Host to Memory Clock Alignment\r | |
| 45 | #define R2R_SHARING // enable multi-rank support via rank2rank sharing\r | |
| 46 | \r | |
| 47 | #define FORCE_16BIT_DDRIO // disable signals not used in 16bit mode of DDRIO\r | |
| 48 | \r | |
| 49 | \r | |
| 50 | \r | |
| 51 | //\r | |
| 52 | // Debug support\r | |
| 53 | //\r | |
| 54 | \r | |
| 55 | #ifdef NDEBUG\r | |
| 56 | #define DPF if(0) dpf\r | |
| 57 | #else\r | |
| 58 | #define DPF dpf\r | |
| 59 | #endif\r | |
| 60 | \r | |
| 61 | void dpf( uint32_t mask, char_t *bla, ...);\r | |
| 62 | \r | |
| 63 | \r | |
| 64 | uint8_t mgetc(void);\r | |
| 65 | uint8_t mgetch(void);\r | |
| 66 | \r | |
| 67 | \r | |
| 68 | // Debug print type\r | |
| 69 | #define D_ERROR 0x0001\r | |
| 70 | #define D_INFO 0x0002\r | |
| 71 | #define D_REGRD 0x0004\r | |
| 72 | #define D_REGWR 0x0008\r | |
| 73 | #define D_FCALL 0x0010\r | |
| 74 | #define D_TRN 0x0020\r | |
| 75 | #define D_TIME 0x0040\r | |
| 76 | \r | |
| 77 | #define ENTERFN() DPF(D_FCALL, "<%s>\n", __FUNCTION__)\r | |
| 78 | #define LEAVEFN() DPF(D_FCALL, "</%s>\n", __FUNCTION__)\r | |
| 79 | #define REPORTFN() DPF(D_FCALL, "<%s/>\n", __FUNCTION__)\r | |
| 80 | \r | |
| 81 | extern uint32_t DpfPrintMask;\r | |
| 82 | \r | |
| 83 | #endif\r |