projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9b6bbcdb MK |
1 | /** @file\r |
| 2 | \r | |
| 3 | PCH SPI SMM Driver implements the SPI Host Controller Compatibility Interface.\r | |
| 4 | \r | |
| 5 | Copyright (c) 2013-2015 Intel Corporation.\r | |
| 6 | \r | |
| c9f231d0 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 9b6bbcdb MK |
8 | \r |
| 9 | \r | |
| 10 | **/\r | |
| 11 | #include "PchSpi.h"\r | |
| 12 | \r | |
| 13 | SPI_INSTANCE *mSpiInstance;\r | |
| 14 | \r | |
| 15 | CONST UINT32 mSpiRegister[] = {\r | |
| 16 | R_QNC_RCRB_SPIS,\r | |
| 17 | R_QNC_RCRB_SPIPREOP,\r | |
| 18 | R_QNC_RCRB_SPIOPMENU,\r | |
| 19 | R_QNC_RCRB_SPIOPMENU + 4\r | |
| 20 | };\r | |
| 21 | \r | |
| 22 | EFI_STATUS\r | |
| 23 | EFIAPI\r | |
| 24 | InstallPchSpi (\r | |
| 25 | IN EFI_HANDLE ImageHandle,\r | |
| 26 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
| 27 | )\r | |
| 28 | /*++\r | |
| 29 | \r | |
| 30 | Routine Description:\r | |
| 31 | \r | |
| 32 | Entry point for the SPI host controller driver.\r | |
| 33 | \r | |
| 34 | Arguments:\r | |
| 35 | \r | |
| 36 | ImageHandle Image handle of this driver.\r | |
| 37 | SystemTable Global system service table.\r | |
| 38 | \r | |
| 39 | Returns:\r | |
| 40 | \r | |
| 41 | EFI_SUCCESS Initialization complete.\r | |
| 42 | EFI_UNSUPPORTED The chipset is unsupported by this driver.\r | |
| 43 | EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.\r | |
| 44 | EFI_DEVICE_ERROR Device error, driver exits abnormally.\r | |
| 45 | \r | |
| 46 | --*/\r | |
| 47 | {\r | |
| 48 | EFI_STATUS Status;\r | |
| 49 | \r | |
| 50 | //\r | |
| 51 | // Allocate pool for SPI protocol instance\r | |
| 52 | //\r | |
| 53 | Status = gSmst->SmmAllocatePool (\r | |
| 54 | EfiRuntimeServicesData, // MemoryType don't care\r | |
| 55 | sizeof (SPI_INSTANCE),\r | |
| 56 | (VOID **) &mSpiInstance\r | |
| 57 | );\r | |
| 58 | if (EFI_ERROR (Status)) {\r | |
| 59 | return Status;\r | |
| 60 | }\r | |
| 61 | if (mSpiInstance == NULL) {\r | |
| 62 | return EFI_OUT_OF_RESOURCES;\r | |
| 63 | }\r | |
| 64 | ZeroMem ((VOID *) mSpiInstance, sizeof (SPI_INSTANCE));\r | |
| 65 | //\r | |
| 66 | // Initialize the SPI protocol instance\r | |
| 67 | //\r | |
| 68 | Status = SpiProtocolConstructor (mSpiInstance);\r | |
| 69 | if (EFI_ERROR (Status)) {\r | |
| 70 | return Status;\r | |
| 71 | }\r | |
| 72 | \r | |
| 73 | //\r | |
| 74 | // Install the SMM EFI_SPI_PROTOCOL interface\r | |
| 75 | //\r | |
| 76 | Status = gSmst->SmmInstallProtocolInterface (\r | |
| 77 | &(mSpiInstance->Handle),\r | |
| 78 | &gEfiSmmSpiProtocolGuid,\r | |
| 79 | EFI_NATIVE_INTERFACE,\r | |
| 80 | &(mSpiInstance->SpiProtocol)\r | |
| 81 | );\r | |
| 82 | if (EFI_ERROR (Status)) {\r | |
| 83 | gSmst->SmmFreePool (mSpiInstance);\r | |
| 84 | return EFI_DEVICE_ERROR;\r | |
| 85 | }\r | |
| 86 | \r | |
| 87 | return EFI_SUCCESS;\r | |
| 88 | }\r | |
| 89 | \r | |
| 90 | VOID\r | |
| 91 | EFIAPI\r | |
| 92 | SpiPhaseInit (\r | |
| 93 | VOID\r | |
| 94 | )\r | |
| 95 | /*++\r | |
| 96 | Routine Description:\r | |
| 97 | \r | |
| 98 | This function is a a hook for Spi Smm phase specific initialization\r | |
| 99 | \r | |
| 100 | Arguments:\r | |
| 101 | \r | |
| 102 | None\r | |
| 103 | \r | |
| 104 | Returns:\r | |
| 105 | \r | |
| 106 | None\r | |
| 107 | \r | |
| 108 | --*/\r | |
| 109 | {\r | |
| 110 | UINTN Index;\r | |
| 111 | \r | |
| 112 | //\r | |
| 113 | // Save SPI Registers for S3 resume usage\r | |
| 114 | //\r | |
| 115 | for (Index = 0; Index < sizeof (mSpiRegister) / sizeof (UINT32); Index++) {\r | |
| 116 | S3BootScriptSaveMemWrite (\r | |
| 117 | S3BootScriptWidthUint32,\r | |
| 118 | (UINTN) (mSpiInstance->PchRootComplexBar + mSpiRegister[Index]),\r | |
| 119 | 1,\r | |
| 120 | (VOID *) (UINTN) (mSpiInstance->PchRootComplexBar + mSpiRegister[Index])\r | |
| 121 | );\r | |
| 122 | }\r | |
| 123 | }\r |