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1/** @file\r
2\r
3Interface definition for EFI_SD_HOST_IO_PROTOCOL.\r
4\r
5Copyright (c) 2013-2015 Intel Corporation.\r
6\r
c9f231d0 7SPDX-License-Identifier: BSD-2-Clause-Patent\r
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MK
8\r
9**/\r
10\r
11#ifndef _SD_HOST_IO_H\r
12#define _SD_HOST_IO_H\r
13\r
14#include "SDCard.h"\r
15#include "CEATA.h"\r
16\r
17\r
18#define EFI_SD_HOST_IO_PROTOCOL_GUID \\r
19 { \\r
20 0xb63f8ec7, 0xa9c9, 0x4472, {0xa4, 0xc0, 0x4d, 0x8b, 0xf3, 0x65, 0xcc, 0x51} \\r
21 }\r
22\r
23///\r
24/// Forward reference for pure ANSI compatability\r
25///\r
26typedef struct _EFI_SD_HOST_IO_PROTOCOL EFI_SD_HOST_IO_PROTOCOL;\r
27\r
28\r
29\r
30typedef enum {\r
31 ResponseNo = 0,\r
32 ResponseR1,\r
33 ResponseR1b,\r
34 ResponseR2,\r
35 ResponseR3,\r
36 ResponseR4,\r
37 ResponseR5,\r
38 ResponseR5b,\r
39 ResponseR6,\r
40 ResponseR7\r
41}RESPONSE_TYPE;\r
42\r
43typedef enum {\r
44 NoData = 0,\r
45 InData,\r
46 OutData\r
47}TRANSFER_TYPE;\r
48\r
49typedef enum {\r
50 Reset_Auto = 0,\r
51 Reset_DAT,\r
52 Reset_CMD,\r
53 Reset_DAT_CMD,\r
54 Reset_All\r
55}RESET_TYPE;\r
56\r
57#define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05\r
58#define PCI_IF_STANDARD_HOST_NO_DMA 0x00\r
59#define PCI_IF_STANDARD_HOST_SUPPORT_DMA 0x01\r
60\r
61#define SDHCI_SPEC_100 0\r
62#define SDHCI_SPEC_200 1\r
63#define SDHCI_SPEC_300 2\r
64\r
65//\r
66//MMIO Registers definition for MMC/SDIO controller\r
67//\r
68#define MMIO_DMAADR 0x00\r
69#define MMIO_BLKSZ 0x04\r
70#define MMIO_BLKCNT 0x06\r
71#define MMIO_CMDARG 0x08\r
72#define MMIO_XFRMODE 0x0C\r
73#define MMIO_SDCMD 0x0E\r
74#define MMIO_RESP 0x10\r
75#define MMIO_BUFDATA 0x20\r
76#define MMIO_PSTATE 0x24\r
77#define MMIO_HOSTCTL 0x28\r
78#define MMIO_PWRCTL 0x29\r
79#define MMIO_BLKGAPCTL 0x2A\r
80#define MMIO_WAKECTL 0x2B\r
81#define MMIO_CLKCTL 0x2C\r
82#define V_MMIO_CLKCTL_MAX_8BIT_FREQ_SEL 0x80\r
83#define V_MMIO_CLKCTL_MAX_10BIT_FREQ_SEL 0x3FF\r
84#define B_MMIO_CLKCTL_UPR_SDCLK_FREQ_SEL_MASK 0xC0\r
85\r
86#define MMIO_TOCTL 0x2E\r
87#define MMIO_SWRST 0x2F\r
88#define MMIO_NINTSTS 0x30\r
89#define MMIO_ERINTSTS 0x32\r
90#define MMIO_NINTEN 0x34\r
91#define MMIO_ERINTEN 0x36\r
92#define MMIO_NINTSIGEN 0x38\r
93#define MMIO_ERINTSIGEN 0x3A\r
94#define MMIO_AC12ERRSTS 0x3C\r
95#define MMIO_HOSTCTL2 0x3E\r
96#define MMIO_CAP 0x40\r
97#define MMIO_MCCAP 0x48\r
98#define MMIO_SLTINTSTS 0xFC\r
99#define MMIO_CTRLRVER 0xFE\r
100#define MMIO_SRST 0x1FC\r
101\r
102//\r
103// Protocol definitions\r
104//\r
105\r
106/**\r
107 The main function used to send the command to the card inserted into the SD host slot.\r
108 It will assemble the arguments to set the command register and wait for the command\r
109 and transfer completed until timeout. Then it will read the response register to fill\r
110 the ResponseData.\r
111\r
112 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
113 @param CommandIndex The command index to set the command index field of command register.\r
114 @param Argument Command argument to set the argument field of command register.\r
115 @param DataType TRANSFER_TYPE, indicates no data, data in or data out.\r
116 @param Buffer Contains the data read from / write to the device.\r
117 @param BufferSize The size of the buffer.\r
118 @param ResponseType RESPONSE_TYPE.\r
119 @param TimeOut Time out value in 1 ms unit.\r
120 @param ResponseData Depending on the ResponseType, such as CSD or card status.\r
121\r
122 @retval EFI_SUCCESS\r
123 @retval EFI_INVALID_PARAMETER\r
124 @retval EFI_OUT_OF_RESOURCES\r
125 @retval EFI_TIMEOUT\r
126 @retval EFI_DEVICE_ERROR\r
127\r
128**/\r
129\r
130typedef\r
131EFI_STATUS\r
132(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND) (\r
133 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
134 IN UINT16 CommandIndex,\r
135 IN UINT32 Argument,\r
136 IN TRANSFER_TYPE DataType,\r
137 IN UINT8 *Buffer, OPTIONAL\r
138 IN UINT32 BufferSize,\r
139 IN RESPONSE_TYPE ResponseType,\r
140 IN UINT32 TimeOut,\r
141 OUT UINT32 *ResponseData OPTIONAL\r
142 );\r
143\r
144/**\r
145 Set max clock frequency of the host, the actual frequency may not be the same as MaxFrequency.\r
146 It depends on the max frequency the host can support, divider, and host speed mode.\r
147\r
148 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
149 @param MaxFrequency Max frequency in HZ.\r
150\r
151 @retval EFI_SUCCESS\r
152 @retval EFI_TIMEOUT\r
153\r
154**/\r
155\r
156typedef\r
157EFI_STATUS\r
158(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY) (\r
159 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
160 IN UINT32 MaxFrequency\r
161 );\r
162\r
163\r
164/**\r
165 Set bus width of the host controller\r
166\r
167 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
168 @param BusWidth Bus width in 1, 4, 8 bits.\r
169\r
170 @retval EFI_SUCCESS\r
171 @retval EFI_INVALID_PARAMETER\r
172\r
173**/\r
174\r
175typedef\r
176EFI_STATUS\r
177(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH) (\r
178 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
179 IN UINT32 BusWidth\r
180 );\r
181\r
182/**\r
183 Set voltage which could supported by the host controller.\r
184 Support 0(Power off the host), 1.8V, 3.0V, 3.3V\r
185\r
186 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
187 @param Voltage Units in 0.1 V.\r
188\r
189 @retval EFI_SUCCESS\r
190 @retval EFI_INVALID_PARAMETER\r
191\r
192**/\r
193\r
194typedef\r
195EFI_STATUS\r
196(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE) (\r
197 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
198 IN UINT32 Voltage\r
199 );\r
200\r
201/**\r
202 Reset the host controller.\r
203\r
204 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
205 @param ResetAll TRUE to reset all.\r
206\r
207 @retval EFI_SUCCESS\r
208 @retval EFI_TIMEOUT\r
209\r
210**/\r
211\r
212typedef\r
213EFI_STATUS\r
214(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST) (\r
215 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
216 IN RESET_TYPE ResetType\r
217 );\r
218\r
219/**\r
220 Enable auto stop on the host controller.\r
221\r
222 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
223 @param Enable TRUE to enable, FALSE to disable.\r
224\r
225 @retval EFI_SUCCESS\r
226 @retval EFI_TIMEOUT\r
227\r
228**/\r
229\r
230typedef\r
231EFI_STATUS\r
232(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD) (\r
233 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
234 IN BOOLEAN Enable\r
235 );\r
236\r
237/**\r
238 Find whether these is a card inserted into the slot. If so init the host.\r
239 If not, return EFI_NOT_FOUND.\r
240\r
241 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
242\r
243 @retval EFI_SUCCESS\r
244 @retval EFI_NOT_FOUND\r
245\r
246**/\r
247\r
248typedef\r
249EFI_STATUS\r
250(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST) (\r
251 IN EFI_SD_HOST_IO_PROTOCOL *This\r
252 );\r
253\r
254/**\r
255 Set the Block length on the host controller.\r
256\r
257 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
258 @param BlockLength card supportes block length.\r
259\r
260 @retval EFI_SUCCESS\r
261 @retval EFI_TIMEOUT\r
262\r
263**/\r
264\r
265typedef\r
266EFI_STATUS\r
267(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH) (\r
268 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
269 IN UINT32 BlockLength\r
270 );\r
271\r
272/**\r
273 Enable/Disable High Speed transfer mode\r
274\r
275 @param This A pointer to the EFI_SD_HOST_IO_PROTOCOL instance.\r
276 @param Enable TRUE to Enable, FALSE to Disable\r
277\r
278 @return EFI_SUCCESS\r
279**/\r
280typedef\r
281EFI_STATUS\r
282(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_HIGH_SPEED_MODE) (\r
283 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
284 IN BOOLEAN Enable\r
285 );\r
286\r
287typedef\r
288EFI_STATUS\r
289(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_DUAL_DATARATE_MODE) (\r
290 IN EFI_SD_HOST_IO_PROTOCOL *This,\r
291 IN BOOLEAN Enable\r
292 );\r
293\r
294\r
295\r
296#define EFI_SD_HOST_IO_PROTOCOL_REVISION_01 0x02\r
297\r
298\r
299typedef struct {\r
300 UINT32 HighSpeedSupport: 1; //High speed supported\r
301 UINT32 V18Support: 1; //1.8V supported\r
302 UINT32 V30Support: 1; //3.0V supported\r
303 UINT32 V33Support: 1; //3.3V supported\r
304 UINT32 Reserved0: 4;\r
305 UINT32 HostVersion: 8;\r
306 UINT32 BusWidth4: 1; // 4 bit width\r
307 UINT32 BusWidth8: 1; // 8 bit width\r
308 UINT32 Reserved1: 14;\r
309 UINT32 BoundarySize;\r
310}HOST_CAPABILITY;\r
311\r
312\r
313//\r
314// Interface structure for the SD HOST I/O Protocol\r
315//\r
316struct _EFI_SD_HOST_IO_PROTOCOL {\r
317 UINT32 Revision;\r
318 HOST_CAPABILITY HostCapability;\r
319 EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND SendCommand;\r
320 EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY SetClockFrequency;\r
321 EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH SetBusWidth;\r
322 EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE SetHostVoltage;\r
323 EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST ResetSDHost;\r
324 EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD EnableAutoStopCmd;\r
325 EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST DetectCardAndInitHost;\r
326 EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH SetBlockLength;\r
327 EFI_SD_HOST_IO_PROTOCOL_HIGH_SPEED_MODE SetHighSpeedMode;\r
328 EFI_SD_HOST_IO_PROTOCOL_DUAL_DATARATE_MODE SetDDRMode;\r
329};\r
330\r
331extern EFI_GUID gEfiSDHostIoProtocolGuid;\r
332\r
333#endif\r