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1/** @file\r
2This file contains the definination for host controller memory\r
3management routines.\r
4\r
5Copyright (c) 2013-2015 Intel Corporation.\r
6\r
c9f231d0 7SPDX-License-Identifier: BSD-2-Clause-Patent\r
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8\r
9**/\r
10\r
11#ifndef _USB_HC_MEM_H_\r
12#define _USB_HC_MEM_H_\r
13\r
14#define USB_HC_BIT(a) ((UINTN)(1 << (a)))\r
15\r
16#define USB_HC_BIT_IS_SET(Data, Bit) \\r
17 ((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))\r
18\r
19#define USB_HC_HIGH_32BIT(Addr64) \\r
20 ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r
21\r
22typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;\r
23struct _USBHC_MEM_BLOCK {\r
24 UINT8 *Bits; // Bit array to record which unit is allocated\r
25 UINTN BitsLen;\r
26 UINT8 *Buf;\r
27 UINT8 *BufHost;\r
28 UINTN BufLen; // Memory size in bytes\r
29 VOID *Mapping;\r
30 USBHC_MEM_BLOCK *Next;\r
31};\r
32\r
33//\r
34// USBHC_MEM_POOL is used to manage the memory used by USB\r
35// host controller. EHCI requires the control memory and transfer\r
36// data to be on the same 4G memory.\r
37//\r
38typedef struct _USBHC_MEM_POOL {\r
39 EFI_PCI_IO_PROTOCOL *PciIo;\r
40 BOOLEAN Check4G;\r
41 UINT32 Which4G;\r
42 USBHC_MEM_BLOCK *Head;\r
43} USBHC_MEM_POOL;\r
44\r
45//\r
46// Memory allocation unit, must be 2^n, n>4\r
47//\r
48#define USBHC_MEM_UNIT 64\r
49\r
50#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)\r
51#define USBHC_MEM_DEFAULT_PAGES 16\r
52\r
53#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))\r
54\r
55//\r
56// Advance the byte and bit to the next bit, adjust byte accordingly.\r
57//\r
58#define NEXT_BIT(Byte, Bit) \\r
59 do { \\r
60 (Bit)++; \\r
61 if ((Bit) > 7) { \\r
62 (Byte)++; \\r
63 (Bit) = 0; \\r
64 } \\r
65 } while (0)\r
66\r
67\r
68\r
69/**\r
70 Initialize the memory management pool for the host controller.\r
71\r
72 @param PciIo The PciIo that can be used to access the host controller.\r
73 @param Check4G Whether the host controller requires allocated memory\r
74 from one 4G address space.\r
75 @param Which4G The 4G memory area each memory allocated should be from.\r
76\r
77 @retval EFI_SUCCESS The memory pool is initialized.\r
78 @retval EFI_OUT_OF_RESOURCE Fail to init the memory pool.\r
79\r
80**/\r
81USBHC_MEM_POOL *\r
82UsbHcInitMemPool (\r
83 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
84 IN BOOLEAN Check4G,\r
85 IN UINT32 Which4G\r
86 );\r
87\r
88\r
89/**\r
90 Release the memory management pool.\r
91\r
92 @param Pool The USB memory pool to free.\r
93\r
94 @retval EFI_SUCCESS The memory pool is freed.\r
95 @retval EFI_DEVICE_ERROR Failed to free the memory pool.\r
96\r
97**/\r
98EFI_STATUS\r
99UsbHcFreeMemPool (\r
100 IN USBHC_MEM_POOL *Pool\r
101 );\r
102\r
103\r
104/**\r
105 Allocate some memory from the host controller's memory pool\r
106 which can be used to communicate with host controller.\r
107\r
108 @param Pool The host controller's memory pool.\r
109 @param Size Size of the memory to allocate.\r
110\r
111 @return The allocated memory or NULL.\r
112\r
113**/\r
114VOID *\r
115UsbHcAllocateMem (\r
116 IN USBHC_MEM_POOL *Pool,\r
117 IN UINTN Size\r
118 );\r
119\r
120\r
121/**\r
122 Free the allocated memory back to the memory pool.\r
123\r
124 @param Pool The memory pool of the host controller.\r
125 @param Mem The memory to free.\r
126 @param Size The size of the memory to free.\r
127\r
128**/\r
129VOID\r
130UsbHcFreeMem (\r
131 IN USBHC_MEM_POOL *Pool,\r
132 IN VOID *Mem,\r
133 IN UINTN Size\r
134 );\r
135\r
136/**\r
137 Calculate the corresponding pci bus address according to the Mem parameter.\r
138\r
139 @param Pool The memory pool of the host controller.\r
140 @param Mem The pointer to host memory.\r
141 @param Size The size of the memory region.\r
142\r
143 @return the pci memory address\r
144**/\r
145EFI_PHYSICAL_ADDRESS\r
146UsbHcGetPciAddressForHostMem (\r
147 IN USBHC_MEM_POOL *Pool,\r
148 IN VOID *Mem,\r
149 IN UINTN Size\r
150 );\r
151\r
152#endif\r