[mirror_edk2.git] / SecurityPkg / Tcg / Opal / OpalPasswordSmm / OpalIdeMode.c

/** @file\r
  This driver is used for Opal Password Feature support at IDE mode.\r
\r
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "OpalPasswordSmm.h"\r
\r
/**\r
  Write multiple words of Data to the IDE Data port.\r
  Call the IO abstraction once to do the complete read,\r
  not one word at a time\r
\r
  @param  Port       IO port to read\r
  @param  Count      No. of UINT16's to read\r
  @param  Buffer     Pointer to the Data Buffer for read\r
\r
**/\r
VOID\r
EFIAPI\r
IdeWritePortWMultiple (\r
  IN  UINT16                Port,\r
  IN  UINTN                 Count,\r
  IN  UINT16                *Buffer\r
  )\r
{\r
  UINTN Index;\r
\r
  for (Index = 0; Index < Count; Index++) {\r
    IoWrite16 (Port, Buffer[Index]);\r
  }\r
}\r
\r
/**\r
  Reads multiple words of Data from the IDE Data port.\r
  Call the IO abstraction once to do the complete read,\r
  not one word at a time\r
\r
  @param  Port     IO port to read\r
  @param  Count    Number of UINT16's to read\r
  @param  Buffer   Pointer to the Data Buffer for read\r
\r
**/\r
VOID\r
EFIAPI\r
IdeReadPortWMultiple (\r
  IN  UINT16                Port,\r
  IN  UINTN                 Count,\r
  IN  UINT16                *Buffer\r
  )\r
{\r
  UINTN Index;\r
\r
  for (Index = 0; Index < Count; Index++) {\r
    Buffer[Count] = IoRead16 (Port);\r
  }\r
}\r
\r
/**\r
  This function is used to analyze the Status Register and print out\r
  some debug information and if there is ERR bit set in the Status\r
  Register, the Error Register's Value is also be parsed and print out.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
\r
**/\r
VOID\r
EFIAPI\r
DumpAllIdeRegisters (\r
  IN     EFI_IDE_REGISTERS        *IdeRegisters\r
  )\r
{\r
  ASSERT (IdeRegisters != NULL);\r
\r
  DEBUG_CODE_BEGIN ();\r
  if ((IoRead8 (IdeRegisters->CmdOrStatus) & ATA_STSREG_DWF) != 0) {\r
    DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Write Fault\n", IoRead8 (IdeRegisters->CmdOrStatus)));\r
  }\r
\r
  if ((IoRead8 (IdeRegisters->CmdOrStatus) & ATA_STSREG_CORR) != 0) {\r
    DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Corrected Data\n", IoRead8 (IdeRegisters->CmdOrStatus)));\r
  }\r
\r
  if ((IoRead8 (IdeRegisters->CmdOrStatus) & ATA_STSREG_ERR) != 0) {\r
    if ((IoRead8 (IdeRegisters->ErrOrFeature) & ATA_ERRREG_BBK) != 0) {\r
      DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Bad Block Detected\n", IoRead8 (IdeRegisters->ErrOrFeature)));\r
    }\r
\r
    if ((IoRead8 (IdeRegisters->ErrOrFeature) & ATA_ERRREG_UNC) != 0) {\r
      DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Uncorrectable Data\n", IoRead8 (IdeRegisters->ErrOrFeature)));\r
    }\r
\r
    if ((IoRead8 (IdeRegisters->ErrOrFeature) & ATA_ERRREG_MC) != 0) {\r
      DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Media Change\n", IoRead8 (IdeRegisters->ErrOrFeature)));\r
    }\r
\r
    if ((IoRead8 (IdeRegisters->ErrOrFeature) & ATA_ERRREG_ABRT) != 0) {\r
      DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Abort\n", IoRead8 (IdeRegisters->ErrOrFeature)));\r
    }\r
\r
    if ((IoRead8 (IdeRegisters->ErrOrFeature) & ATA_ERRREG_TK0NF) != 0) {\r
      DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Track 0 Not Found\n", IoRead8 (IdeRegisters->ErrOrFeature)));\r
    }\r
\r
    if ((IoRead8 (IdeRegisters->ErrOrFeature) & ATA_ERRREG_AMNF) != 0) {\r
      DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Address Mark Not Found\n", IoRead8 (IdeRegisters->ErrOrFeature)));\r
    }\r
  }\r
  DEBUG_CODE_END ();\r
}\r
\r
/**\r
  This function is used to analyze the Status Register and print out\r
  some debug information and if there is ERR bit set in the Status\r
  Register, the Error Register's Value is also be parsed and print out.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
\r
  @retval EFI_SUCCESS       No err information in the Status Register.\r
  @retval EFI_DEVICE_ERROR  Any err information in the Status Register.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CheckStatusRegister (\r
  IN  EFI_IDE_REGISTERS        *IdeRegisters\r
  )\r
{\r
  EFI_STATUS      Status;\r
  UINT8           StatusRegister;\r
\r
  ASSERT (IdeRegisters != NULL);\r
\r
  StatusRegister = IoRead8 (IdeRegisters->CmdOrStatus);\r
\r
  if ((StatusRegister & (ATA_STSREG_ERR | ATA_STSREG_DWF | ATA_STSREG_CORR)) == 0) {\r
    Status = EFI_SUCCESS;\r
  } else {\r
    Status = EFI_DEVICE_ERROR;\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  This function is used to poll for the DRQ bit clear in the Status\r
  Register. DRQ is cleared when the device is finished transferring Data.\r
  So this function is called after Data transfer is finished.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
  @param Timeout          The time to complete the command.\r
\r
  @retval EFI_SUCCESS     DRQ bit clear within the time out.\r
  @retval EFI_TIMEOUT     DRQ bit not clear within the time out.\r
\r
  @note\r
  Read Status Register will clear interrupt status.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
DRQClear (\r
  IN  EFI_IDE_REGISTERS         *IdeRegisters,\r
  IN  UINT64                    Timeout\r
  )\r
{\r
  UINT32  Delay;\r
  UINT8   StatusRegister;\r
\r
  ASSERT (IdeRegisters != NULL);\r
\r
  Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);\r
  do {\r
    StatusRegister = IoRead8 (IdeRegisters->CmdOrStatus);\r
\r
    //\r
    // wait for BSY == 0 and DRQ == 0\r
    //\r
    if ((StatusRegister & ATA_STSREG_BSY) == 0) {\r
\r
      if ((StatusRegister & ATA_STSREG_DRQ) == ATA_STSREG_DRQ) {\r
        return EFI_DEVICE_ERROR;\r
      } else {\r
        return EFI_SUCCESS;\r
      }\r
    }\r
\r
    //\r
    //  Stall for 100 microseconds.\r
    //\r
    MicroSecondDelay (100);\r
\r
    Delay--;\r
\r
  } while (Delay > 0);\r
\r
    return EFI_TIMEOUT;\r
}\r
/**\r
  This function is used to poll for the DRQ bit clear in the Alternate\r
  Status Register. DRQ is cleared when the device is finished\r
  transferring Data. So this function is called after Data transfer\r
  is finished.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
  @param Timeout          The time to complete the command.\r
\r
  @retval EFI_SUCCESS     DRQ bit clear within the time out.\r
\r
  @retval EFI_TIMEOUT     DRQ bit not clear within the time out.\r
  @note   Read Alternate Status Register will not clear interrupt status.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
DRQClear2 (\r
  IN  EFI_IDE_REGISTERS    *IdeRegisters,\r
  IN  UINT64               Timeout\r
  )\r
{\r
  UINT32  Delay;\r
  UINT8   AltRegister;\r
\r
  ASSERT (IdeRegisters != NULL);\r
\r
  Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);\r
  do {\r
    AltRegister = IoRead8 (IdeRegisters->AltOrDev);\r
\r
    //\r
    //  wait for BSY == 0 and DRQ == 0\r
    //\r
    if ((AltRegister & ATA_STSREG_BSY) == 0) {\r
      if ((AltRegister & ATA_STSREG_DRQ) == ATA_STSREG_DRQ) {\r
        return EFI_DEVICE_ERROR;\r
      } else {\r
        return EFI_SUCCESS;\r
      }\r
    }\r
\r
    //\r
    // Stall for 100 microseconds.\r
    //\r
    MicroSecondDelay (100);\r
\r
    Delay--;\r
\r
  } while (Delay > 0);\r
\r
  return EFI_TIMEOUT;\r
}\r
\r
\r
/**\r
  This function is used to poll for the DRQ bit set in the Alternate Status Register.\r
  DRQ is set when the device is ready to transfer Data. So this function is called after\r
  the command is sent to the device and before required Data is transferred.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
  @param Timeout          The time to complete the command.\r
\r
  @retval EFI_SUCCESS     DRQ bit set within the time out.\r
  @retval EFI_TIMEOUT     DRQ bit not set within the time out.\r
  @retval EFI_ABORTED     DRQ bit not set caused by the command abort.\r
  @note  Read Alternate Status Register will not clear interrupt status.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
DRQReady2 (\r
  IN  EFI_IDE_REGISTERS    *IdeRegisters,\r
  IN  UINT64               Timeout\r
  )\r
{\r
  UINT32  Delay;\r
  UINT8   AltRegister;\r
  UINT8   ErrorRegister;\r
\r
  ASSERT (IdeRegisters != NULL);\r
\r
  Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);\r
\r
  do {\r
    //\r
    //  Read Alternate Status Register will not clear interrupt status\r
    //\r
    AltRegister = IoRead8 (IdeRegisters->AltOrDev);\r
    //\r
    // BSY == 0 , DRQ == 1\r
    //\r
    if ((AltRegister & ATA_STSREG_BSY) == 0) {\r
      if ((AltRegister & ATA_STSREG_ERR) == ATA_STSREG_ERR) {\r
        ErrorRegister = IoRead8 (IdeRegisters->ErrOrFeature);\r
\r
        if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {\r
          return EFI_ABORTED;\r
        }\r
        return EFI_DEVICE_ERROR;\r
      }\r
\r
      if ((AltRegister & ATA_STSREG_DRQ) == ATA_STSREG_DRQ) {\r
        return EFI_SUCCESS;\r
      } else {\r
        return EFI_NOT_READY;\r
      }\r
    }\r
\r
    //\r
    // Stall for 100 microseconds.\r
    //\r
    MicroSecondDelay (100);\r
\r
    Delay--;\r
  } while (Delay > 0);\r
\r
  return EFI_TIMEOUT;\r
}\r
\r
/**\r
  This function is used to poll for the BSY bit clear in the Status Register. BSY\r
  is clear when the device is not busy. Every command must be sent after device is not busy.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
  @param Timeout          The time to complete the command.\r
\r
  @retval EFI_SUCCESS     BSY bit clear within the time out.\r
  @retval EFI_TIMEOUT     BSY bit not clear within the time out.\r
\r
  @note Read Status Register will clear interrupt status.\r
**/\r
EFI_STATUS\r
EFIAPI\r
WaitForBSYClear (\r
  IN  EFI_IDE_REGISTERS    *IdeRegisters,\r
  IN  UINT64               Timeout\r
  )\r
{\r
  UINT32  Delay;\r
  UINT8   StatusRegister;\r
\r
  ASSERT (IdeRegisters != NULL);\r
\r
  Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);\r
  do {\r
    StatusRegister = IoRead8 (IdeRegisters->CmdOrStatus);\r
\r
    if ((StatusRegister & ATA_STSREG_BSY) == 0x00) {\r
      return EFI_SUCCESS;\r
    }\r
\r
    //\r
    // Stall for 100 microseconds.\r
    //\r
    MicroSecondDelay (100);\r
\r
    Delay--;\r
\r
  } while (Delay > 0);\r
\r
  return EFI_TIMEOUT;\r
}\r
\r
/**\r
  Get IDE i/o port registers' base addresses by mode.\r
\r
  In 'Compatibility' mode, use fixed addresses.\r
  In Native-PCI mode, get base addresses from BARs in the PCI IDE controller's\r
  Configuration Space.\r
\r
  The steps to get IDE i/o port registers' base addresses for each channel\r
  as follows:\r
\r
  1. Examine the Programming Interface byte of the Class Code fields in PCI IDE\r
  controller's Configuration Space to determine the operating mode.\r
\r
  2. a) In 'Compatibility' mode, use fixed addresses shown in the Table 1 below.\r
   ___________________________________________\r
  |           | Command Block | Control Block |\r
  |  Channel  |   Registers   |   Registers   |\r
  |___________|_______________|_______________|\r
  |  Primary  |  1F0h - 1F7h  |  3F6h - 3F7h  |\r
  |___________|_______________|_______________|\r
  | Secondary |  170h - 177h  |  376h - 377h  |\r
  |___________|_______________|_______________|\r
\r
  Table 1. Compatibility resource mappings\r
\r
  b) In Native-PCI mode, IDE registers are mapped into IO space using the BARs\r
  in IDE controller's PCI Configuration Space, shown in the Table 2 below.\r
   ___________________________________________________\r
  |           |   Command Block   |   Control Block   |\r
  |  Channel  |     Registers     |     Registers     |\r
  |___________|___________________|___________________|\r
  |  Primary  | BAR at offset 0x10| BAR at offset 0x14|\r
  |___________|___________________|___________________|\r
  | Secondary | BAR at offset 0x18| BAR at offset 0x1C|\r
  |___________|___________________|___________________|\r
\r
  Table 2. BARs for Register Mapping\r
\r
  @param[in] Bus                 The bus number of ata host controller.\r
  @param[in] Device              The device number of ata host controller.\r
  @param[in] Function            The function number of ata host controller.\r
  @param[in, out] IdeRegisters   Pointer to EFI_IDE_REGISTERS which is used to\r
                                 store the IDE i/o port registers' base addresses\r
\r
  @retval EFI_UNSUPPORTED        Return this Value when the BARs is not IO type\r
  @retval EFI_SUCCESS            Get the Base address successfully\r
  @retval Other                  Read the pci configureation Data error\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
GetIdeRegisterIoAddr (\r
  IN     UINTN                       Bus,\r
  IN     UINTN                       Device,\r
  IN     UINTN                       Function,\r
  IN OUT EFI_IDE_REGISTERS           *IdeRegisters\r
  )\r
{\r
  UINT16            CommandBlockBaseAddr;\r
  UINT16            ControlBlockBaseAddr;\r
  UINT8             ClassCode;\r
  UINT32            BaseAddress[4];\r
\r
  if (IdeRegisters == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  ClassCode = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x9));\r
  BaseAddress[0] = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x10));\r
  BaseAddress[1] = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x14));\r
  BaseAddress[2] = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x18));\r
  BaseAddress[3] = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x1C));\r
\r
  if ((ClassCode & IDE_PRIMARY_OPERATING_MODE) == 0) {\r
    CommandBlockBaseAddr = 0x1f0;\r
    ControlBlockBaseAddr = 0x3f6;\r
  } else {\r
    //\r
    // The BARs should be of IO type\r
    //\r
    if ((BaseAddress[0] & BIT0) == 0 ||\r
        (BaseAddress[1] & BIT0) == 0) {\r
      return EFI_UNSUPPORTED;\r
    }\r
\r
    CommandBlockBaseAddr = (UINT16) (BaseAddress[0] & 0x0000fff8);\r
    ControlBlockBaseAddr = (UINT16) ((BaseAddress[1] & 0x0000fffc) + 2);\r
  }\r
\r
  //\r
  // Calculate IDE primary channel I/O register base address.\r
  //\r
  IdeRegisters[EfiIdePrimary].Data              = CommandBlockBaseAddr;\r
  IdeRegisters[EfiIdePrimary].ErrOrFeature      = (UINT16) (CommandBlockBaseAddr + 0x01);\r
  IdeRegisters[EfiIdePrimary].SectorCount       = (UINT16) (CommandBlockBaseAddr + 0x02);\r
  IdeRegisters[EfiIdePrimary].SectorNumber      = (UINT16) (CommandBlockBaseAddr + 0x03);\r
  IdeRegisters[EfiIdePrimary].CylinderLsb       = (UINT16) (CommandBlockBaseAddr + 0x04);\r
  IdeRegisters[EfiIdePrimary].CylinderMsb       = (UINT16) (CommandBlockBaseAddr + 0x05);\r
  IdeRegisters[EfiIdePrimary].Head              = (UINT16) (CommandBlockBaseAddr + 0x06);\r
  IdeRegisters[EfiIdePrimary].CmdOrStatus       = (UINT16) (CommandBlockBaseAddr + 0x07);\r
  IdeRegisters[EfiIdePrimary].AltOrDev          = ControlBlockBaseAddr;\r
\r
  if ((ClassCode & IDE_SECONDARY_OPERATING_MODE) == 0) {\r
    CommandBlockBaseAddr = 0x170;\r
    ControlBlockBaseAddr = 0x376;\r
  } else {\r
    //\r
    // The BARs should be of IO type\r
    //\r
    if ((BaseAddress[2] & BIT0) == 0 ||\r
        (BaseAddress[3] & BIT0) == 0) {\r
      return EFI_UNSUPPORTED;\r
    }\r
\r
    CommandBlockBaseAddr = (UINT16) (BaseAddress[2] & 0x0000fff8);\r
    ControlBlockBaseAddr = (UINT16) ((BaseAddress[3] & 0x0000fffc) + 2);\r
  }\r
\r
  //\r
  // Calculate IDE secondary channel I/O register base address.\r
  //\r
  IdeRegisters[EfiIdeSecondary].Data              = CommandBlockBaseAddr;\r
  IdeRegisters[EfiIdeSecondary].ErrOrFeature      = (UINT16) (CommandBlockBaseAddr + 0x01);\r
  IdeRegisters[EfiIdeSecondary].SectorCount       = (UINT16) (CommandBlockBaseAddr + 0x02);\r
  IdeRegisters[EfiIdeSecondary].SectorNumber      = (UINT16) (CommandBlockBaseAddr + 0x03);\r
  IdeRegisters[EfiIdeSecondary].CylinderLsb       = (UINT16) (CommandBlockBaseAddr + 0x04);\r
  IdeRegisters[EfiIdeSecondary].CylinderMsb       = (UINT16) (CommandBlockBaseAddr + 0x05);\r
  IdeRegisters[EfiIdeSecondary].Head              = (UINT16) (CommandBlockBaseAddr + 0x06);\r
  IdeRegisters[EfiIdeSecondary].CmdOrStatus       = (UINT16) (CommandBlockBaseAddr + 0x07);\r
  IdeRegisters[EfiIdeSecondary].AltOrDev          = ControlBlockBaseAddr;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Send ATA Ext command into device with NON_DATA protocol.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
  @param AtaCommandBlock  A pointer to EFI_ATA_COMMAND_BLOCK Data structure.\r
  @param Timeout          The time to complete the command.\r
\r
  @retval  EFI_SUCCESS Reading succeed\r
  @retval  EFI_DEVICE_ERROR Error executing commands on this device.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
AtaIssueCommand (\r
  IN  EFI_IDE_REGISTERS         *IdeRegisters,\r
  IN  EFI_ATA_COMMAND_BLOCK     *AtaCommandBlock,\r
  IN  UINT64                    Timeout\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINT8       DeviceHead;\r
  UINT8       AtaCommand;\r
\r
  ASSERT (IdeRegisters != NULL);\r
  ASSERT (AtaCommandBlock != NULL);\r
\r
  DeviceHead = AtaCommandBlock->AtaDeviceHead;\r
  AtaCommand = AtaCommandBlock->AtaCommand;\r
\r
  Status = WaitForBSYClear (IdeRegisters, Timeout);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)\r
  //\r
  IoWrite8 (IdeRegisters->Head, (UINT8) (0xe0 | DeviceHead));\r
\r
  //\r
  // set all the command parameters\r
  // Before write to all the following registers, BSY and DRQ must be 0.\r
  //\r
  Status = DRQClear2 (IdeRegisters, Timeout);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // Fill the feature register, which is a two-byte FIFO. Need write twice.\r
  //\r
  IoWrite8 (IdeRegisters->ErrOrFeature, AtaCommandBlock->AtaFeaturesExp);\r
  IoWrite8 (IdeRegisters->ErrOrFeature, AtaCommandBlock->AtaFeatures);\r
\r
  //\r
  // Fill the sector count register, which is a two-byte FIFO. Need write twice.\r
  //\r
  IoWrite8 (IdeRegisters->SectorCount, AtaCommandBlock->AtaSectorCountExp);\r
  IoWrite8 (IdeRegisters->SectorCount, AtaCommandBlock->AtaSectorCount);\r
\r
  //\r
  // Fill the start LBA registers, which are also two-byte FIFO\r
  //\r
  IoWrite8 (IdeRegisters->SectorNumber, AtaCommandBlock->AtaSectorNumberExp);\r
  IoWrite8 (IdeRegisters->SectorNumber, AtaCommandBlock->AtaSectorNumber);\r
\r
  IoWrite8 (IdeRegisters->CylinderLsb, AtaCommandBlock->AtaCylinderLowExp);\r
  IoWrite8 (IdeRegisters->CylinderLsb, AtaCommandBlock->AtaCylinderLow);\r
\r
  IoWrite8 (IdeRegisters->CylinderMsb, AtaCommandBlock->AtaCylinderHighExp);\r
  IoWrite8 (IdeRegisters->CylinderMsb, AtaCommandBlock->AtaCylinderHigh);\r
\r
  //\r
  // Send command via Command Register\r
  //\r
  IoWrite8 (IdeRegisters->CmdOrStatus, AtaCommand);\r
\r
  //\r
  // Stall at least 400 microseconds.\r
  //\r
  MicroSecondDelay (400);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  This function is used to send out ATA commands conforms to the PIO Data In Protocol.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
  @param Buffer           A pointer to the source Buffer for the Data.\r
  @param ByteCount        The Length of  the Data.\r
  @param Read             Flag used to determine the Data transfer direction.\r
                          Read equals 1, means Data transferred from device to host;\r
                          Read equals 0, means Data transferred from host to device.\r
  @param AtaCommandBlock  A pointer to EFI_ATA_COMMAND_BLOCK Data structure.\r
  @param AtaStatusBlock   A pointer to EFI_ATA_STATUS_BLOCK Data structure.\r
  @param Timeout          The time to complete the command.\r
\r
  @retval EFI_SUCCESS      send out the ATA command and device send required Data successfully.\r
  @retval EFI_DEVICE_ERROR command sent failed.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
AtaPioDataInOut (\r
  IN     EFI_IDE_REGISTERS         *IdeRegisters,\r
  IN OUT VOID                      *Buffer,\r
  IN     UINT64                    ByteCount,\r
  IN     BOOLEAN                   Read,\r
  IN     EFI_ATA_COMMAND_BLOCK     *AtaCommandBlock,\r
  IN OUT EFI_ATA_STATUS_BLOCK      *AtaStatusBlock,\r
  IN     UINT64                    Timeout\r
  )\r
{\r
  UINTN       WordCount;\r
  UINTN       Increment;\r
  UINT16      *Buffer16;\r
  EFI_STATUS  Status;\r
\r
  if ((IdeRegisters == NULL) || (Buffer == NULL) || (AtaCommandBlock == NULL)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  //\r
  // Issue ATA command\r
  //\r
  Status = AtaIssueCommand (IdeRegisters, AtaCommandBlock, Timeout);\r
  if (EFI_ERROR (Status)) {\r
    Status = EFI_DEVICE_ERROR;\r
    goto Exit;\r
  }\r
\r
  Buffer16 = (UINT16 *) Buffer;\r
\r
  //\r
  // According to PIO Data in protocol, host can perform a series of reads to\r
  // the Data register after each time device set DRQ ready;\r
  // The Data Size of "a series of read" is command specific.\r
  // For most ATA command, Data Size received from device will not exceed\r
  // 1 sector, hence the Data Size for "a series of read" can be the whole Data\r
  // Size of one command request.\r
  // For ATA command such as Read Sector command, the Data Size of one ATA\r
  // command request is often larger than 1 sector, according to the\r
  // Read Sector command, the Data Size of "a series of read" is exactly 1\r
  // sector.\r
  // Here for simplification reason, we specify the Data Size for\r
  // "a series of read" to 1 sector (256 words) if Data Size of one ATA command\r
  // request is larger than 256 words.\r
  //\r
  Increment = 256;\r
\r
  //\r
  // used to record bytes of currently transfered Data\r
  //\r
  WordCount = 0;\r
\r
  while (WordCount < RShiftU64(ByteCount, 1)) {\r
    //\r
    // Poll DRQ bit set, Data transfer can be performed only when DRQ is ready\r
    //\r
    Status = DRQReady2 (IdeRegisters, Timeout);\r
    if (EFI_ERROR (Status)) {\r
      Status = EFI_DEVICE_ERROR;\r
      goto Exit;\r
    }\r
\r
    //\r
    // Get the byte count for one series of read\r
    //\r
    if ((WordCount + Increment) > RShiftU64(ByteCount, 1)) {\r
      Increment = (UINTN)(RShiftU64(ByteCount, 1) - WordCount);\r
    }\r
\r
    if (Read) {\r
      IdeReadPortWMultiple (\r
        IdeRegisters->Data,\r
        Increment,\r
        Buffer16\r
        );\r
    } else {\r
      IdeWritePortWMultiple (\r
        IdeRegisters->Data,\r
        Increment,\r
        Buffer16\r
        );\r
    }\r
\r
    Status = CheckStatusRegister (IdeRegisters);\r
    if (EFI_ERROR (Status)) {\r
      Status = EFI_DEVICE_ERROR;\r
      goto Exit;\r
    }\r
\r
    WordCount += Increment;\r
    Buffer16  += Increment;\r
  }\r
\r
  Status = DRQClear (IdeRegisters, Timeout);\r
  if (EFI_ERROR (Status)) {\r
    Status = EFI_DEVICE_ERROR;\r
    goto Exit;\r
  }\r
\r
Exit:\r
  //\r
  // Dump All Ide registers to ATA_STATUS_BLOCK\r
  //\r
  DumpAllIdeRegisters (IdeRegisters);\r
\r
  return Status;\r
}\r
\r
/**\r
  Sends out an ATA Identify Command to the specified device.\r
\r
  This function sends out the ATA Identify Command to the\r
  specified device. Only ATA device responses to this command. If\r
  the command succeeds, it returns the Identify Data structure which\r
  contains information about the device. This function extracts the\r
  information it needs to fill the IDE_BLK_IO_DEV Data structure,\r
  including device type, media block Size, media capacity, and etc.\r
\r
  @param IdeRegisters     A pointer to EFI_IDE_REGISTERS Data structure.\r
  @param Channel          The channel number of device.\r
  @param Device           The device number of device.\r
  @param Buffer           A pointer to Data Buffer which is used to contain IDENTIFY Data.\r
\r
  @retval EFI_SUCCESS          Identify ATA device successfully.\r
  @retval EFI_DEVICE_ERROR     ATA Identify Device Command failed or device is not ATA device.\r
  @retval EFI_OUT_OF_RESOURCES Allocate memory failed.\r
**/\r
EFI_STATUS\r
EFIAPI\r
AtaIdentify (\r
  IN     EFI_IDE_REGISTERS             *IdeRegisters,\r
  IN     UINT8                         Channel,\r
  IN     UINT8                         Device,\r
  IN OUT ATA_IDENTIFY_DATA             *Buffer\r
  )\r
{\r
  EFI_STATUS             Status;\r
  EFI_ATA_COMMAND_BLOCK  AtaCommandBlock;\r
\r
  ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));\r
\r
  AtaCommandBlock.AtaCommand    = ATA_CMD_IDENTIFY_DRIVE;\r
  AtaCommandBlock.AtaDeviceHead = (UINT8)(Device << 0x4);\r
\r
  Status = AtaPioDataInOut (\r
             IdeRegisters,\r
             Buffer,\r
             sizeof (ATA_IDENTIFY_DATA),\r
             TRUE,\r
             &AtaCommandBlock,\r
             NULL,\r
             ATA_TIMEOUT\r
             );\r
\r
  return Status;\r
}\r
\r
\r
\r