projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 8a08dc54 KK |
1 | /** @file\r |
| 2 | Header file for MADT table parser\r | |
| 3 | \r | |
| 4 | Copyright (c) 2019, ARM Limited. All rights reserved.\r | |
| 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
| 6 | \r | |
| 7 | @par Reference(s):\r | |
| 8 | - Arm Generic Interrupt Controller Architecture Specification,\r | |
| 9 | GIC architecture version 3 and version 4, issue E\r | |
| 10 | - Arm Server Base System Architecture 5.0\r | |
| 11 | **/\r | |
| 12 | \r | |
| 13 | #ifndef MADT_PARSER_H_\r | |
| 14 | #define MADT_PARSER_H_\r | |
| 15 | \r | |
| 16 | ///\r | |
| 17 | /// Level 3 base server system Private Peripheral Inerrupt (PPI) ID assignments\r | |
| 18 | ///\r | |
| 47d20b54 MK |
19 | #define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTP 30\r |
| 20 | #define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTPS 29\r | |
| 21 | #define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTHV 28\r | |
| 22 | #define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTV 27\r | |
| 23 | #define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTHP 26\r | |
| 24 | #define ARM_PPI_ID_GIC_MAINTENANCE_INTERRUPT 25\r | |
| 25 | #define ARM_PPI_ID_CTIIRQ 24\r | |
| 26 | #define ARM_PPI_ID_PERFORMANCE_MONITORS_INTERRUPT 23\r | |
| 27 | #define ARM_PPI_ID_COMMIRQ 22\r | |
| 28 | #define ARM_PPI_ID_PMBIRQ 21\r | |
| 29 | #define ARM_PPI_ID_CNTHPS 20\r | |
| 30 | #define ARM_PPI_ID_CNTHVS 19\r | |
| 8a08dc54 KK |
31 | \r |
| 32 | ///\r | |
| 33 | /// PPI ID allowed ranges\r | |
| 34 | ///\r | |
| 47d20b54 MK |
35 | #define ARM_PPI_ID_MAX 31\r |
| 36 | #define ARM_PPI_ID_MIN 16\r | |
| 37 | #define ARM_PPI_ID_EXTENDED_MAX 1119\r | |
| 38 | #define ARM_PPI_ID_EXTENDED_MIN 1056\r | |
| 8a08dc54 KK |
39 | \r |
| 40 | #endif // MADT_PARSER_H_\r |