| 18b144ea |
1 | #------------------------------------------------------------------------------\r |
| 2 | #\r |
| 3 | # Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r |
| 4 | # This program and the accompanying materials\r |
| 5 | # are licensed and made available under the terms and conditions of the BSD License\r |
| 6 | # which accompanies this distribution. The full text of the license may be found at\r |
| 7 | # http://opensource.org/licenses/bsd-license.php.\r |
| 8 | #\r |
| 9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 11 | #\r |
| 12 | # Module Name:\r |
| 13 | #\r |
| 14 | # AsmFuncs.S\r |
| 15 | #\r |
| 16 | # Abstract:\r |
| 17 | #\r |
| 18 | # Debug interrupt handle functions.\r |
| 19 | #\r |
| 20 | #------------------------------------------------------------------------------\r |
| 21 | \r |
| 22 | #include "DebugException.h"\r |
| 23 | \r |
| 24 | ASM_GLOBAL ASM_PFX(InterruptProcess)\r |
| 25 | ASM_GLOBAL ASM_PFX(Exception0Handle)\r |
| 26 | ASM_GLOBAL ASM_PFX(ExceptionStubHeaderSize)\r |
| 27 | ASM_GLOBAL ASM_PFX(TimerInterruptHandle)\r |
| 28 | ASM_GLOBAL ASM_PFX(CommonEntry)\r |
| 29 | \r |
| 30 | .data\r |
| 31 | \r |
| 32 | ASM_PFX(ExceptionStubHeaderSize): .word ASM_PFX(Exception1Handle) - ASM_PFX(Exception0Handle)\r |
| 33 | \r |
| 34 | .text\r |
| 35 | \r |
| 36 | ASM_PFX(Exception0Handle):\r |
| 37 | cli\r |
| 38 | pushl %eax\r |
| 39 | mov $0, %eax\r |
| 40 | jmp ASM_PFX(CommonEntry)\r |
| 41 | ASM_PFX(Exception1Handle):\r |
| 42 | cli\r |
| 43 | pushl %eax\r |
| 44 | mov $1, %eax\r |
| 45 | jmp ASM_PFX(CommonEntry)\r |
| 46 | ASM_PFX(Exception2Handle):\r |
| 47 | cli\r |
| 48 | pushl %eax\r |
| 49 | mov $2, %eax\r |
| 50 | jmp ASM_PFX(CommonEntry)\r |
| 51 | ASM_PFX(Exception3Handle):\r |
| 52 | cli\r |
| 53 | pushl %eax\r |
| 54 | mov $3, %eax\r |
| 55 | jmp ASM_PFX(CommonEntry)\r |
| 56 | ASM_PFX(Exception4Handle):\r |
| 57 | cli\r |
| 58 | pushl %eax\r |
| 59 | mov $4, %eax\r |
| 60 | jmp ASM_PFX(CommonEntry)\r |
| 61 | ASM_PFX(Exception5Handle):\r |
| 62 | cli\r |
| 63 | pushl %eax\r |
| 64 | mov $5, %eax\r |
| 65 | jmp ASM_PFX(CommonEntry)\r |
| 66 | ASM_PFX(Exception6Handle):\r |
| 67 | cli\r |
| 68 | pushl %eax\r |
| 69 | mov $6, %eax\r |
| 70 | jmp ASM_PFX(CommonEntry)\r |
| 71 | ASM_PFX(Exception7Handle):\r |
| 72 | cli\r |
| 73 | pushl %eax\r |
| 74 | mov $7, %eax\r |
| 75 | jmp ASM_PFX(CommonEntry)\r |
| 76 | ASM_PFX(Exception8Handle):\r |
| 77 | cli\r |
| 78 | pushl %eax\r |
| 79 | mov $8, %eax\r |
| 80 | jmp ASM_PFX(CommonEntry)\r |
| 81 | ASM_PFX(Exception9Handle):\r |
| 82 | cli\r |
| 83 | pushl %eax\r |
| 84 | mov $9, %eax\r |
| 85 | jmp ASM_PFX(CommonEntry)\r |
| 86 | ASM_PFX(Exception10Handle):\r |
| 87 | cli\r |
| 88 | pushl %eax\r |
| 89 | mov $10, %eax\r |
| 90 | jmp ASM_PFX(CommonEntry)\r |
| 91 | ASM_PFX(Exception11Handle):\r |
| 92 | cli\r |
| 93 | pushl %eax\r |
| 94 | mov $11, %eax\r |
| 95 | jmp ASM_PFX(CommonEntry)\r |
| 96 | ASM_PFX(Exception12Handle):\r |
| 97 | cli\r |
| 98 | pushl %eax\r |
| 99 | mov $12, %eax\r |
| 100 | jmp ASM_PFX(CommonEntry)\r |
| 101 | ASM_PFX(Exception13Handle):\r |
| 102 | cli\r |
| 103 | pushl %eax\r |
| 104 | mov $13, %eax\r |
| 105 | jmp ASM_PFX(CommonEntry)\r |
| 106 | ASM_PFX(Exception14Handle):\r |
| 107 | cli\r |
| 108 | pushl %eax\r |
| 109 | mov $14, %eax\r |
| 110 | jmp ASM_PFX(CommonEntry)\r |
| 111 | ASM_PFX(Exception15Handle):\r |
| 112 | cli\r |
| 113 | pushl %eax\r |
| 114 | mov $15, %eax\r |
| 115 | jmp ASM_PFX(CommonEntry)\r |
| 116 | ASM_PFX(Exception16Handle):\r |
| 117 | cli\r |
| 118 | pushl %eax\r |
| 119 | mov $16, %eax\r |
| 120 | jmp ASM_PFX(CommonEntry)\r |
| 121 | ASM_PFX(Exception17Handle):\r |
| 122 | cli\r |
| 123 | pushl %eax\r |
| 124 | mov $17, %eax\r |
| 125 | jmp ASM_PFX(CommonEntry)\r |
| 126 | ASM_PFX(Exception18Handle):\r |
| 127 | cli\r |
| 128 | pushl %eax\r |
| 129 | mov $18, %eax\r |
| 130 | jmp ASM_PFX(CommonEntry)\r |
| 131 | ASM_PFX(Exception19Handle):\r |
| 132 | cli\r |
| 133 | pushl %eax\r |
| 134 | mov $19, %eax\r |
| 135 | jmp ASM_PFX(CommonEntry)\r |
| 136 | \r |
| 137 | ASM_PFX(TimerInterruptHandle):\r |
| 138 | cli\r |
| 139 | pushl %eax\r |
| 140 | mov $32, %eax\r |
| 141 | jmp ASM_PFX(CommonEntry)\r |
| 142 | \r |
| 143 | \r |
| 144 | ASM_PFX(CommonEntry):\r |
| 145 | \r |
| 146 | #---------------------------------------;\r |
| 147 | # _CommonEntry ;\r |
| 148 | #----------------------------------------------------------------------------;\r |
| 149 | # The follow algorithm is used for the common interrupt routine.\r |
| 150 | # Entry from each interrupt with a push eax and eax=interrupt number\r |
| 151 | #\r |
| 152 | # +---------------------+\r |
| 153 | # + EFlags +\r |
| 154 | # +---------------------+\r |
| 155 | # + CS +\r |
| 156 | # +---------------------+\r |
| 157 | # + EIP +\r |
| 158 | # +---------------------+\r |
| 159 | # + Error Code +\r |
| 160 | # +---------------------+\r |
| 161 | # + EAX / Vector Number +\r |
| 162 | # +---------------------+\r |
| 163 | # + EBP +\r |
| 164 | # +---------------------+ <-- EBP\r |
| 165 | #\r |
| 166 | \r |
| 167 | # We need to determine if any extra data was pushed by the exception\r |
| 168 | cmpl $DEBUG_EXCEPT_DOUBLE_FAULT, %eax\r |
| 169 | je NoExtrPush\r |
| 170 | cmpl $DEBUG_EXCEPT_INVALID_TSS, %eax\r |
| 171 | je NoExtrPush\r |
| 172 | cmpl $DEBUG_EXCEPT_SEG_NOT_PRESENT, %eax\r |
| 173 | je NoExtrPush\r |
| 174 | cmpl $DEBUG_EXCEPT_STACK_FAULT, %eax\r |
| 175 | je NoExtrPush\r |
| 176 | cmpl $DEBUG_EXCEPT_GP_FAULT, %eax\r |
| 177 | je NoExtrPush\r |
| 178 | cmpl $DEBUG_EXCEPT_PAGE_FAULT, %eax\r |
| 179 | je NoExtrPush\r |
| 180 | cmpl $DEBUG_EXCEPT_ALIGNMENT_CHECK, %eax\r |
| 181 | je NoExtrPush\r |
| 182 | \r |
| 183 | pushl (%esp)\r |
| 184 | movl $0, 4(%esp)\r |
| 185 | \r |
| 186 | NoExtrPush:\r |
| 187 | \r |
| 188 | pushl %ebp\r |
| 189 | movl %esp,%ebp\r |
| 190 | \r |
| 191 | #\r |
| 192 | # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r |
| 193 | # is 16-byte aligned\r |
| 194 | #\r |
| 195 | andl $0xfffffff0,%esp\r |
| 196 | subl $12,%esp\r |
| 197 | \r |
| 198 | ## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r |
| 199 | pushl 0x4(%ebp)\r |
| 200 | pushl %ebx\r |
| 201 | pushl %ecx\r |
| 202 | pushl %edx\r |
| 203 | mov %eax, %ebx # save vector in ebx\r |
| 204 | leal 24(%ebp),%ecx\r |
| 205 | pushl %ecx # save original ESP\r |
| 206 | pushl (%ebp)\r |
| 207 | pushl %esi\r |
| 208 | pushl %edi\r |
| 209 | \r |
| 210 | ## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r |
| 211 | movl %cr4, %eax\r |
| 212 | orl $0x208,%eax\r |
| 213 | movl %eax, %cr4\r |
| 214 | pushl %eax\r |
| 215 | movl %cr3, %eax\r |
| 216 | pushl %eax\r |
| 217 | movl %cr2, %eax\r |
| 218 | pushl %eax\r |
| 219 | xorl %eax,%eax\r |
| 220 | pushl %eax\r |
| 221 | movl %cr0, %eax\r |
| 222 | pushl %eax\r |
| 223 | \r |
| 224 | ## UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r |
| 225 | movl %ss,%eax\r |
| 226 | pushl %eax\r |
| 227 | movzwl 16(%ebp), %eax\r |
| 228 | pushl %eax\r |
| 229 | movl %ds,%eax\r |
| 230 | pushl %eax\r |
| 231 | movl %es,%eax\r |
| 232 | pushl %eax\r |
| 233 | movl %fs,%eax\r |
| 234 | pushl %eax\r |
| 235 | movl %gs,%eax\r |
| 236 | pushl %eax\r |
| 237 | \r |
| 238 | ## UINT32 Eip;\r |
| 239 | pushl 12(%ebp)\r |
| 240 | \r |
| 241 | ## UINT32 Gdtr[2], Idtr[2];\r |
| 242 | subl $8,%esp\r |
| 243 | sidt (%esp)\r |
| 244 | subl $8,%esp\r |
| 245 | sgdt (%esp)\r |
| 246 | \r |
| 247 | ## UINT32 Ldtr, Tr;\r |
| 248 | xorl %eax,%eax\r |
| 249 | strl %eax\r |
| 250 | pushl %eax\r |
| 251 | sldtl %eax\r |
| 252 | pushl %eax\r |
| 253 | \r |
| 254 | ## UINT32 EFlags;\r |
| 255 | pushl 20(%ebp)\r |
| 256 | \r |
| 257 | ## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r |
| 258 | movl %dr7, %eax\r |
| 259 | pushl %eax\r |
| 260 | ## clear Dr7 while executing debugger itself\r |
| 261 | xorl %eax,%eax\r |
| 262 | # movl %eax, %dr7\r |
| 263 | \r |
| 264 | movl %dr6, %eax\r |
| 265 | pushl %eax\r |
| 266 | ## insure all status bits in dr6 are clear...\r |
| 267 | xorl %eax,%eax\r |
| 268 | movl %eax, %dr6\r |
| 269 | \r |
| 270 | movl %dr3, %eax\r |
| 271 | pushl %eax\r |
| 272 | movl %dr2, %eax\r |
| 273 | pushl %eax\r |
| 274 | movl %dr1, %eax\r |
| 275 | pushl %eax\r |
| 276 | movl %dr0, %eax\r |
| 277 | pushl %eax\r |
| 278 | \r |
| 279 | ## FX_SAVE_STATE_IA32 FxSaveState;\r |
| 280 | subl $512,%esp\r |
| 281 | movl %esp,%edi\r |
| 282 | .byte 0x0f, 0xae, 0x07 # fxsave [edi]\r |
| 283 | \r |
| 284 | ## Clear Direction Flag\r |
| 285 | cld\r |
| 286 | \r |
| 287 | ## Prepare parameter and call C function\r |
| 288 | pushl %esp\r |
| 289 | pushl %ebx\r |
| 290 | call ASM_PFX(InterruptProcess)\r |
| 291 | addl $8,%esp\r |
| 292 | \r |
| 293 | ## FX_SAVE_STATE_IA32 FxSaveState;\r |
| 294 | movl %esp,%esi\r |
| 295 | .byte 0x0f, 0xae, 0x0e # fxrstor [esi]\r |
| 296 | addl $512,%esp\r |
| 297 | \r |
| 298 | ## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r |
| 299 | popl %eax\r |
| 300 | movl %eax, %dr0\r |
| 301 | popl %eax\r |
| 302 | movl %eax, %dr1\r |
| 303 | popl %eax\r |
| 304 | movl %eax, %dr2\r |
| 305 | popl %eax\r |
| 306 | movl %eax, %dr3\r |
| 307 | ## skip restore of dr6. We cleared dr6 during the context save.\r |
| 308 | addl $4,%esp\r |
| 309 | popl %eax\r |
| 310 | movl %eax, %dr7\r |
| 311 | \r |
| 312 | ## UINT32 EFlags;\r |
| 313 | popl 20(%ebp)\r |
| 314 | \r |
| 315 | ## UINT32 Ldtr, Tr;\r |
| 316 | ## UINT32 Gdtr[2], Idtr[2];\r |
| 317 | ## Best not let anyone mess with these particular registers...\r |
| 318 | addl $24,%esp\r |
| 319 | \r |
| 320 | ## UINT32 Eip;\r |
| 321 | pop 12(%ebp)\r |
| 322 | \r |
| 323 | ## UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r |
| 324 | ## NOTE - modified segment registers could hang the debugger... We\r |
| 325 | ## could attempt to insulate ourselves against this possibility,\r |
| 326 | ## but that poses risks as well.\r |
| 327 | ##\r |
| 328 | popl %gs\r |
| 329 | popl %fs\r |
| 330 | popl %es\r |
| 331 | popl %ds\r |
| 332 | popl 16(%ebp)\r |
| 333 | popl %ss\r |
| 334 | \r |
| 335 | ## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r |
| 336 | popl %eax\r |
| 337 | movl %eax, %cr0\r |
| 338 | addl $4,%esp # not for Cr1\r |
| 339 | popl %eax\r |
| 340 | movl %eax, %cr2\r |
| 341 | popl %eax\r |
| 342 | movl %eax, %cr3\r |
| 343 | popl %eax\r |
| 344 | movl %eax, %cr4\r |
| 345 | \r |
| 346 | ## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r |
| 347 | popl %edi\r |
| 348 | popl %esi\r |
| 349 | addl $4,%esp # not for ebp\r |
| 350 | addl $4,%esp # not for esp\r |
| 351 | popl %edx\r |
| 352 | popl %ecx\r |
| 353 | popl %ebx\r |
| 354 | popl %eax\r |
| 355 | \r |
| 356 | movl %ebp,%esp\r |
| 357 | popl %ebp\r |
| 358 | addl $8,%esp # skip eax\r |
| 359 | iretl\r |
| 360 | \r |
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