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18b144ea | 1 | ;------------------------------------------------------------------------------\r |
2 | ;\r | |
d9044ec5 | 3 | ; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r |
18b144ea | 4 | ; This program and the accompanying materials\r |
5 | ; are licensed and made available under the terms and conditions of the BSD License\r | |
6 | ; which accompanies this distribution. The full text of the license may be found at\r | |
7 | ; http://opensource.org/licenses/bsd-license.php.\r | |
8 | ;\r | |
9 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | ;\r | |
12 | ; Module Name:\r | |
13 | ;\r | |
14 | ; AsmFuncs.asm\r | |
15 | ;\r | |
16 | ; Abstract:\r | |
17 | ;\r | |
18 | ; Debug interrupt handle functions.\r | |
19 | ;\r | |
20 | ;------------------------------------------------------------------------------\r | |
21 | \r | |
22 | #include "DebugException.h"\r | |
23 | \r | |
24 | \r | |
25 | externdef InterruptProcess:near\r | |
26 | \r | |
27 | data SEGMENT\r | |
28 | \r | |
29 | public Exception0Handle, TimerInterruptHandle, ExceptionStubHeaderSize\r | |
30 | \r | |
8cc26df4 JF |
31 | AGENT_HANDLER_SIGNATURE MACRO\r |
32 | db 41h, 47h, 54h, 48h ; SIGNATURE_32('A','G','T','H')\r | |
33 | ENDM\r | |
34 | \r | |
19ee4a90 | 35 | ExceptionStubHeaderSize dd Exception1Handle - Exception0Handle ;\r |
18b144ea | 36 | CommonEntryAddr dq CommonEntry ;\r |
37 | \r | |
38 | .code\r | |
39 | \r | |
8cc26df4 | 40 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 41 | Exception0Handle:\r |
42 | cli\r | |
43 | push rcx\r | |
44 | mov rcx, 0\r | |
45 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 46 | AGENT_HANDLER_SIGNATURE \r |
18b144ea | 47 | Exception1Handle:\r |
48 | cli\r | |
49 | push rcx\r | |
50 | mov rcx, 1\r | |
51 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 52 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 53 | Exception2Handle:\r |
54 | cli\r | |
55 | push rcx\r | |
56 | mov rcx, 2\r | |
57 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 58 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 59 | Exception3Handle:\r |
60 | cli\r | |
61 | push rcx\r | |
62 | mov rcx, 3\r | |
63 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 64 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 65 | Exception4Handle:\r |
66 | cli\r | |
67 | push rcx\r | |
68 | mov rcx, 4\r | |
69 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 70 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 71 | Exception5Handle:\r |
72 | cli\r | |
73 | push rcx\r | |
74 | mov rcx, 5\r | |
75 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 76 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 77 | Exception6Handle:\r |
78 | cli\r | |
79 | push rcx\r | |
80 | mov rcx, 6\r | |
81 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 82 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 83 | Exception7Handle:\r |
84 | cli\r | |
85 | push rcx\r | |
86 | mov rcx, 7\r | |
87 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 88 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 89 | Exception8Handle:\r |
90 | cli\r | |
91 | push rcx\r | |
92 | mov rcx, 8\r | |
93 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 94 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 95 | Exception9Handle:\r |
96 | cli\r | |
97 | push rcx\r | |
98 | mov rcx, 9\r | |
99 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 100 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 101 | Exception10Handle:\r |
102 | cli\r | |
103 | push rcx\r | |
104 | mov rcx, 10\r | |
105 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 106 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 107 | Exception11Handle:\r |
108 | cli\r | |
109 | push rcx\r | |
110 | mov rcx, 11\r | |
111 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 112 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 113 | Exception12Handle:\r |
114 | cli\r | |
115 | push rcx\r | |
116 | mov rcx, 12\r | |
117 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 118 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 119 | Exception13Handle:\r |
120 | cli\r | |
121 | push rcx\r | |
122 | mov rcx, 13\r | |
123 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 124 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 125 | Exception14Handle:\r |
126 | cli\r | |
127 | push rcx\r | |
128 | mov rcx, 14\r | |
129 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 130 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 131 | Exception15Handle:\r |
132 | cli\r | |
133 | push rcx\r | |
134 | mov rcx, 15\r | |
135 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 136 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 137 | Exception16Handle:\r |
138 | cli\r | |
139 | push rcx\r | |
140 | mov rcx, 16\r | |
141 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 142 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 143 | Exception17Handle:\r |
144 | cli\r | |
145 | push rcx\r | |
146 | mov rcx, 17\r | |
147 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 148 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 149 | Exception18Handle:\r |
150 | cli\r | |
151 | push rcx\r | |
152 | mov rcx, 18\r | |
153 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 154 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 155 | Exception19Handle:\r |
156 | cli\r | |
157 | push rcx\r | |
158 | mov rcx, 19\r | |
159 | jmp qword ptr [CommonEntryAddr]\r | |
8cc26df4 | 160 | AGENT_HANDLER_SIGNATURE\r |
18b144ea | 161 | TimerInterruptHandle:\r |
162 | cli\r | |
163 | push rcx\r | |
164 | mov rcx, 32\r | |
165 | jmp qword ptr [CommonEntryAddr]\r | |
166 | \r | |
167 | CommonEntry:\r | |
168 | ; We need to determine if any extra data was pushed by the exception\r | |
169 | cmp rcx, DEBUG_EXCEPT_DOUBLE_FAULT\r | |
170 | je NoExtrPush\r | |
171 | cmp rcx, DEBUG_EXCEPT_INVALID_TSS\r | |
172 | je NoExtrPush\r | |
173 | cmp rcx, DEBUG_EXCEPT_SEG_NOT_PRESENT\r | |
174 | je NoExtrPush\r | |
175 | cmp rcx, DEBUG_EXCEPT_STACK_FAULT\r | |
176 | je NoExtrPush\r | |
177 | cmp rcx, DEBUG_EXCEPT_GP_FAULT\r | |
178 | je NoExtrPush\r | |
179 | cmp rcx, DEBUG_EXCEPT_PAGE_FAULT\r | |
180 | je NoExtrPush\r | |
181 | cmp rcx, DEBUG_EXCEPT_ALIGNMENT_CHECK\r | |
182 | je NoExtrPush\r | |
183 | \r | |
184 | push [rsp]\r | |
185 | mov qword ptr [rsp + 8], 0\r | |
186 | \r | |
187 | NoExtrPush:\r | |
188 | push rbp\r | |
189 | mov rbp, rsp\r | |
190 | \r | |
191 | ; store UINT64 r8, r9, r10, r11, r12, r13, r14, r15;\r | |
192 | push r15\r | |
193 | push r14\r | |
194 | push r13\r | |
195 | push r12\r | |
196 | push r11\r | |
197 | push r10\r | |
198 | push r9\r | |
199 | push r8\r | |
200 | \r | |
201 | mov r8, cr8\r | |
202 | push r8\r | |
203 | \r | |
204 | ; store UINT64 Rdi, Rsi, Rbp, Rsp, Rdx, Rcx, Rbx, Rax;\r | |
205 | push rax\r | |
206 | push rbx\r | |
207 | push qword ptr [rbp + 8] ; original rcx\r | |
208 | push rdx\r | |
209 | push qword ptr [rbp + 6 * 8] ; original rsp\r | |
210 | push qword ptr [rbp] ; original rbp\r | |
211 | push rsi\r | |
212 | push rdi\r | |
213 | \r | |
214 | ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r | |
215 | ;; insure FXSAVE/FXRSTOR is enabled in CR4...\r | |
216 | ;; ... while we're at it, make sure DE is also enabled...\r | |
217 | mov rax, cr4\r | |
218 | or rax, 208h\r | |
219 | mov cr4, rax\r | |
220 | push rax\r | |
221 | mov rax, cr3\r | |
222 | push rax\r | |
223 | mov rax, cr2\r | |
224 | push rax\r | |
b422b62c | 225 | push 0\r |
18b144ea | 226 | mov rax, cr0\r |
227 | push rax\r | |
228 | \r | |
229 | xor rax, rax\r | |
230 | mov rax, Ss\r | |
231 | push rax\r | |
232 | mov rax, Cs\r | |
233 | push rax\r | |
234 | mov rax, Ds\r | |
235 | push rax\r | |
236 | mov rax, Es\r | |
237 | push rax\r | |
238 | mov rax, Fs\r | |
239 | push rax\r | |
240 | mov rax, Gs\r | |
241 | push rax\r | |
242 | \r | |
243 | ;; EIP\r | |
244 | mov rax, [rbp + 8 * 3] ; EIP\r | |
245 | push rax\r | |
246 | \r | |
247 | ;; UINT64 Gdtr[2], Idtr[2];\r | |
248 | sub rsp, 16\r | |
249 | sidt fword ptr [rsp]\r | |
250 | sub rsp, 16\r | |
251 | sgdt fword ptr [rsp]\r | |
252 | \r | |
253 | ;; UINT64 Ldtr, Tr;\r | |
254 | xor rax, rax\r | |
255 | str ax\r | |
256 | push rax\r | |
257 | sldt ax\r | |
258 | push rax\r | |
259 | \r | |
260 | ;; EFlags\r | |
261 | mov rax, [rbp + 8 * 5]\r | |
262 | push rax\r | |
263 | \r | |
264 | ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r | |
265 | mov rax, dr7\r | |
266 | push rax\r | |
267 | \r | |
268 | ;; clear Dr7 while executing debugger itself\r | |
269 | xor rax, rax\r | |
270 | mov dr7, rax\r | |
271 | \r | |
272 | ;; Dr6\r | |
273 | mov rax, dr6\r | |
274 | push rax\r | |
275 | \r | |
276 | ;; insure all status bits in dr6 are clear...\r | |
277 | xor rax, rax\r | |
278 | mov dr6, rax\r | |
279 | \r | |
280 | mov rax, dr3\r | |
281 | push rax\r | |
282 | mov rax, dr2\r | |
283 | push rax\r | |
284 | mov rax, dr1\r | |
285 | push rax\r | |
286 | mov rax, dr0\r | |
287 | push rax\r | |
288 | \r | |
d9044ec5 RN |
289 | ;; Clear Direction Flag\r |
290 | cld\r | |
291 | \r | |
18b144ea | 292 | sub rsp, 512\r |
93c0bdec | 293 | mov rdi, rsp\r |
d9044ec5 RN |
294 | ;; Clear the buffer\r |
295 | xor rax, rax\r | |
296 | push rcx\r | |
297 | mov rcx, 64 ;= 512 / 8\r | |
298 | rep stosq\r | |
299 | pop rcx\r | |
300 | mov rdi, rsp\r | |
18b144ea | 301 | db 0fh, 0aeh, 00000111y ;fxsave [rdi]\r |
302 | \r | |
93c0bdec | 303 | ;; save the exception data\r |
304 | push qword ptr [rbp + 16]\r | |
305 | \r | |
18b144ea | 306 | ; call the C interrupt process function\r |
307 | mov rdx, rsp ; Structure\r | |
308 | mov r15, rcx ; save vector in r15\r | |
309 | \r | |
93c0bdec | 310 | ;\r |
311 | ; Per X64 calling convention, allocate maximum parameter stack space\r | |
312 | ; and make sure RSP is 16-byte aligned\r | |
313 | ;\r | |
314 | sub rsp, 32 + 8\r | |
18b144ea | 315 | call InterruptProcess\r |
93c0bdec | 316 | add rsp, 32 + 8\r |
317 | \r | |
318 | ;; skip the exception data\r | |
319 | add rsp, 8\r | |
18b144ea | 320 | \r |
321 | mov rsi, rsp\r | |
322 | db 0fh, 0aeh, 00001110y ; fxrstor [rsi]\r | |
323 | add rsp, 512\r | |
324 | \r | |
325 | ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r | |
326 | pop rax\r | |
327 | mov dr0, rax\r | |
328 | pop rax\r | |
329 | mov dr1, rax\r | |
330 | pop rax\r | |
331 | mov dr2, rax\r | |
332 | pop rax\r | |
333 | mov dr3, rax\r | |
334 | ;; skip restore of dr6. We cleared dr6 during the context save.\r | |
335 | add rsp, 8\r | |
336 | pop rax\r | |
337 | mov dr7, rax\r | |
338 | \r | |
339 | ;; set EFlags\r | |
340 | pop qword ptr [rbp + 8 * 5]\r | |
341 | \r | |
342 | ;; UINT64 Ldtr, Tr;\r | |
343 | ;; UINT64 Gdtr[2], Idtr[2];\r | |
344 | ;; Best not let anyone mess with these particular registers...\r | |
345 | add rsp, 24 * 2\r | |
346 | \r | |
347 | ;; UINT64 Eip;\r | |
348 | pop qword ptr [rbp + 8 * 3] ; set EIP in stack\r | |
349 | \r | |
350 | ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r | |
351 | ;; NOTE - modified segment registers could hang the debugger... We\r | |
352 | ;; could attempt to insulate ourselves against this possibility,\r | |
353 | ;; but that poses risks as well.\r | |
354 | ;;\r | |
355 | pop rax\r | |
356 | pop rax\r | |
357 | pop rax\r | |
358 | mov es, rax\r | |
359 | pop rax\r | |
360 | mov ds, rax\r | |
361 | pop qword ptr [rbp + 8 * 4] ; Set CS in stack\r | |
362 | pop rax\r | |
363 | mov ss, rax\r | |
364 | \r | |
365 | ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4;\r | |
366 | pop rax\r | |
367 | mov cr0, rax\r | |
368 | add rsp, 8 ; skip for Cr1\r | |
369 | pop rax\r | |
370 | mov cr2, rax\r | |
371 | pop rax\r | |
372 | mov cr3, rax\r | |
373 | pop rax\r | |
374 | mov cr4, rax\r | |
375 | \r | |
376 | ;; restore general register\r | |
377 | pop rdi\r | |
378 | pop rsi\r | |
379 | add rsp, 8 ; skip rbp\r | |
380 | add rsp, 8 ; skip rsp\r | |
381 | pop rdx\r | |
382 | pop rcx\r | |
383 | pop rbx\r | |
384 | pop rax\r | |
385 | \r | |
386 | pop r8\r | |
387 | mov cr8, r8\r | |
388 | \r | |
389 | ; store UINT64 r8, r9, r10, r11, r12, r13, r14, r15;\r | |
390 | pop r8\r | |
391 | pop r9\r | |
392 | pop r10\r | |
393 | pop r11\r | |
394 | pop r12\r | |
395 | pop r13\r | |
396 | pop r14\r | |
397 | pop r15\r | |
398 | \r | |
399 | mov rsp, rbp\r | |
400 | pop rbp\r | |
401 | add rsp, 16 ; skip rcx and error code\r | |
402 | \r | |
403 | iretq\r | |
404 | \r | |
405 | END\r |