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275d4bd4 SV |
1 | /** @file\r |
2 | Private header with declarations and definitions specific to the MM Standalone\r | |
3 | CPU driver\r | |
4 | \r | |
9a0f88b5 | 5 | Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.\r |
86094561 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
275d4bd4 SV |
7 | \r |
8 | **/\r | |
9 | \r | |
10 | #ifndef _ARM_TF_CPU_DRIVER_H_\r | |
11 | #define _ARM_TF_CPU_DRIVER_H_\r | |
12 | \r | |
88899a37 | 13 | #include <Protocol/MmCommunication2.h>\r |
275d4bd4 SV |
14 | #include <Protocol/MmConfiguration.h>\r |
15 | #include <Protocol/MmCpu.h>\r | |
16 | #include <Guid/MpInformation.h>\r | |
17 | \r | |
18 | //\r | |
19 | // CPU driver initialization specific declarations\r | |
20 | //\r | |
91415a36 | 21 | extern EFI_MM_SYSTEM_TABLE *mMmst;\r |
275d4bd4 SV |
22 | \r |
23 | //\r | |
24 | // CPU State Save protocol specific declarations\r | |
25 | //\r | |
91415a36 | 26 | extern EFI_MM_CPU_PROTOCOL mMmCpuState;\r |
275d4bd4 SV |
27 | \r |
28 | //\r | |
29 | // MM event handling specific declarations\r | |
30 | //\r | |
91415a36 MK |
31 | extern EFI_MM_COMMUNICATE_HEADER **PerCpuGuidedEventContext;\r |
32 | extern EFI_MMRAM_DESCRIPTOR mNsCommBuffer;\r | |
5496c763 | 33 | extern EFI_MMRAM_DESCRIPTOR mSCommBuffer;\r |
91415a36 MK |
34 | extern MP_INFORMATION_HOB_DATA *mMpInformationHobData;\r |
35 | extern EFI_MM_CONFIGURATION_PROTOCOL mMmConfig;\r | |
275d4bd4 | 36 | \r |
9a0f88b5 SM |
37 | /**\r |
38 | The PI Standalone MM entry point for the TF-A CPU driver.\r | |
39 | \r | |
40 | @param [in] EventId The event Id.\r | |
41 | @param [in] CpuNumber The CPU number.\r | |
42 | @param [in] NsCommBufferAddr Address of the NS common buffer.\r | |
43 | \r | |
44 | @retval EFI_SUCCESS Success.\r | |
45 | @retval EFI_INVALID_PARAMETER A parameter was invalid.\r | |
46 | @retval EFI_ACCESS_DENIED Access not permitted.\r | |
47 | @retval EFI_OUT_OF_RESOURCES Out of resources.\r | |
48 | @retval EFI_UNSUPPORTED Operation not supported.\r | |
49 | **/\r | |
275d4bd4 | 50 | EFI_STATUS\r |
c8102727 | 51 | PiMmStandaloneArmTfCpuDriverEntry (\r |
91415a36 MK |
52 | IN UINTN EventId,\r |
53 | IN UINTN CpuNumber,\r | |
54 | IN UINTN NsCommBufferAddr\r | |
275d4bd4 SV |
55 | );\r |
56 | \r | |
9a0f88b5 SM |
57 | /**\r |
58 | This function is the main entry point for an MM handler dispatch\r | |
59 | or communicate-based callback.\r | |
60 | \r | |
61 | @param DispatchHandle The unique handle assigned to this handler by\r | |
62 | MmiHandlerRegister().\r | |
63 | @param Context Points to an optional handler context which was\r | |
64 | specified when the handler was registered.\r | |
65 | @param CommBuffer A pointer to a collection of data in memory that will\r | |
66 | be conveyed from a non-MM environment into an\r | |
67 | MM environment.\r | |
68 | @param CommBufferSize The size of the CommBuffer.\r | |
69 | \r | |
70 | @return Status Code\r | |
71 | \r | |
72 | **/\r | |
275d4bd4 SV |
73 | EFI_STATUS\r |
74 | EFIAPI\r | |
75 | PiMmCpuTpFwRootMmiHandler (\r | |
91415a36 MK |
76 | IN EFI_HANDLE DispatchHandle,\r |
77 | IN CONST VOID *Context OPTIONAL,\r | |
78 | IN OUT VOID *CommBuffer OPTIONAL,\r | |
79 | IN OUT UINTN *CommBufferSize OPTIONAL\r | |
275d4bd4 SV |
80 | );\r |
81 | \r | |
275d4bd4 | 82 | #endif\r |