[mirror_edk2.git] / StandaloneMmPkg / Library / StandaloneMmCoreEntryPoint / AArch64 / StandaloneMmCoreEntryPoint.c

/** @file\r
  Entry point to the Standalone MM Foundation when initialized during the SEC\r
  phase on ARM platforms\r
\r
Copyright (c) 2017 - 2021, Arm Ltd. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
\r
#include <PiMm.h>\r
\r
#include <Library/AArch64/StandaloneMmCoreEntryPoint.h>\r
\r
#include <PiPei.h>\r
#include <Guid/MmramMemoryReserve.h>\r
#include <Guid/MpInformation.h>\r
\r
#include <Library/ArmMmuLib.h>\r
#include <Library/ArmSvcLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/SerialPortLib.h>\r
\r
#include <IndustryStandard/ArmStdSmc.h>\r
#include <IndustryStandard/ArmMmSvc.h>\r
\r
#define SPM_MAJOR_VER_MASK        0xFFFF0000\r
#define SPM_MINOR_VER_MASK        0x0000FFFF\r
#define SPM_MAJOR_VER_SHIFT       16\r
\r
#define SPM_MAJOR_VER             0\r
#define SPM_MINOR_VER             1\r
\r
#define BOOT_PAYLOAD_VERSION      1\r
\r
PI_MM_ARM_TF_CPU_DRIVER_ENTRYPOINT      CpuDriverEntryPoint = NULL;\r
\r
/**\r
  Retrieve a pointer to and print the boot information passed by privileged\r
  secure firmware.\r
\r
  @param  [in] SharedBufAddress   The pointer memory shared with privileged\r
                                  firmware.\r
\r
**/\r
EFI_SECURE_PARTITION_BOOT_INFO *\r
GetAndPrintBootinformation (\r
  IN VOID                      *SharedBufAddress\r
)\r
{\r
  EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;\r
  EFI_SECURE_PARTITION_CPU_INFO  *PayloadCpuInfo;\r
  UINTN                          Index;\r
\r
  PayloadBootInfo = (EFI_SECURE_PARTITION_BOOT_INFO *) SharedBufAddress;\r
\r
  if (PayloadBootInfo == NULL) {\r
    DEBUG ((DEBUG_ERROR, "PayloadBootInfo NULL\n"));\r
    return NULL;\r
  }\r
\r
  if (PayloadBootInfo->Header.Version != BOOT_PAYLOAD_VERSION) {\r
    DEBUG ((DEBUG_ERROR, "Boot Information Version Mismatch. Current=0x%x, Expected=0x%x.\n",\r
            PayloadBootInfo->Header.Version, BOOT_PAYLOAD_VERSION));\r
    return NULL;\r
  }\r
\r
  DEBUG ((DEBUG_INFO, "NumSpMemRegions - 0x%x\n", PayloadBootInfo->NumSpMemRegions));\r
  DEBUG ((DEBUG_INFO, "SpMemBase       - 0x%lx\n", PayloadBootInfo->SpMemBase));\r
  DEBUG ((DEBUG_INFO, "SpMemLimit      - 0x%lx\n", PayloadBootInfo->SpMemLimit));\r
  DEBUG ((DEBUG_INFO, "SpImageBase     - 0x%lx\n", PayloadBootInfo->SpImageBase));\r
  DEBUG ((DEBUG_INFO, "SpStackBase     - 0x%lx\n", PayloadBootInfo->SpStackBase));\r
  DEBUG ((DEBUG_INFO, "SpHeapBase      - 0x%lx\n", PayloadBootInfo->SpHeapBase));\r
  DEBUG ((DEBUG_INFO, "SpNsCommBufBase - 0x%lx\n", PayloadBootInfo->SpNsCommBufBase));\r
  DEBUG ((DEBUG_INFO, "SpSharedBufBase - 0x%lx\n", PayloadBootInfo->SpSharedBufBase));\r
\r
  DEBUG ((DEBUG_INFO, "SpImageSize     - 0x%x\n", PayloadBootInfo->SpImageSize));\r
  DEBUG ((DEBUG_INFO, "SpPcpuStackSize - 0x%x\n", PayloadBootInfo->SpPcpuStackSize));\r
  DEBUG ((DEBUG_INFO, "SpHeapSize      - 0x%x\n", PayloadBootInfo->SpHeapSize));\r
  DEBUG ((DEBUG_INFO, "SpNsCommBufSize - 0x%x\n", PayloadBootInfo->SpNsCommBufSize));\r
  DEBUG ((DEBUG_INFO, "SpPcpuSharedBufSize - 0x%x\n", PayloadBootInfo->SpPcpuSharedBufSize));\r
\r
  DEBUG ((DEBUG_INFO, "NumCpus         - 0x%x\n", PayloadBootInfo->NumCpus));\r
  DEBUG ((DEBUG_INFO, "CpuInfo         - 0x%p\n", PayloadBootInfo->CpuInfo));\r
\r
  PayloadCpuInfo = (EFI_SECURE_PARTITION_CPU_INFO *) PayloadBootInfo->CpuInfo;\r
\r
  if (PayloadCpuInfo == NULL) {\r
    DEBUG ((DEBUG_ERROR, "PayloadCpuInfo NULL\n"));\r
    return NULL;\r
  }\r
\r
  for (Index = 0; Index < PayloadBootInfo->NumCpus; Index++) {\r
    DEBUG ((DEBUG_INFO, "Mpidr           - 0x%lx\n", PayloadCpuInfo[Index].Mpidr));\r
    DEBUG ((DEBUG_INFO, "LinearId        - 0x%x\n", PayloadCpuInfo[Index].LinearId));\r
    DEBUG ((DEBUG_INFO, "Flags           - 0x%x\n", PayloadCpuInfo[Index].Flags));\r
  }\r
\r
  return PayloadBootInfo;\r
}\r
\r
/**\r
  A loop to delegated events.\r
\r
  @param  [in] EventCompleteSvcArgs   Pointer to the event completion arguments.\r
\r
**/\r
VOID\r
EFIAPI\r
DelegatedEventLoop (\r
  IN ARM_SVC_ARGS *EventCompleteSvcArgs\r
  )\r
{\r
  EFI_STATUS Status;\r
  UINTN SvcStatus;\r
\r
  while (TRUE) {\r
    ArmCallSvc (EventCompleteSvcArgs);\r
\r
    DEBUG ((DEBUG_INFO, "Received delegated event\n"));\r
    DEBUG ((DEBUG_INFO, "X0 :  0x%x\n", (UINT32) EventCompleteSvcArgs->Arg0));\r
    DEBUG ((DEBUG_INFO, "X1 :  0x%x\n", (UINT32) EventCompleteSvcArgs->Arg1));\r
    DEBUG ((DEBUG_INFO, "X2 :  0x%x\n", (UINT32) EventCompleteSvcArgs->Arg2));\r
    DEBUG ((DEBUG_INFO, "X3 :  0x%x\n", (UINT32) EventCompleteSvcArgs->Arg3));\r
\r
    Status = CpuDriverEntryPoint (\r
               EventCompleteSvcArgs->Arg0,\r
               EventCompleteSvcArgs->Arg3,\r
               EventCompleteSvcArgs->Arg1\r
               );\r
\r
    if (EFI_ERROR (Status)) {\r
      DEBUG ((DEBUG_ERROR, "Failed delegated event 0x%x, Status 0x%x\n",\r
              EventCompleteSvcArgs->Arg0, Status));\r
    }\r
\r
    switch (Status) {\r
    case EFI_SUCCESS:\r
      SvcStatus = ARM_SVC_SPM_RET_SUCCESS;\r
      break;\r
    case EFI_INVALID_PARAMETER:\r
      SvcStatus = ARM_SVC_SPM_RET_INVALID_PARAMS;\r
      break;\r
    case EFI_ACCESS_DENIED:\r
      SvcStatus = ARM_SVC_SPM_RET_DENIED;\r
      break;\r
    case EFI_OUT_OF_RESOURCES:\r
      SvcStatus = ARM_SVC_SPM_RET_NO_MEMORY;\r
      break;\r
    case EFI_UNSUPPORTED:\r
      SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r
      break;\r
    default:\r
      SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r
      break;\r
    }\r
\r
    EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r
    EventCompleteSvcArgs->Arg1 = SvcStatus;\r
  }\r
}\r
\r
/**\r
  Query the SPM version, check compatibility and return success if compatible.\r
\r
  @retval EFI_SUCCESS       SPM versions compatible.\r
  @retval EFI_UNSUPPORTED   SPM versions not compatible.\r
**/\r
STATIC\r
EFI_STATUS\r
GetSpmVersion (VOID)\r
{\r
  EFI_STATUS   Status;\r
  UINT16       SpmMajorVersion;\r
  UINT16       SpmMinorVersion;\r
  UINT32       SpmVersion;\r
  ARM_SVC_ARGS SpmVersionArgs;\r
\r
  SpmVersionArgs.Arg0 = ARM_SVC_ID_SPM_VERSION_AARCH32;\r
\r
  ArmCallSvc (&SpmVersionArgs);\r
\r
  SpmVersion = SpmVersionArgs.Arg0;\r
\r
  SpmMajorVersion = ((SpmVersion & SPM_MAJOR_VER_MASK) >> SPM_MAJOR_VER_SHIFT);\r
  SpmMinorVersion = ((SpmVersion & SPM_MINOR_VER_MASK) >> 0);\r
\r
  // Different major revision values indicate possibly incompatible functions.\r
  // For two revisions, A and B, for which the major revision values are\r
  // identical, if the minor revision value of revision B is greater than\r
  // the minor revision value of revision A, then every function in\r
  // revision A must work in a compatible way with revision B.\r
  // However, it is possible for revision B to have a higher\r
  // function count than revision A.\r
  if ((SpmMajorVersion == SPM_MAJOR_VER) &&\r
      (SpmMinorVersion >= SPM_MINOR_VER))\r
  {\r
    DEBUG ((DEBUG_INFO, "SPM Version: Major=0x%x, Minor=0x%x\n",\r
           SpmMajorVersion, SpmMinorVersion));\r
    Status = EFI_SUCCESS;\r
  }\r
  else\r
  {\r
    DEBUG ((DEBUG_INFO, "Incompatible SPM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",\r
            SpmMajorVersion, SpmMinorVersion, SPM_MAJOR_VER, SPM_MINOR_VER));\r
    Status = EFI_UNSUPPORTED;\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  The entry point of Standalone MM Foundation.\r
\r
  @param  [in]  SharedBufAddress  Pointer to the Buffer between SPM and SP.\r
  @param  [in]  SharedBufSize     Size of the shared buffer.\r
  @param  [in]  cookie1           Cookie 1\r
  @param  [in]  cookie2           Cookie 2\r
\r
**/\r
VOID\r
EFIAPI\r
_ModuleEntryPoint (\r
  IN VOID    *SharedBufAddress,\r
  IN UINT64  SharedBufSize,\r
  IN UINT64  cookie1,\r
  IN UINT64  cookie2\r
  )\r
{\r
  PE_COFF_LOADER_IMAGE_CONTEXT            ImageContext;\r
  EFI_SECURE_PARTITION_BOOT_INFO          *PayloadBootInfo;\r
  ARM_SVC_ARGS                            InitMmFoundationSvcArgs;\r
  EFI_STATUS                              Status;\r
  UINT32                                  SectionHeaderOffset;\r
  UINT16                                  NumberOfSections;\r
  VOID                                    *HobStart;\r
  VOID                                    *TeData;\r
  UINTN                                   TeDataSize;\r
  EFI_PHYSICAL_ADDRESS                    ImageBase;\r
\r
  // Get Secure Partition Manager Version Information\r
  Status = GetSpmVersion ();\r
  if (EFI_ERROR (Status)) {\r
    goto finish;\r
  }\r
\r
  PayloadBootInfo = GetAndPrintBootinformation (SharedBufAddress);\r
  if (PayloadBootInfo == NULL) {\r
    Status = EFI_UNSUPPORTED;\r
    goto finish;\r
  }\r
\r
  // Locate PE/COFF File information for the Standalone MM core module\r
  Status = LocateStandaloneMmCorePeCoffData (\r
             (EFI_FIRMWARE_VOLUME_HEADER *) PayloadBootInfo->SpImageBase,\r
             &TeData,\r
             &TeDataSize\r
             );\r
\r
  if (EFI_ERROR (Status)) {\r
    goto finish;\r
  }\r
\r
  // Obtain the PE/COFF Section information for the Standalone MM core module\r
  Status = GetStandaloneMmCorePeCoffSections (\r
             TeData,\r
             &ImageContext,\r
             &ImageBase,\r
             &SectionHeaderOffset,\r
             &NumberOfSections\r
             );\r
\r
  if (EFI_ERROR (Status)) {\r
    goto finish;\r
  }\r
\r
  //\r
  // ImageBase may deviate from ImageContext.ImageAddress if we are dealing\r
  // with a TE image, in which case the latter points to the actual offset\r
  // of the image, whereas ImageBase refers to the address where the image\r
  // would start if the stripped PE headers were still in place. In either\r
  // case, we need to fix up ImageBase so it refers to the actual current\r
  // load address.\r
  //\r
  ImageBase += (UINTN)TeData - ImageContext.ImageAddress;\r
\r
  // Update the memory access permissions of individual sections in the\r
  // Standalone MM core module\r
  Status = UpdateMmFoundationPeCoffPermissions (\r
             &ImageContext,\r
             ImageBase,\r
             SectionHeaderOffset,\r
             NumberOfSections,\r
             ArmSetMemoryRegionNoExec,\r
             ArmSetMemoryRegionReadOnly,\r
             ArmClearMemoryRegionReadOnly\r
             );\r
\r
  if (EFI_ERROR (Status)) {\r
    goto finish;\r
  }\r
\r
  if (ImageContext.ImageAddress != (UINTN)TeData) {\r
    ImageContext.ImageAddress = (UINTN)TeData;\r
    ArmSetMemoryRegionNoExec (ImageBase, SIZE_4KB);\r
    ArmClearMemoryRegionReadOnly (ImageBase, SIZE_4KB);\r
\r
    Status = PeCoffLoaderRelocateImage (&ImageContext);\r
    ASSERT_EFI_ERROR (Status);\r
  }\r
\r
  //\r
  // Create Hoblist based upon boot information passed by privileged software\r
  //\r
  HobStart = CreateHobListFromBootInfo (&CpuDriverEntryPoint, PayloadBootInfo);\r
\r
  //\r
  // Call the MM Core entry point\r
  //\r
  ProcessModuleEntryPointList (HobStart);\r
\r
  DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP 0x%lx\n", (UINT64) CpuDriverEntryPoint));\r
\r
finish:\r
  ZeroMem (&InitMmFoundationSvcArgs, sizeof(InitMmFoundationSvcArgs));\r
  InitMmFoundationSvcArgs.Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r
  InitMmFoundationSvcArgs.Arg1 = Status;\r
  DelegatedEventLoop (&InitMmFoundationSvcArgs);\r
}\r
Commit	Line	Data
184558d0 SV	1	/** @file\r
	2	Entry point to the Standalone MM Foundation when initialized during the SEC\r
	3	phase on ARM platforms\r
	4	\r
764942a2	5	Copyright (c) 2017 - 2021, Arm Ltd. All rights reserved.<BR>\r
86094561	6	SPDX-License-Identifier: BSD-2-Clause-Patent\r
184558d0 SV	7	\r
	8	**/\r
	9	\r
	10	\r
	11	#include <PiMm.h>\r
	12	\r
	13	#include <Library/AArch64/StandaloneMmCoreEntryPoint.h>\r
	14	\r
	15	#include <PiPei.h>\r
	16	#include <Guid/MmramMemoryReserve.h>\r
	17	#include <Guid/MpInformation.h>\r
	18	\r
	19	#include <Library/ArmMmuLib.h>\r
	20	#include <Library/ArmSvcLib.h>\r
	21	#include <Library/DebugLib.h>\r
	22	#include <Library/HobLib.h>\r
	23	#include <Library/BaseLib.h>\r
	24	#include <Library/BaseMemoryLib.h>\r
	25	#include <Library/SerialPortLib.h>\r
	26	\r
	27	#include <IndustryStandard/ArmStdSmc.h>\r
	28	#include <IndustryStandard/ArmMmSvc.h>\r
	29	\r
	30	#define SPM_MAJOR_VER_MASK 0xFFFF0000\r
	31	#define SPM_MINOR_VER_MASK 0x0000FFFF\r
	32	#define SPM_MAJOR_VER_SHIFT 16\r
	33	\r
05270532 SM	34	#define SPM_MAJOR_VER 0\r
05270532 SM	35	#define SPM_MINOR_VER 1\r
184558d0	36	\r
05270532	37	#define BOOT_PAYLOAD_VERSION 1\r
184558d0 SV	38	\r
	39	PI_MM_ARM_TF_CPU_DRIVER_ENTRYPOINT CpuDriverEntryPoint = NULL;\r
	40	\r
	41	/**\r
	42	Retrieve a pointer to and print the boot information passed by privileged\r
561c3630	43	secure firmware.\r
184558d0	44	\r
561c3630 SM	45	@param [in] SharedBufAddress The pointer memory shared with privileged\r
561c3630 SM	46	firmware.\r
184558d0 SV	47	\r
	48	**/\r
	49	EFI_SECURE_PARTITION_BOOT_INFO *\r
	50	GetAndPrintBootinformation (\r
	51	IN VOID *SharedBufAddress\r
	52	)\r
	53	{\r
	54	EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;\r
	55	EFI_SECURE_PARTITION_CPU_INFO *PayloadCpuInfo;\r
	56	UINTN Index;\r
	57	\r
	58	PayloadBootInfo = (EFI_SECURE_PARTITION_BOOT_INFO *) SharedBufAddress;\r
	59	\r
	60	if (PayloadBootInfo == NULL) {\r
	61	DEBUG ((DEBUG_ERROR, "PayloadBootInfo NULL\n"));\r
	62	return NULL;\r
	63	}\r
	64	\r
	65	if (PayloadBootInfo->Header.Version != BOOT_PAYLOAD_VERSION) {\r
	66	DEBUG ((DEBUG_ERROR, "Boot Information Version Mismatch. Current=0x%x, Expected=0x%x.\n",\r
	67	PayloadBootInfo->Header.Version, BOOT_PAYLOAD_VERSION));\r
	68	return NULL;\r
	69	}\r
	70	\r
	71	DEBUG ((DEBUG_INFO, "NumSpMemRegions - 0x%x\n", PayloadBootInfo->NumSpMemRegions));\r
	72	DEBUG ((DEBUG_INFO, "SpMemBase - 0x%lx\n", PayloadBootInfo->SpMemBase));\r
	73	DEBUG ((DEBUG_INFO, "SpMemLimit - 0x%lx\n", PayloadBootInfo->SpMemLimit));\r
	74	DEBUG ((DEBUG_INFO, "SpImageBase - 0x%lx\n", PayloadBootInfo->SpImageBase));\r
	75	DEBUG ((DEBUG_INFO, "SpStackBase - 0x%lx\n", PayloadBootInfo->SpStackBase));\r
	76	DEBUG ((DEBUG_INFO, "SpHeapBase - 0x%lx\n", PayloadBootInfo->SpHeapBase));\r
	77	DEBUG ((DEBUG_INFO, "SpNsCommBufBase - 0x%lx\n", PayloadBootInfo->SpNsCommBufBase));\r
	78	DEBUG ((DEBUG_INFO, "SpSharedBufBase - 0x%lx\n", PayloadBootInfo->SpSharedBufBase));\r
	79	\r
	80	DEBUG ((DEBUG_INFO, "SpImageSize - 0x%x\n", PayloadBootInfo->SpImageSize));\r
	81	DEBUG ((DEBUG_INFO, "SpPcpuStackSize - 0x%x\n", PayloadBootInfo->SpPcpuStackSize));\r
	82	DEBUG ((DEBUG_INFO, "SpHeapSize - 0x%x\n", PayloadBootInfo->SpHeapSize));\r
	83	DEBUG ((DEBUG_INFO, "SpNsCommBufSize - 0x%x\n", PayloadBootInfo->SpNsCommBufSize));\r
	84	DEBUG ((DEBUG_INFO, "SpPcpuSharedBufSize - 0x%x\n", PayloadBootInfo->SpPcpuSharedBufSize));\r
	85	\r
	86	DEBUG ((DEBUG_INFO, "NumCpus - 0x%x\n", PayloadBootInfo->NumCpus));\r
	87	DEBUG ((DEBUG_INFO, "CpuInfo - 0x%p\n", PayloadBootInfo->CpuInfo));\r
	88	\r
	89	PayloadCpuInfo = (EFI_SECURE_PARTITION_CPU_INFO *) PayloadBootInfo->CpuInfo;\r
	90	\r
	91	if (PayloadCpuInfo == NULL) {\r
	92	DEBUG ((DEBUG_ERROR, "PayloadCpuInfo NULL\n"));\r
	93	return NULL;\r
	94	}\r
	95	\r
	96	for (Index = 0; Index < PayloadBootInfo->NumCpus; Index++) {\r
	97	DEBUG ((DEBUG_INFO, "Mpidr - 0x%lx\n", PayloadCpuInfo[Index].Mpidr));\r
	98	DEBUG ((DEBUG_INFO, "LinearId - 0x%x\n", PayloadCpuInfo[Index].LinearId));\r
	99	DEBUG ((DEBUG_INFO, "Flags - 0x%x\n", PayloadCpuInfo[Index].Flags));\r
	100	}\r
	101	\r
	102	return PayloadBootInfo;\r
	103	}\r
	104	\r
764942a2 SM	105	/**\r
	106	A loop to delegated events.\r
	107	\r
	108	@param [in] EventCompleteSvcArgs Pointer to the event completion arguments.\r
	109	\r
	110	**/\r
184558d0 SV	111	VOID\r
	112	EFIAPI\r
	113	DelegatedEventLoop (\r
	114	IN ARM_SVC_ARGS *EventCompleteSvcArgs\r
	115	)\r
	116	{\r
	117	EFI_STATUS Status;\r
	118	UINTN SvcStatus;\r
	119	\r
	120	while (TRUE) {\r
	121	ArmCallSvc (EventCompleteSvcArgs);\r
	122	\r
	123	DEBUG ((DEBUG_INFO, "Received delegated event\n"));\r
	124	DEBUG ((DEBUG_INFO, "X0 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg0));\r
	125	DEBUG ((DEBUG_INFO, "X1 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg1));\r
	126	DEBUG ((DEBUG_INFO, "X2 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg2));\r
	127	DEBUG ((DEBUG_INFO, "X3 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg3));\r
	128	\r
	129	Status = CpuDriverEntryPoint (\r
	130	EventCompleteSvcArgs->Arg0,\r
	131	EventCompleteSvcArgs->Arg3,\r
	132	EventCompleteSvcArgs->Arg1\r
	133	);\r
	134	\r
	135	if (EFI_ERROR (Status)) {\r
	136	DEBUG ((DEBUG_ERROR, "Failed delegated event 0x%x, Status 0x%x\n",\r
	137	EventCompleteSvcArgs->Arg0, Status));\r
	138	}\r
	139	\r
	140	switch (Status) {\r
	141	case EFI_SUCCESS:\r
	142	SvcStatus = ARM_SVC_SPM_RET_SUCCESS;\r
	143	break;\r
	144	case EFI_INVALID_PARAMETER:\r
	145	SvcStatus = ARM_SVC_SPM_RET_INVALID_PARAMS;\r
	146	break;\r
	147	case EFI_ACCESS_DENIED:\r
	148	SvcStatus = ARM_SVC_SPM_RET_DENIED;\r
	149	break;\r
	150	case EFI_OUT_OF_RESOURCES:\r
	151	SvcStatus = ARM_SVC_SPM_RET_NO_MEMORY;\r
	152	break;\r
	153	case EFI_UNSUPPORTED:\r
	154	SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r
	155	break;\r
	156	default:\r
	157	SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r
	158	break;\r
	159	}\r
	160	\r
	161	EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r
	162	EventCompleteSvcArgs->Arg1 = SvcStatus;\r
	163	}\r
	164	}\r
	165	\r
764942a2 SM	166	/**\r
	167	Query the SPM version, check compatibility and return success if compatible.\r
	168	\r
	169	@retval EFI_SUCCESS SPM versions compatible.\r
	170	@retval EFI_UNSUPPORTED SPM versions not compatible.\r
	171	**/\r
184558d0 SV	172	STATIC\r
	173	EFI_STATUS\r
	174	GetSpmVersion (VOID)\r
	175	{\r
	176	EFI_STATUS Status;\r
	177	UINT16 SpmMajorVersion;\r
	178	UINT16 SpmMinorVersion;\r
	179	UINT32 SpmVersion;\r
	180	ARM_SVC_ARGS SpmVersionArgs;\r
	181	\r
	182	SpmVersionArgs.Arg0 = ARM_SVC_ID_SPM_VERSION_AARCH32;\r
	183	\r
	184	ArmCallSvc (&SpmVersionArgs);\r
	185	\r
	186	SpmVersion = SpmVersionArgs.Arg0;\r
	187	\r
	188	SpmMajorVersion = ((SpmVersion & SPM_MAJOR_VER_MASK) >> SPM_MAJOR_VER_SHIFT);\r
	189	SpmMinorVersion = ((SpmVersion & SPM_MINOR_VER_MASK) >> 0);\r
	190	\r
	191	// Different major revision values indicate possibly incompatible functions.\r
	192	// For two revisions, A and B, for which the major revision values are\r
	193	// identical, if the minor revision value of revision B is greater than\r
	194	// the minor revision value of revision A, then every function in\r
	195	// revision A must work in a compatible way with revision B.\r
	196	// However, it is possible for revision B to have a higher\r
	197	// function count than revision A.\r
	198	if ((SpmMajorVersion == SPM_MAJOR_VER) &&\r
	199	(SpmMinorVersion >= SPM_MINOR_VER))\r
	200	{\r
	201	DEBUG ((DEBUG_INFO, "SPM Version: Major=0x%x, Minor=0x%x\n",\r
	202	SpmMajorVersion, SpmMinorVersion));\r
	203	Status = EFI_SUCCESS;\r
	204	}\r
	205	else\r
	206	{\r
	207	DEBUG ((DEBUG_INFO, "Incompatible SPM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",\r
	208	SpmMajorVersion, SpmMinorVersion, SPM_MAJOR_VER, SPM_MINOR_VER));\r
	209	Status = EFI_UNSUPPORTED;\r
	210	}\r
	211	\r
	212	return Status;\r
	213	}\r
	214	\r
	215	/**\r
	216	The entry point of Standalone MM Foundation.\r
	217	\r
4779bc6c SM	218	@param [in] SharedBufAddress Pointer to the Buffer between SPM and SP.\r
	219	@param [in] SharedBufSize Size of the shared buffer.\r
	220	@param [in] cookie1 Cookie 1\r
	221	@param [in] cookie2 Cookie 2\r
184558d0 SV	222	\r
	223	**/\r
	224	VOID\r
	225	EFIAPI\r
	226	_ModuleEntryPoint (\r
	227	IN VOID *SharedBufAddress,\r
	228	IN UINT64 SharedBufSize,\r
	229	IN UINT64 cookie1,\r
	230	IN UINT64 cookie2\r
	231	)\r
	232	{\r
	233	PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;\r
	234	EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;\r
d4951425	235	ARM_SVC_ARGS InitMmFoundationSvcArgs;\r
184558d0 SV	236	EFI_STATUS Status;\r
	237	UINT32 SectionHeaderOffset;\r
	238	UINT16 NumberOfSections;\r
	239	VOID *HobStart;\r
	240	VOID *TeData;\r
	241	UINTN TeDataSize;\r
493f2c69	242	EFI_PHYSICAL_ADDRESS ImageBase;\r
184558d0	243	\r
184558d0 SV	244	// Get Secure Partition Manager Version Information\r
	245	Status = GetSpmVersion ();\r
	246	if (EFI_ERROR (Status)) {\r
	247	goto finish;\r
	248	}\r
	249	\r
	250	PayloadBootInfo = GetAndPrintBootinformation (SharedBufAddress);\r
	251	if (PayloadBootInfo == NULL) {\r
	252	Status = EFI_UNSUPPORTED;\r
	253	goto finish;\r
	254	}\r
	255	\r
	256	// Locate PE/COFF File information for the Standalone MM core module\r
	257	Status = LocateStandaloneMmCorePeCoffData (\r
	258	(EFI_FIRMWARE_VOLUME_HEADER *) PayloadBootInfo->SpImageBase,\r
	259	&TeData,\r
	260	&TeDataSize\r
	261	);\r
	262	\r
	263	if (EFI_ERROR (Status)) {\r
	264	goto finish;\r
	265	}\r
	266	\r
	267	// Obtain the PE/COFF Section information for the Standalone MM core module\r
	268	Status = GetStandaloneMmCorePeCoffSections (\r
	269	TeData,\r
	270	&ImageContext,\r
493f2c69	271	&ImageBase,\r
184558d0 SV	272	&SectionHeaderOffset,\r
	273	&NumberOfSections\r
	274	);\r
	275	\r
	276	if (EFI_ERROR (Status)) {\r
	277	goto finish;\r
	278	}\r
	279	\r
493f2c69 AB	280	//\r
	281	// ImageBase may deviate from ImageContext.ImageAddress if we are dealing\r
	282	// with a TE image, in which case the latter points to the actual offset\r
	283	// of the image, whereas ImageBase refers to the address where the image\r
	284	// would start if the stripped PE headers were still in place. In either\r
	285	// case, we need to fix up ImageBase so it refers to the actual current\r
	286	// load address.\r
	287	//\r
	288	ImageBase += (UINTN)TeData - ImageContext.ImageAddress;\r
	289	\r
184558d0 SV	290	// Update the memory access permissions of individual sections in the\r
	291	// Standalone MM core module\r
	292	Status = UpdateMmFoundationPeCoffPermissions (\r
	293	&ImageContext,\r
493f2c69	294	ImageBase,\r
184558d0 SV	295	SectionHeaderOffset,\r
	296	NumberOfSections,\r
	297	ArmSetMemoryRegionNoExec,\r
	298	ArmSetMemoryRegionReadOnly,\r
	299	ArmClearMemoryRegionReadOnly\r
	300	);\r
	301	\r
	302	if (EFI_ERROR (Status)) {\r
	303	goto finish;\r
	304	}\r
	305	\r
493f2c69 AB	306	if (ImageContext.ImageAddress != (UINTN)TeData) {\r
	307	ImageContext.ImageAddress = (UINTN)TeData;\r
	308	ArmSetMemoryRegionNoExec (ImageBase, SIZE_4KB);\r
	309	ArmClearMemoryRegionReadOnly (ImageBase, SIZE_4KB);\r
	310	\r
	311	Status = PeCoffLoaderRelocateImage (&ImageContext);\r
	312	ASSERT_EFI_ERROR (Status);\r
	313	}\r
	314	\r
184558d0 SV	315	//\r
	316	// Create Hoblist based upon boot information passed by privileged software\r
	317	//\r
	318	HobStart = CreateHobListFromBootInfo (&CpuDriverEntryPoint, PayloadBootInfo);\r
	319	\r
	320	//\r
	321	// Call the MM Core entry point\r
	322	//\r
	323	ProcessModuleEntryPointList (HobStart);\r
	324	\r
184558d0 SV	325	DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP 0x%lx\n", (UINT64) CpuDriverEntryPoint));\r
	326	\r
	327	finish:\r
d4951425	328	ZeroMem (&InitMmFoundationSvcArgs, sizeof(InitMmFoundationSvcArgs));\r
184558d0 SV	329	InitMmFoundationSvcArgs.Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r
	330	InitMmFoundationSvcArgs.Arg1 = Status;\r
	331	DelegatedEventLoop (&InitMmFoundationSvcArgs);\r
184558d0	332	}\r