[mirror_edk2.git] / StandaloneMmPkg / Library / StandaloneMmCoreEntryPoint / AArch64 / StandaloneMmCoreEntryPoint.c

/** @file\r
  Entry point to the Standalone MM Foundation when initialized during the SEC\r
  phase on ARM platforms\r
\r
Copyright (c) 2017 - 2021, Arm Ltd. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
\r
#include <PiMm.h>\r
\r
#include <Library/AArch64/StandaloneMmCoreEntryPoint.h>\r
\r
#include <PiPei.h>\r
#include <Guid/MmramMemoryReserve.h>\r
#include <Guid/MpInformation.h>\r
\r
#include <Library/ArmMmuLib.h>\r
#include <Library/ArmSvcLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/SerialPortLib.h>\r
\r
#include <IndustryStandard/ArmStdSmc.h>\r
#include <IndustryStandard/ArmMmSvc.h>\r
\r
#define SPM_MAJOR_VER_MASK        0xFFFF0000\r
#define SPM_MINOR_VER_MASK        0x0000FFFF\r
#define SPM_MAJOR_VER_SHIFT       16\r
\r
CONST UINT32 SPM_MAJOR_VER = 0;\r
CONST UINT32 SPM_MINOR_VER = 1;\r
\r
CONST UINT8 BOOT_PAYLOAD_VERSION = 1;\r
\r
PI_MM_ARM_TF_CPU_DRIVER_ENTRYPOINT      CpuDriverEntryPoint = NULL;\r
\r
/**\r
  Retrieve a pointer to and print the boot information passed by privileged\r
  secure firmware\r
\r
  @param  SharedBufAddress The pointer memory shared with privileged firmware\r
\r
**/\r
EFI_SECURE_PARTITION_BOOT_INFO *\r
GetAndPrintBootinformation (\r
  IN VOID                      *SharedBufAddress\r
)\r
{\r
  EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;\r
  EFI_SECURE_PARTITION_CPU_INFO  *PayloadCpuInfo;\r
  UINTN                          Index;\r
\r
  PayloadBootInfo = (EFI_SECURE_PARTITION_BOOT_INFO *) SharedBufAddress;\r
\r
  if (PayloadBootInfo == NULL) {\r
    DEBUG ((DEBUG_ERROR, "PayloadBootInfo NULL\n"));\r
    return NULL;\r
  }\r
\r
  if (PayloadBootInfo->Header.Version != BOOT_PAYLOAD_VERSION) {\r
    DEBUG ((DEBUG_ERROR, "Boot Information Version Mismatch. Current=0x%x, Expected=0x%x.\n",\r
            PayloadBootInfo->Header.Version, BOOT_PAYLOAD_VERSION));\r
    return NULL;\r
  }\r
\r
  DEBUG ((DEBUG_INFO, "NumSpMemRegions - 0x%x\n", PayloadBootInfo->NumSpMemRegions));\r
  DEBUG ((DEBUG_INFO, "SpMemBase       - 0x%lx\n", PayloadBootInfo->SpMemBase));\r
  DEBUG ((DEBUG_INFO, "SpMemLimit      - 0x%lx\n", PayloadBootInfo->SpMemLimit));\r
  DEBUG ((DEBUG_INFO, "SpImageBase     - 0x%lx\n", PayloadBootInfo->SpImageBase));\r
  DEBUG ((DEBUG_INFO, "SpStackBase     - 0x%lx\n", PayloadBootInfo->SpStackBase));\r
  DEBUG ((DEBUG_INFO, "SpHeapBase      - 0x%lx\n", PayloadBootInfo->SpHeapBase));\r
  DEBUG ((DEBUG_INFO, "SpNsCommBufBase - 0x%lx\n", PayloadBootInfo->SpNsCommBufBase));\r
  DEBUG ((DEBUG_INFO, "SpSharedBufBase - 0x%lx\n", PayloadBootInfo->SpSharedBufBase));\r
\r
  DEBUG ((DEBUG_INFO, "SpImageSize     - 0x%x\n", PayloadBootInfo->SpImageSize));\r
  DEBUG ((DEBUG_INFO, "SpPcpuStackSize - 0x%x\n", PayloadBootInfo->SpPcpuStackSize));\r
  DEBUG ((DEBUG_INFO, "SpHeapSize      - 0x%x\n", PayloadBootInfo->SpHeapSize));\r
  DEBUG ((DEBUG_INFO, "SpNsCommBufSize - 0x%x\n", PayloadBootInfo->SpNsCommBufSize));\r
  DEBUG ((DEBUG_INFO, "SpPcpuSharedBufSize - 0x%x\n", PayloadBootInfo->SpPcpuSharedBufSize));\r
\r
  DEBUG ((DEBUG_INFO, "NumCpus         - 0x%x\n", PayloadBootInfo->NumCpus));\r
  DEBUG ((DEBUG_INFO, "CpuInfo         - 0x%p\n", PayloadBootInfo->CpuInfo));\r
\r
  PayloadCpuInfo = (EFI_SECURE_PARTITION_CPU_INFO *) PayloadBootInfo->CpuInfo;\r
\r
  if (PayloadCpuInfo == NULL) {\r
    DEBUG ((DEBUG_ERROR, "PayloadCpuInfo NULL\n"));\r
    return NULL;\r
  }\r
\r
  for (Index = 0; Index < PayloadBootInfo->NumCpus; Index++) {\r
    DEBUG ((DEBUG_INFO, "Mpidr           - 0x%lx\n", PayloadCpuInfo[Index].Mpidr));\r
    DEBUG ((DEBUG_INFO, "LinearId        - 0x%x\n", PayloadCpuInfo[Index].LinearId));\r
    DEBUG ((DEBUG_INFO, "Flags           - 0x%x\n", PayloadCpuInfo[Index].Flags));\r
  }\r
\r
  return PayloadBootInfo;\r
}\r
\r
/**\r
  A loop to delegated events.\r
\r
  @param  [in] EventCompleteSvcArgs   Pointer to the event completion arguments.\r
\r
**/\r
VOID\r
EFIAPI\r
DelegatedEventLoop (\r
  IN ARM_SVC_ARGS *EventCompleteSvcArgs\r
  )\r
{\r
  EFI_STATUS Status;\r
  UINTN SvcStatus;\r
\r
  while (TRUE) {\r
    ArmCallSvc (EventCompleteSvcArgs);\r
\r
    DEBUG ((DEBUG_INFO, "Received delegated event\n"));\r
    DEBUG ((DEBUG_INFO, "X0 :  0x%x\n", (UINT32) EventCompleteSvcArgs->Arg0));\r
    DEBUG ((DEBUG_INFO, "X1 :  0x%x\n", (UINT32) EventCompleteSvcArgs->Arg1));\r
    DEBUG ((DEBUG_INFO, "X2 :  0x%x\n", (UINT32) EventCompleteSvcArgs->Arg2));\r
    DEBUG ((DEBUG_INFO, "X3 :  0x%x\n", (UINT32) EventCompleteSvcArgs->Arg3));\r
\r
    Status = CpuDriverEntryPoint (\r
               EventCompleteSvcArgs->Arg0,\r
               EventCompleteSvcArgs->Arg3,\r
               EventCompleteSvcArgs->Arg1\r
               );\r
\r
    if (EFI_ERROR (Status)) {\r
      DEBUG ((DEBUG_ERROR, "Failed delegated event 0x%x, Status 0x%x\n",\r
              EventCompleteSvcArgs->Arg0, Status));\r
    }\r
\r
    switch (Status) {\r
    case EFI_SUCCESS:\r
      SvcStatus = ARM_SVC_SPM_RET_SUCCESS;\r
      break;\r
    case EFI_INVALID_PARAMETER:\r
      SvcStatus = ARM_SVC_SPM_RET_INVALID_PARAMS;\r
      break;\r
    case EFI_ACCESS_DENIED:\r
      SvcStatus = ARM_SVC_SPM_RET_DENIED;\r
      break;\r
    case EFI_OUT_OF_RESOURCES:\r
      SvcStatus = ARM_SVC_SPM_RET_NO_MEMORY;\r
      break;\r
    case EFI_UNSUPPORTED:\r
      SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r
      break;\r
    default:\r
      SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r
      break;\r
    }\r
\r
    EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r
    EventCompleteSvcArgs->Arg1 = SvcStatus;\r
  }\r
}\r
\r
/**\r
  Query the SPM version, check compatibility and return success if compatible.\r
\r
  @retval EFI_SUCCESS       SPM versions compatible.\r
  @retval EFI_UNSUPPORTED   SPM versions not compatible.\r
**/\r
STATIC\r
EFI_STATUS\r
GetSpmVersion (VOID)\r
{\r
  EFI_STATUS   Status;\r
  UINT16       SpmMajorVersion;\r
  UINT16       SpmMinorVersion;\r
  UINT32       SpmVersion;\r
  ARM_SVC_ARGS SpmVersionArgs;\r
\r
  SpmVersionArgs.Arg0 = ARM_SVC_ID_SPM_VERSION_AARCH32;\r
\r
  ArmCallSvc (&SpmVersionArgs);\r
\r
  SpmVersion = SpmVersionArgs.Arg0;\r
\r
  SpmMajorVersion = ((SpmVersion & SPM_MAJOR_VER_MASK) >> SPM_MAJOR_VER_SHIFT);\r
  SpmMinorVersion = ((SpmVersion & SPM_MINOR_VER_MASK) >> 0);\r
\r
  // Different major revision values indicate possibly incompatible functions.\r
  // For two revisions, A and B, for which the major revision values are\r
  // identical, if the minor revision value of revision B is greater than\r
  // the minor revision value of revision A, then every function in\r
  // revision A must work in a compatible way with revision B.\r
  // However, it is possible for revision B to have a higher\r
  // function count than revision A.\r
  if ((SpmMajorVersion == SPM_MAJOR_VER) &&\r
      (SpmMinorVersion >= SPM_MINOR_VER))\r
  {\r
    DEBUG ((DEBUG_INFO, "SPM Version: Major=0x%x, Minor=0x%x\n",\r
           SpmMajorVersion, SpmMinorVersion));\r
    Status = EFI_SUCCESS;\r
  }\r
  else\r
  {\r
    DEBUG ((DEBUG_INFO, "Incompatible SPM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",\r
            SpmMajorVersion, SpmMinorVersion, SPM_MAJOR_VER, SPM_MINOR_VER));\r
    Status = EFI_UNSUPPORTED;\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  The entry point of Standalone MM Foundation.\r
\r
  @param  SharedBufAddress  Pointer to the Buffer between SPM and SP.\r
  @param  cookie1.\r
  @param  cookie2.\r
\r
**/\r
VOID\r
EFIAPI\r
_ModuleEntryPoint (\r
  IN VOID    *SharedBufAddress,\r
  IN UINT64  SharedBufSize,\r
  IN UINT64  cookie1,\r
  IN UINT64  cookie2\r
  )\r
{\r
  PE_COFF_LOADER_IMAGE_CONTEXT            ImageContext;\r
  EFI_SECURE_PARTITION_BOOT_INFO          *PayloadBootInfo;\r
  ARM_SVC_ARGS                            InitMmFoundationSvcArgs;\r
  EFI_STATUS                              Status;\r
  UINT32                                  SectionHeaderOffset;\r
  UINT16                                  NumberOfSections;\r
  VOID                                    *HobStart;\r
  VOID                                    *TeData;\r
  UINTN                                   TeDataSize;\r
  EFI_PHYSICAL_ADDRESS                    ImageBase;\r
\r
  // Get Secure Partition Manager Version Information\r
  Status = GetSpmVersion ();\r
  if (EFI_ERROR (Status)) {\r
    goto finish;\r
  }\r
\r
  PayloadBootInfo = GetAndPrintBootinformation (SharedBufAddress);\r
  if (PayloadBootInfo == NULL) {\r
    Status = EFI_UNSUPPORTED;\r
    goto finish;\r
  }\r
\r
  // Locate PE/COFF File information for the Standalone MM core module\r
  Status = LocateStandaloneMmCorePeCoffData (\r
             (EFI_FIRMWARE_VOLUME_HEADER *) PayloadBootInfo->SpImageBase,\r
             &TeData,\r
             &TeDataSize\r
             );\r
\r
  if (EFI_ERROR (Status)) {\r
    goto finish;\r
  }\r
\r
  // Obtain the PE/COFF Section information for the Standalone MM core module\r
  Status = GetStandaloneMmCorePeCoffSections (\r
             TeData,\r
             &ImageContext,\r
             &ImageBase,\r
             &SectionHeaderOffset,\r
             &NumberOfSections\r
             );\r
\r
  if (EFI_ERROR (Status)) {\r
    goto finish;\r
  }\r
\r
  //\r
  // ImageBase may deviate from ImageContext.ImageAddress if we are dealing\r
  // with a TE image, in which case the latter points to the actual offset\r
  // of the image, whereas ImageBase refers to the address where the image\r
  // would start if the stripped PE headers were still in place. In either\r
  // case, we need to fix up ImageBase so it refers to the actual current\r
  // load address.\r
  //\r
  ImageBase += (UINTN)TeData - ImageContext.ImageAddress;\r
\r
  // Update the memory access permissions of individual sections in the\r
  // Standalone MM core module\r
  Status = UpdateMmFoundationPeCoffPermissions (\r
             &ImageContext,\r
             ImageBase,\r
             SectionHeaderOffset,\r
             NumberOfSections,\r
             ArmSetMemoryRegionNoExec,\r
             ArmSetMemoryRegionReadOnly,\r
             ArmClearMemoryRegionReadOnly\r
             );\r
\r
  if (EFI_ERROR (Status)) {\r
    goto finish;\r
  }\r
\r
  if (ImageContext.ImageAddress != (UINTN)TeData) {\r
    ImageContext.ImageAddress = (UINTN)TeData;\r
    ArmSetMemoryRegionNoExec (ImageBase, SIZE_4KB);\r
    ArmClearMemoryRegionReadOnly (ImageBase, SIZE_4KB);\r
\r
    Status = PeCoffLoaderRelocateImage (&ImageContext);\r
    ASSERT_EFI_ERROR (Status);\r
  }\r
\r
  //\r
  // Create Hoblist based upon boot information passed by privileged software\r
  //\r
  HobStart = CreateHobListFromBootInfo (&CpuDriverEntryPoint, PayloadBootInfo);\r
\r
  //\r
  // Call the MM Core entry point\r
  //\r
  ProcessModuleEntryPointList (HobStart);\r
\r
  DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP 0x%lx\n", (UINT64) CpuDriverEntryPoint));\r
\r
finish:\r
  ZeroMem (&InitMmFoundationSvcArgs, sizeof(InitMmFoundationSvcArgs));\r
  InitMmFoundationSvcArgs.Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r
  InitMmFoundationSvcArgs.Arg1 = Status;\r
  DelegatedEventLoop (&InitMmFoundationSvcArgs);\r
}\r
Commit	Line	Data
184558d0 SV	1	/** @file\r
	2	Entry point to the Standalone MM Foundation when initialized during the SEC\r
	3	phase on ARM platforms\r
	4	\r
764942a2	5	Copyright (c) 2017 - 2021, Arm Ltd. All rights reserved.<BR>\r
86094561	6	SPDX-License-Identifier: BSD-2-Clause-Patent\r
184558d0 SV	7	\r
	8	**/\r
	9	\r
	10	\r
	11	#include <PiMm.h>\r
	12	\r
	13	#include <Library/AArch64/StandaloneMmCoreEntryPoint.h>\r
	14	\r
	15	#include <PiPei.h>\r
	16	#include <Guid/MmramMemoryReserve.h>\r
	17	#include <Guid/MpInformation.h>\r
	18	\r
	19	#include <Library/ArmMmuLib.h>\r
	20	#include <Library/ArmSvcLib.h>\r
	21	#include <Library/DebugLib.h>\r
	22	#include <Library/HobLib.h>\r
	23	#include <Library/BaseLib.h>\r
	24	#include <Library/BaseMemoryLib.h>\r
	25	#include <Library/SerialPortLib.h>\r
	26	\r
	27	#include <IndustryStandard/ArmStdSmc.h>\r
	28	#include <IndustryStandard/ArmMmSvc.h>\r
	29	\r
	30	#define SPM_MAJOR_VER_MASK 0xFFFF0000\r
	31	#define SPM_MINOR_VER_MASK 0x0000FFFF\r
	32	#define SPM_MAJOR_VER_SHIFT 16\r
	33	\r
	34	CONST UINT32 SPM_MAJOR_VER = 0;\r
	35	CONST UINT32 SPM_MINOR_VER = 1;\r
	36	\r
	37	CONST UINT8 BOOT_PAYLOAD_VERSION = 1;\r
	38	\r
	39	PI_MM_ARM_TF_CPU_DRIVER_ENTRYPOINT CpuDriverEntryPoint = NULL;\r
	40	\r
	41	/**\r
	42	Retrieve a pointer to and print the boot information passed by privileged\r
	43	secure firmware\r
	44	\r
	45	@param SharedBufAddress The pointer memory shared with privileged firmware\r
	46	\r
	47	**/\r
	48	EFI_SECURE_PARTITION_BOOT_INFO *\r
	49	GetAndPrintBootinformation (\r
	50	IN VOID *SharedBufAddress\r
	51	)\r
	52	{\r
	53	EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;\r
	54	EFI_SECURE_PARTITION_CPU_INFO *PayloadCpuInfo;\r
	55	UINTN Index;\r
	56	\r
	57	PayloadBootInfo = (EFI_SECURE_PARTITION_BOOT_INFO *) SharedBufAddress;\r
	58	\r
	59	if (PayloadBootInfo == NULL) {\r
	60	DEBUG ((DEBUG_ERROR, "PayloadBootInfo NULL\n"));\r
	61	return NULL;\r
	62	}\r
	63	\r
	64	if (PayloadBootInfo->Header.Version != BOOT_PAYLOAD_VERSION) {\r
	65	DEBUG ((DEBUG_ERROR, "Boot Information Version Mismatch. Current=0x%x, Expected=0x%x.\n",\r
	66	PayloadBootInfo->Header.Version, BOOT_PAYLOAD_VERSION));\r
	67	return NULL;\r
	68	}\r
	69	\r
	70	DEBUG ((DEBUG_INFO, "NumSpMemRegions - 0x%x\n", PayloadBootInfo->NumSpMemRegions));\r
71	DEBUG ((DEBUG_INFO, "SpMemBase - 0x%lx\n", PayloadBootInfo->SpMemBase));\r
72	DEBUG ((DEBUG_INFO, "SpMemLimit - 0x%lx\n", PayloadBootInfo->SpMemLimit));\r
73	DEBUG ((DEBUG_INFO, "SpImageBase - 0x%lx\n", PayloadBootInfo->SpImageBase));\r
74	DEBUG ((DEBUG_INFO, "SpStackBase - 0x%lx\n", PayloadBootInfo->SpStackBase));\r
75	DEBUG ((DEBUG_INFO, "SpHeapBase - 0x%lx\n", PayloadBootInfo->SpHeapBase));\r
76	DEBUG ((DEBUG_INFO, "SpNsCommBufBase - 0x%lx\n", PayloadBootInfo->SpNsCommBufBase));\r
77	DEBUG ((DEBUG_INFO, "SpSharedBufBase - 0x%lx\n", PayloadBootInfo->SpSharedBufBase));\r
78	\r
79	DEBUG ((DEBUG_INFO, "SpImageSize - 0x%x\n", PayloadBootInfo->SpImageSize));\r
80	DEBUG ((DEBUG_INFO, "SpPcpuStackSize - 0x%x\n", PayloadBootInfo->SpPcpuStackSize));\r
81	DEBUG ((DEBUG_INFO, "SpHeapSize - 0x%x\n", PayloadBootInfo->SpHeapSize));\r
82	DEBUG ((DEBUG_INFO, "SpNsCommBufSize - 0x%x\n", PayloadBootInfo->SpNsCommBufSize));\r
83	DEBUG ((DEBUG_INFO, "SpPcpuSharedBufSize - 0x%x\n", PayloadBootInfo->SpPcpuSharedBufSize));\r
84	\r
85	DEBUG ((DEBUG_INFO, "NumCpus - 0x%x\n", PayloadBootInfo->NumCpus));\r
86	DEBUG ((DEBUG_INFO, "CpuInfo - 0x%p\n", PayloadBootInfo->CpuInfo));\r
87	\r
88	PayloadCpuInfo = (EFI_SECURE_PARTITION_CPU_INFO *) PayloadBootInfo->CpuInfo;\r
89	\r
90	if (PayloadCpuInfo == NULL) {\r
91	DEBUG ((DEBUG_ERROR, "PayloadCpuInfo NULL\n"));\r
92	return NULL;\r
93	}\r
94	\r
95	for (Index = 0; Index < PayloadBootInfo->NumCpus; Index++) {\r
96	DEBUG ((DEBUG_INFO, "Mpidr - 0x%lx\n", PayloadCpuInfo[Index].Mpidr));\r
97	DEBUG ((DEBUG_INFO, "LinearId - 0x%x\n", PayloadCpuInfo[Index].LinearId));\r
98	DEBUG ((DEBUG_INFO, "Flags - 0x%x\n", PayloadCpuInfo[Index].Flags));\r
99	}\r
100	\r
101	return PayloadBootInfo;\r
102	}\r
103	\r
764942a2 SM	104	/**\r
	105	A loop to delegated events.\r
	106	\r
	107	@param [in] EventCompleteSvcArgs Pointer to the event completion arguments.\r
	108	\r
	109	**/\r
184558d0 SV	110	VOID\r
	111	EFIAPI\r
	112	DelegatedEventLoop (\r
	113	IN ARM_SVC_ARGS *EventCompleteSvcArgs\r
	114	)\r
	115	{\r
	116	EFI_STATUS Status;\r
	117	UINTN SvcStatus;\r
	118	\r
	119	while (TRUE) {\r
	120	ArmCallSvc (EventCompleteSvcArgs);\r
	121	\r
	122	DEBUG ((DEBUG_INFO, "Received delegated event\n"));\r
	123	DEBUG ((DEBUG_INFO, "X0 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg0));\r
	124	DEBUG ((DEBUG_INFO, "X1 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg1));\r
	125	DEBUG ((DEBUG_INFO, "X2 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg2));\r
	126	DEBUG ((DEBUG_INFO, "X3 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg3));\r
	127	\r
	128	Status = CpuDriverEntryPoint (\r
	129	EventCompleteSvcArgs->Arg0,\r
	130	EventCompleteSvcArgs->Arg3,\r
	131	EventCompleteSvcArgs->Arg1\r
	132	);\r
	133	\r
	134	if (EFI_ERROR (Status)) {\r
	135	DEBUG ((DEBUG_ERROR, "Failed delegated event 0x%x, Status 0x%x\n",\r
	136	EventCompleteSvcArgs->Arg0, Status));\r
	137	}\r
	138	\r
	139	switch (Status) {\r
	140	case EFI_SUCCESS:\r
	141	SvcStatus = ARM_SVC_SPM_RET_SUCCESS;\r
	142	break;\r
	143	case EFI_INVALID_PARAMETER:\r
	144	SvcStatus = ARM_SVC_SPM_RET_INVALID_PARAMS;\r
	145	break;\r
	146	case EFI_ACCESS_DENIED:\r
	147	SvcStatus = ARM_SVC_SPM_RET_DENIED;\r
	148	break;\r
	149	case EFI_OUT_OF_RESOURCES:\r
	150	SvcStatus = ARM_SVC_SPM_RET_NO_MEMORY;\r
	151	break;\r
	152	case EFI_UNSUPPORTED:\r
	153	SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r
	154	break;\r
	155	default:\r
	156	SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r
	157	break;\r
	158	}\r
	159	\r
	160	EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r
	161	EventCompleteSvcArgs->Arg1 = SvcStatus;\r
	162	}\r
	163	}\r
	164	\r
764942a2 SM	165	/**\r
	166	Query the SPM version, check compatibility and return success if compatible.\r
	167	\r
	168	@retval EFI_SUCCESS SPM versions compatible.\r
	169	@retval EFI_UNSUPPORTED SPM versions not compatible.\r
	170	**/\r
184558d0 SV	171	STATIC\r
	172	EFI_STATUS\r
	173	GetSpmVersion (VOID)\r
	174	{\r
	175	EFI_STATUS Status;\r
	176	UINT16 SpmMajorVersion;\r
	177	UINT16 SpmMinorVersion;\r
	178	UINT32 SpmVersion;\r
	179	ARM_SVC_ARGS SpmVersionArgs;\r
	180	\r
	181	SpmVersionArgs.Arg0 = ARM_SVC_ID_SPM_VERSION_AARCH32;\r
	182	\r
	183	ArmCallSvc (&SpmVersionArgs);\r
	184	\r
	185	SpmVersion = SpmVersionArgs.Arg0;\r
	186	\r
	187	SpmMajorVersion = ((SpmVersion & SPM_MAJOR_VER_MASK) >> SPM_MAJOR_VER_SHIFT);\r
	188	SpmMinorVersion = ((SpmVersion & SPM_MINOR_VER_MASK) >> 0);\r
	189	\r
	190	// Different major revision values indicate possibly incompatible functions.\r
	191	// For two revisions, A and B, for which the major revision values are\r
	192	// identical, if the minor revision value of revision B is greater than\r
	193	// the minor revision value of revision A, then every function in\r
	194	// revision A must work in a compatible way with revision B.\r
	195	// However, it is possible for revision B to have a higher\r
	196	// function count than revision A.\r
	197	if ((SpmMajorVersion == SPM_MAJOR_VER) &&\r
	198	(SpmMinorVersion >= SPM_MINOR_VER))\r
	199	{\r
	200	DEBUG ((DEBUG_INFO, "SPM Version: Major=0x%x, Minor=0x%x\n",\r
	201	SpmMajorVersion, SpmMinorVersion));\r
	202	Status = EFI_SUCCESS;\r
	203	}\r
	204	else\r
	205	{\r
	206	DEBUG ((DEBUG_INFO, "Incompatible SPM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",\r
	207	SpmMajorVersion, SpmMinorVersion, SPM_MAJOR_VER, SPM_MINOR_VER));\r
	208	Status = EFI_UNSUPPORTED;\r
	209	}\r
	210	\r
	211	return Status;\r
	212	}\r
	213	\r
	214	/**\r
	215	The entry point of Standalone MM Foundation.\r
	216	\r
	217	@param SharedBufAddress Pointer to the Buffer between SPM and SP.\r
	218	@param cookie1.\r
	219	@param cookie2.\r
	220	\r
	221	**/\r
	222	VOID\r
	223	EFIAPI\r
	224	_ModuleEntryPoint (\r
	225	IN VOID *SharedBufAddress,\r
	226	IN UINT64 SharedBufSize,\r
	227	IN UINT64 cookie1,\r
	228	IN UINT64 cookie2\r
	229	)\r
	230	{\r
	231	PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;\r
	232	EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;\r
d4951425	233	ARM_SVC_ARGS InitMmFoundationSvcArgs;\r
184558d0 SV	234	EFI_STATUS Status;\r
	235	UINT32 SectionHeaderOffset;\r
	236	UINT16 NumberOfSections;\r
	237	VOID *HobStart;\r
	238	VOID *TeData;\r
	239	UINTN TeDataSize;\r
493f2c69	240	EFI_PHYSICAL_ADDRESS ImageBase;\r
184558d0	241	\r
184558d0 SV	242	// Get Secure Partition Manager Version Information\r
	243	Status = GetSpmVersion ();\r
	244	if (EFI_ERROR (Status)) {\r
	245	goto finish;\r
	246	}\r
	247	\r
	248	PayloadBootInfo = GetAndPrintBootinformation (SharedBufAddress);\r
	249	if (PayloadBootInfo == NULL) {\r
	250	Status = EFI_UNSUPPORTED;\r
	251	goto finish;\r
	252	}\r
	253	\r
	254	// Locate PE/COFF File information for the Standalone MM core module\r
	255	Status = LocateStandaloneMmCorePeCoffData (\r
	256	(EFI_FIRMWARE_VOLUME_HEADER *) PayloadBootInfo->SpImageBase,\r
	257	&TeData,\r
	258	&TeDataSize\r
	259	);\r
	260	\r
	261	if (EFI_ERROR (Status)) {\r
	262	goto finish;\r
	263	}\r
	264	\r
	265	// Obtain the PE/COFF Section information for the Standalone MM core module\r
	266	Status = GetStandaloneMmCorePeCoffSections (\r
	267	TeData,\r
	268	&ImageContext,\r
493f2c69	269	&ImageBase,\r
184558d0 SV	270	&SectionHeaderOffset,\r
	271	&NumberOfSections\r
	272	);\r
	273	\r
	274	if (EFI_ERROR (Status)) {\r
	275	goto finish;\r
	276	}\r
	277	\r
493f2c69 AB	278	//\r
	279	// ImageBase may deviate from ImageContext.ImageAddress if we are dealing\r
	280	// with a TE image, in which case the latter points to the actual offset\r
	281	// of the image, whereas ImageBase refers to the address where the image\r
	282	// would start if the stripped PE headers were still in place. In either\r
	283	// case, we need to fix up ImageBase so it refers to the actual current\r
	284	// load address.\r
	285	//\r
	286	ImageBase += (UINTN)TeData - ImageContext.ImageAddress;\r
	287	\r
184558d0 SV	288	// Update the memory access permissions of individual sections in the\r
	289	// Standalone MM core module\r
	290	Status = UpdateMmFoundationPeCoffPermissions (\r
	291	&ImageContext,\r
493f2c69	292	ImageBase,\r
184558d0 SV	293	SectionHeaderOffset,\r
	294	NumberOfSections,\r
	295	ArmSetMemoryRegionNoExec,\r
	296	ArmSetMemoryRegionReadOnly,\r
	297	ArmClearMemoryRegionReadOnly\r
	298	);\r
	299	\r
	300	if (EFI_ERROR (Status)) {\r
	301	goto finish;\r
	302	}\r
	303	\r
493f2c69 AB	304	if (ImageContext.ImageAddress != (UINTN)TeData) {\r
	305	ImageContext.ImageAddress = (UINTN)TeData;\r
	306	ArmSetMemoryRegionNoExec (ImageBase, SIZE_4KB);\r
	307	ArmClearMemoryRegionReadOnly (ImageBase, SIZE_4KB);\r
	308	\r
	309	Status = PeCoffLoaderRelocateImage (&ImageContext);\r
	310	ASSERT_EFI_ERROR (Status);\r
	311	}\r
	312	\r
184558d0 SV	313	//\r
	314	// Create Hoblist based upon boot information passed by privileged software\r
	315	//\r
	316	HobStart = CreateHobListFromBootInfo (&CpuDriverEntryPoint, PayloadBootInfo);\r
	317	\r
	318	//\r
	319	// Call the MM Core entry point\r
	320	//\r
	321	ProcessModuleEntryPointList (HobStart);\r
	322	\r
184558d0 SV	323	DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP 0x%lx\n", (UINT64) CpuDriverEntryPoint));\r
	324	\r
	325	finish:\r
d4951425	326	ZeroMem (&InitMmFoundationSvcArgs, sizeof(InitMmFoundationSvcArgs));\r
184558d0 SV	327	InitMmFoundationSvcArgs.Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r
	328	InitMmFoundationSvcArgs.Arg1 = Status;\r
	329	DelegatedEventLoop (&InitMmFoundationSvcArgs);\r
184558d0	330	}\r