StdLib: Remove EfiSocketLib and Ip4Config Protocol dependency.

[mirror_edk2.git] / StdLib / Include / X64 / machine / atomic.h

/*	$NetBSD: atomic.h,v 1.4 2005/12/28 19:09:29 perry Exp $	*/\r
\r
/*\r
 * Copyright 2002 (c) Wasabi Systems, Inc.\r
 * All rights reserved.\r
 *\r
 * Written by Frank van der Linden for Wasabi Systems, Inc.\r
 *\r
 * Redistribution and use in source and binary forms, with or without\r
 * modification, are permitted provided that the following conditions\r
 * are met:\r
 * 1. Redistributions of source code must retain the above copyright\r
 *    notice, this list of conditions and the following disclaimer.\r
 * 2. Redistributions in binary form must reproduce the above copyright\r
 *    notice, this list of conditions and the following disclaimer in the\r
 *    documentation and/or other materials provided with the distribution.\r
 * 3. All advertising materials mentioning features or use of this software\r
 *    must display the following acknowledgement:\r
 *      This product includes software developed for the NetBSD Project by\r
 *      Wasabi Systems, Inc.\r
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse\r
 *    or promote products derived from this software without specific prior\r
 *    written permission.\r
 *\r
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND\r
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED\r
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR\r
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC\r
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\r
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\r
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\r
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
 * POSSIBILITY OF SUCH DAMAGE.\r
 */\r
\r
#ifndef _ATOMIC_H\r
#define _ATOMIC_H\r
\r
#ifndef _LOCORE\r
\r
static __inline u_int64_t\r
x86_atomic_testset_u64(volatile u_int64_t *ptr, u_int64_t val) {\r
    __asm volatile ("xchgq %0,(%2)" :"=r" (val):"0" (val),"r" (ptr));\r
    return val;\r
}\r
\r
static __inline u_int32_t\r
x86_atomic_testset_u32(volatile u_int32_t *ptr, u_int32_t val) {\r
    __asm volatile ("xchgl %0,(%2)" :"=r" (val):"0" (val),"r" (ptr));\r
    return val;\r
}\r
\r
\r
\r
static __inline int32_t\r
x86_atomic_testset_i32(volatile int32_t *ptr, int32_t val) {\r
    __asm volatile ("xchgl %0,(%2)" :"=r" (val):"0" (val),"r" (ptr));\r
    return val;\r
}\r
\r
\r
\r
static __inline void\r
x86_atomic_setbits_u32(volatile u_int32_t *ptr, u_int32_t bits) {\r
    __asm volatile("lock ; orl %1,%0" :  "=m" (*ptr) : "ir" (bits));\r
}\r
\r
static __inline void\r
x86_atomic_clearbits_u32(volatile u_int32_t *ptr, u_int32_t bits) {\r
    __asm volatile("lock ; andl %1,%0" :  "=m" (*ptr) : "ir" (~bits));\r
}\r
\r
\r
\r
static __inline void\r
x86_atomic_setbits_u64(volatile u_int64_t *ptr, u_int64_t bits) {\r
    __asm volatile("lock ; orq %1,%0" :  "=m" (*ptr) : "ir" (~bits));\r
}\r
\r
static __inline void\r
x86_atomic_clearbits_u64(volatile u_int64_t *ptr, u_int64_t bits) {\r
    __asm volatile("lock ; andq %1,%0" :  "=m" (*ptr) : "ir" (~bits));\r
}\r
\r
#define x86_atomic_testset_ul	x86_atomic_testset_u32\r
#define x86_atomic_testset_i	x86_atomic_testset_i32\r
#define x86_atomic_setbits_l	x86_atomic_setbits_u32\r
#define x86_atomic_setbits_ul	x86_atomic_setbits_u32\r
#define x86_atomic_clearbits_l	x86_atomic_clearbits_u32\r
#define x86_atomic_clearbits_ul	x86_atomic_clearbits_u32\r
\r
#endif\r
#endif\r