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ea0f431c JF |
1 | /** @file\r |
2 | CPU PEI Module installs CPU Multiple Processor PPI.\r | |
3 | \r | |
4da1ebf3 | 4 | Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r |
ea0f431c JF |
5 | This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "CpuMpPei.h"\r | |
ea0f431c JF |
16 | \r |
17 | GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {\r | |
18 | (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
19 | &gEfiEndOfPeiSignalPpiGuid,\r | |
20 | CpuMpEndOfPeiCallback\r | |
21 | };\r | |
22 | \r | |
23 | /**\r | |
24 | Sort the APIC ID of all processors.\r | |
25 | \r | |
26 | This function sorts the APIC ID of all processors so that processor number is\r | |
27 | assigned in the ascending order of APIC ID which eases MP debugging.\r | |
28 | \r | |
29 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
30 | **/\r | |
31 | VOID\r | |
32 | SortApicId (\r | |
33 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
34 | )\r | |
35 | {\r | |
36 | UINTN Index1;\r | |
37 | UINTN Index2;\r | |
38 | UINTN Index3;\r | |
39 | UINT32 ApicId;\r | |
24930b56 | 40 | PEI_CPU_DATA CpuData;\r |
ea0f431c JF |
41 | UINT32 ApCount;\r |
42 | \r | |
43 | ApCount = PeiCpuMpData->CpuCount - 1;\r | |
44 | \r | |
45 | if (ApCount != 0) {\r | |
46 | for (Index1 = 0; Index1 < ApCount; Index1++) {\r | |
47 | Index3 = Index1;\r | |
48 | //\r | |
49 | // Sort key is the hardware default APIC ID\r | |
50 | //\r | |
51 | ApicId = PeiCpuMpData->CpuData[Index1].ApicId;\r | |
52 | for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {\r | |
53 | if (ApicId > PeiCpuMpData->CpuData[Index2].ApicId) {\r | |
54 | Index3 = Index2;\r | |
55 | ApicId = PeiCpuMpData->CpuData[Index2].ApicId;\r | |
56 | }\r | |
57 | }\r | |
58 | if (Index3 != Index1) {\r | |
24930b56 JF |
59 | CopyMem (&CpuData, &PeiCpuMpData->CpuData[Index3], sizeof (PEI_CPU_DATA));\r |
60 | CopyMem (\r | |
61 | &PeiCpuMpData->CpuData[Index3],\r | |
62 | &PeiCpuMpData->CpuData[Index1],\r | |
63 | sizeof (PEI_CPU_DATA)\r | |
64 | );\r | |
65 | CopyMem (&PeiCpuMpData->CpuData[Index1], &CpuData, sizeof (PEI_CPU_DATA));\r | |
ea0f431c JF |
66 | }\r |
67 | }\r | |
68 | \r | |
69 | //\r | |
70 | // Get the processor number for the BSP\r | |
71 | //\r | |
72 | ApicId = GetInitialApicId ();\r | |
73 | for (Index1 = 0; Index1 < PeiCpuMpData->CpuCount; Index1++) {\r | |
74 | if (PeiCpuMpData->CpuData[Index1].ApicId == ApicId) {\r | |
75 | PeiCpuMpData->BspNumber = (UINT32) Index1;\r | |
76 | break;\r | |
77 | }\r | |
78 | }\r | |
79 | }\r | |
80 | }\r | |
81 | \r | |
c7981a11 JF |
82 | /**\r |
83 | Enable x2APIC mode on APs.\r | |
84 | \r | |
85 | @param Buffer Pointer to private data buffer.\r | |
86 | **/\r | |
87 | VOID\r | |
88 | EFIAPI\r | |
89 | ApFuncEnableX2Apic (\r | |
90 | IN OUT VOID *Buffer\r | |
91 | )\r | |
92 | {\r | |
93 | SetApicMode (LOCAL_APIC_MODE_X2APIC);\r | |
94 | }\r | |
95 | \r | |
4de216c0 JF |
96 | /**\r |
97 | Get AP loop mode.\r | |
98 | \r | |
99 | @param MonitorFilterSize Returns the largest monitor-line size in bytes.\r | |
100 | \r | |
101 | @return The AP loop mode.\r | |
102 | **/\r | |
103 | UINT8\r | |
104 | GetApLoopMode (\r | |
105 | OUT UINT16 *MonitorFilterSize\r | |
106 | )\r | |
107 | {\r | |
108 | UINT8 ApLoopMode;\r | |
109 | UINT32 RegEbx;\r | |
110 | UINT32 RegEcx;\r | |
111 | UINT32 RegEdx;\r | |
112 | \r | |
113 | ASSERT (MonitorFilterSize != NULL);\r | |
114 | \r | |
115 | ApLoopMode = PcdGet8 (PcdCpuApLoopMode);\r | |
116 | ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);\r | |
117 | if (ApLoopMode == ApInMwaitLoop) {\r | |
118 | AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &RegEcx, NULL);\r | |
119 | if ((RegEcx & BIT3) == 0) {\r | |
120 | //\r | |
121 | // If processor does not support MONITOR/MWAIT feature\r | |
122 | // by CPUID.[EAX=01H]:ECX.BIT3, force AP in Hlt-loop mode\r | |
123 | //\r | |
124 | ApLoopMode = ApInHltLoop;\r | |
125 | }\r | |
126 | }\r | |
127 | \r | |
128 | if (ApLoopMode == ApInHltLoop) {\r | |
129 | *MonitorFilterSize = 0;\r | |
130 | } else if (ApLoopMode == ApInRunLoop) {\r | |
131 | *MonitorFilterSize = sizeof (UINT32);\r | |
132 | } else if (ApLoopMode == ApInMwaitLoop) {\r | |
133 | //\r | |
134 | // CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes\r | |
135 | // CPUID.[EAX=05H].EDX: C-states supported using MWAIT\r | |
136 | //\r | |
137 | AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &RegEbx, NULL, &RegEdx);\r | |
138 | *MonitorFilterSize = RegEbx & 0xFFFF;\r | |
139 | }\r | |
140 | \r | |
141 | return ApLoopMode;\r | |
142 | }\r | |
143 | \r | |
ea0f431c JF |
144 | /**\r |
145 | Get CPU MP Data pointer from the Guided HOB.\r | |
146 | \r | |
147 | @return Pointer to Pointer to PEI CPU MP Data\r | |
148 | **/\r | |
149 | PEI_CPU_MP_DATA *\r | |
150 | GetMpHobData (\r | |
151 | VOID\r | |
152 | )\r | |
153 | {\r | |
154 | EFI_HOB_GUID_TYPE *GuidHob;\r | |
155 | VOID *DataInHob;\r | |
156 | PEI_CPU_MP_DATA *CpuMpData;\r | |
157 | \r | |
158 | CpuMpData = NULL;\r | |
159 | GuidHob = GetFirstGuidHob (&gEfiCallerIdGuid);\r | |
160 | if (GuidHob != NULL) {\r | |
161 | DataInHob = GET_GUID_HOB_DATA (GuidHob);\r | |
162 | CpuMpData = (PEI_CPU_MP_DATA *)(*(UINTN *)DataInHob);\r | |
163 | }\r | |
164 | ASSERT (CpuMpData != NULL);\r | |
165 | return CpuMpData;\r | |
166 | }\r | |
167 | \r | |
ef1fdb80 | 168 | /**\r |
5ac96e3a | 169 | Save the volatile registers required to be restored following INIT IPI.\r |
ef1fdb80 JF |
170 | \r |
171 | @param VolatileRegisters Returns buffer saved the volatile resisters\r | |
172 | **/\r | |
173 | VOID\r | |
174 | SaveVolatileRegisters (\r | |
175 | OUT CPU_VOLATILE_REGISTERS *VolatileRegisters\r | |
176 | )\r | |
177 | {\r | |
178 | UINT32 RegEdx;\r | |
179 | \r | |
180 | VolatileRegisters->Cr0 = AsmReadCr0 ();\r | |
181 | VolatileRegisters->Cr3 = AsmReadCr3 ();\r | |
182 | VolatileRegisters->Cr4 = AsmReadCr4 ();\r | |
183 | \r | |
184 | AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);\r | |
185 | if ((RegEdx & BIT2) != 0) {\r | |
186 | //\r | |
187 | // If processor supports Debugging Extensions feature\r | |
188 | // by CPUID.[EAX=01H]:EDX.BIT2\r | |
189 | //\r | |
190 | VolatileRegisters->Dr0 = AsmReadDr0 ();\r | |
191 | VolatileRegisters->Dr1 = AsmReadDr1 ();\r | |
192 | VolatileRegisters->Dr2 = AsmReadDr2 ();\r | |
193 | VolatileRegisters->Dr3 = AsmReadDr3 ();\r | |
194 | VolatileRegisters->Dr6 = AsmReadDr6 ();\r | |
195 | VolatileRegisters->Dr7 = AsmReadDr7 ();\r | |
196 | }\r | |
197 | }\r | |
198 | \r | |
199 | /**\r | |
5ac96e3a | 200 | Restore the volatile registers following INIT IPI.\r |
ef1fdb80 JF |
201 | \r |
202 | @param VolatileRegisters Pointer to volatile resisters\r | |
203 | @param IsRestoreDr TRUE: Restore DRx if supported\r | |
204 | FALSE: Do not restore DRx\r | |
205 | **/\r | |
206 | VOID\r | |
207 | RestoreVolatileRegisters (\r | |
208 | IN CPU_VOLATILE_REGISTERS *VolatileRegisters,\r | |
209 | IN BOOLEAN IsRestoreDr\r | |
210 | )\r | |
211 | {\r | |
212 | UINT32 RegEdx;\r | |
213 | \r | |
214 | AsmWriteCr0 (VolatileRegisters->Cr0);\r | |
215 | AsmWriteCr3 (VolatileRegisters->Cr3);\r | |
216 | AsmWriteCr4 (VolatileRegisters->Cr4);\r | |
217 | \r | |
218 | if (IsRestoreDr) {\r | |
219 | AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);\r | |
220 | if ((RegEdx & BIT2) != 0) {\r | |
221 | //\r | |
222 | // If processor supports Debugging Extensions feature\r | |
223 | // by CPUID.[EAX=01H]:EDX.BIT2\r | |
224 | //\r | |
225 | AsmWriteDr0 (VolatileRegisters->Dr0);\r | |
226 | AsmWriteDr1 (VolatileRegisters->Dr1);\r | |
227 | AsmWriteDr2 (VolatileRegisters->Dr2);\r | |
228 | AsmWriteDr3 (VolatileRegisters->Dr3);\r | |
229 | AsmWriteDr6 (VolatileRegisters->Dr6);\r | |
230 | AsmWriteDr7 (VolatileRegisters->Dr7);\r | |
231 | }\r | |
232 | }\r | |
233 | }\r | |
234 | \r | |
ea0f431c JF |
235 | /**\r |
236 | This function will be called from AP reset code if BSP uses WakeUpAP.\r | |
237 | \r | |
238 | @param ExchangeInfo Pointer to the MP exchange info buffer\r | |
c972495e | 239 | @param NumApsExecuting Number of current executing AP\r |
ea0f431c JF |
240 | **/\r |
241 | VOID\r | |
242 | EFIAPI\r | |
243 | ApCFunction (\r | |
244 | IN MP_CPU_EXCHANGE_INFO *ExchangeInfo,\r | |
245 | IN UINTN NumApsExecuting\r | |
246 | )\r | |
247 | {\r | |
248 | PEI_CPU_MP_DATA *PeiCpuMpData;\r | |
249 | UINTN ProcessorNumber;\r | |
250 | EFI_AP_PROCEDURE Procedure;\r | |
251 | UINTN BistData;\r | |
c87e41b4 | 252 | volatile UINT32 *ApStartupSignalBuffer;\r |
ea0f431c JF |
253 | \r |
254 | PeiCpuMpData = ExchangeInfo->PeiCpuMpData;\r | |
c87e41b4 JF |
255 | while (TRUE) {\r |
256 | if (PeiCpuMpData->InitFlag) {\r | |
257 | ProcessorNumber = NumApsExecuting;\r | |
258 | //\r | |
259 | // Sync BSP's Control registers to APs\r | |
260 | //\r | |
261 | RestoreVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters, FALSE);\r | |
262 | //\r | |
263 | // This is first time AP wakeup, get BIST information from AP stack\r | |
264 | //\r | |
265 | BistData = *(UINTN *) (PeiCpuMpData->Buffer + ProcessorNumber * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));\r | |
266 | PeiCpuMpData->CpuData[ProcessorNumber].Health.Uint32 = (UINT32) BistData;\r | |
267 | PeiCpuMpData->CpuData[ProcessorNumber].ApicId = GetInitialApicId ();\r | |
268 | if (PeiCpuMpData->CpuData[ProcessorNumber].ApicId >= 0xFF) {\r | |
269 | //\r | |
270 | // Set x2APIC mode if there are any logical processor reporting\r | |
271 | // an APIC ID of 255 or greater.\r | |
272 | //\r | |
273 | AcquireSpinLock(&PeiCpuMpData->MpLock);\r | |
274 | PeiCpuMpData->X2ApicEnable = TRUE;\r | |
275 | ReleaseSpinLock(&PeiCpuMpData->MpLock);\r | |
276 | }\r | |
277 | //\r | |
278 | // Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.\r | |
279 | //\r | |
280 | MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);\r | |
719ff8cf | 281 | MicrocodeDetect (PeiCpuMpData);\r |
c87e41b4 JF |
282 | PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r |
283 | } else {\r | |
2f0261b7 | 284 | //\r |
c87e41b4 | 285 | // Execute AP function if AP is not disabled\r |
2f0261b7 | 286 | //\r |
c87e41b4 JF |
287 | GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r |
288 | if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {\r | |
289 | //\r | |
290 | // Restore AP's volatile registers saved\r | |
291 | //\r | |
292 | RestoreVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);\r | |
293 | }\r | |
294 | \r | |
295 | if ((PeiCpuMpData->CpuData[ProcessorNumber].State != CpuStateDisabled) &&\r | |
296 | (PeiCpuMpData->ApFunction != 0)) {\r | |
297 | PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateBusy;\r | |
298 | Procedure = (EFI_AP_PROCEDURE)(UINTN)PeiCpuMpData->ApFunction;\r | |
299 | //\r | |
300 | // Invoke AP function here\r | |
301 | //\r | |
302 | Procedure ((VOID *)(UINTN)PeiCpuMpData->ApFunctionArgument);\r | |
303 | //\r | |
304 | // Re-get the processor number due to BSP/AP maybe exchange in AP function\r | |
305 | //\r | |
306 | GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r | |
307 | PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r | |
308 | }\r | |
2f0261b7 | 309 | }\r |
c87e41b4 | 310 | \r |
ea0f431c | 311 | //\r |
c87e41b4 | 312 | // AP finished executing C code\r |
ea0f431c | 313 | //\r |
c87e41b4 JF |
314 | InterlockedIncrement ((UINT32 *)&PeiCpuMpData->FinishedCount);\r |
315 | \r | |
ea0f431c | 316 | //\r |
c87e41b4 | 317 | // Place AP is specified loop mode\r |
ea0f431c | 318 | //\r |
c87e41b4 JF |
319 | if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {\r |
320 | //\r | |
321 | // Save AP volatile registers\r | |
322 | //\r | |
323 | SaveVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters);\r | |
324 | //\r | |
325 | // Place AP in Hlt-loop\r | |
326 | //\r | |
327 | while (TRUE) {\r | |
328 | DisableInterrupts ();\r | |
329 | CpuSleep ();\r | |
330 | CpuPause ();\r | |
331 | }\r | |
332 | }\r | |
333 | ApStartupSignalBuffer = PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal;\r | |
c87e41b4 JF |
334 | while (TRUE) {\r |
335 | DisableInterrupts ();\r | |
336 | if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r | |
337 | //\r | |
338 | // Place AP in Mwait-loop\r | |
339 | //\r | |
340 | AsmMonitor ((UINTN)ApStartupSignalBuffer, 0, 0);\r | |
341 | if (*ApStartupSignalBuffer != WAKEUP_AP_SIGNAL) {\r | |
342 | //\r | |
343 | // If AP start-up signal is not set, place AP into\r | |
344 | // the maximum C-state\r | |
345 | //\r | |
346 | AsmMwait (PeiCpuMpData->ApTargetCState << 4, 0);\r | |
347 | }\r | |
348 | } else if (PeiCpuMpData->ApLoopMode == ApInRunLoop) {\r | |
349 | //\r | |
350 | // Place AP in Run-loop\r | |
351 | //\r | |
352 | CpuPause ();\r | |
353 | } else {\r | |
354 | ASSERT (FALSE);\r | |
355 | }\r | |
f40a7de4 | 356 | \r |
c972495e | 357 | //\r |
c87e41b4 JF |
358 | // If AP start-up signal is written, AP is waken up\r |
359 | // otherwise place AP in loop again\r | |
c972495e | 360 | //\r |
c87e41b4 | 361 | if (*ApStartupSignalBuffer == WAKEUP_AP_SIGNAL) {\r |
4da1ebf3 JF |
362 | //\r |
363 | // Clear AP start-up signal when AP waken up\r | |
364 | //\r | |
365 | InterlockedCompareExchange32 (\r | |
366 | (UINT32 *)ApStartupSignalBuffer,\r | |
367 | WAKEUP_AP_SIGNAL,\r | |
368 | 0\r | |
369 | );\r | |
c87e41b4 JF |
370 | break;\r |
371 | }\r | |
ea0f431c JF |
372 | }\r |
373 | }\r | |
ea0f431c JF |
374 | }\r |
375 | \r | |
4da1ebf3 JF |
376 | /**\r |
377 | Write AP start-up signal to wakeup AP.\r | |
378 | \r | |
379 | @param ApStartupSignalBuffer Pointer to AP wakeup signal\r | |
380 | **/\r | |
381 | VOID\r | |
382 | WriteStartupSignal (\r | |
383 | IN volatile UINT32 *ApStartupSignalBuffer\r | |
384 | )\r | |
385 | {\r | |
386 | *ApStartupSignalBuffer = WAKEUP_AP_SIGNAL;\r | |
387 | //\r | |
388 | // If AP is waken up, StartupApSignal should be cleared.\r | |
389 | // Otherwise, write StartupApSignal again till AP waken up.\r | |
390 | //\r | |
391 | while (InterlockedCompareExchange32 (\r | |
392 | (UINT32 *)ApStartupSignalBuffer,\r | |
393 | WAKEUP_AP_SIGNAL,\r | |
394 | WAKEUP_AP_SIGNAL\r | |
395 | ) != 0) {\r | |
396 | CpuPause ();\r | |
397 | }\r | |
398 | }\r | |
399 | \r | |
ea0f431c JF |
400 | /**\r |
401 | This function will be called by BSP to wakeup AP.\r | |
402 | \r | |
403 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
404 | @param Broadcast TRUE: Send broadcast IPI to all APs\r | |
405 | FALSE: Send IPI to AP by ApicId\r | |
a09647f3 | 406 | @param ProcessorNumber The handle number of specified processor\r |
ea0f431c JF |
407 | @param Procedure The function to be invoked by AP\r |
408 | @param ProcedureArgument The argument to be passed into AP function\r | |
409 | **/\r | |
410 | VOID\r | |
411 | WakeUpAP (\r | |
412 | IN PEI_CPU_MP_DATA *PeiCpuMpData,\r | |
413 | IN BOOLEAN Broadcast,\r | |
a09647f3 | 414 | IN UINTN ProcessorNumber,\r |
ea0f431c JF |
415 | IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r |
416 | IN VOID *ProcedureArgument OPTIONAL\r | |
417 | )\r | |
418 | {\r | |
419 | volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r | |
a09647f3 | 420 | UINTN Index;\r |
ea0f431c JF |
421 | \r |
422 | PeiCpuMpData->ApFunction = (UINTN) Procedure;\r | |
423 | PeiCpuMpData->ApFunctionArgument = (UINTN) ProcedureArgument;\r | |
424 | PeiCpuMpData->FinishedCount = 0;\r | |
425 | \r | |
426 | ExchangeInfo = PeiCpuMpData->MpCpuExchangeInfo;\r | |
427 | ExchangeInfo->Lock = 0;\r | |
428 | ExchangeInfo->StackStart = PeiCpuMpData->Buffer;\r | |
429 | ExchangeInfo->StackSize = PeiCpuMpData->CpuApStackSize;\r | |
430 | ExchangeInfo->BufferStart = PeiCpuMpData->WakeupBuffer;\r | |
01beffa7 | 431 | ExchangeInfo->ModeOffset = PeiCpuMpData->AddressMap.ModeEntryOffset;\r |
ea0f431c | 432 | ExchangeInfo->Cr3 = AsmReadCr3 ();\r |
ed04bffe JF |
433 | ExchangeInfo->CodeSegment = AsmReadCs ();\r |
434 | ExchangeInfo->DataSegment = AsmReadDs ();\r | |
ea0f431c JF |
435 | ExchangeInfo->CFunction = (UINTN) ApCFunction;\r |
436 | ExchangeInfo->NumApsExecuting = 0;\r | |
437 | ExchangeInfo->PeiCpuMpData = PeiCpuMpData;\r | |
438 | \r | |
439 | //\r | |
440 | // Get the BSP's data of GDT and IDT\r | |
441 | //\r | |
9c3d2f9a | 442 | AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);\r |
ea0f431c JF |
443 | AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r |
444 | \r | |
a09647f3 JF |
445 | if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r |
446 | //\r | |
447 | // Get AP target C-state each time when waking up AP,\r | |
448 | // for it maybe updated by platform again\r | |
449 | //\r | |
450 | PeiCpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);\r | |
ea0f431c JF |
451 | }\r |
452 | \r | |
a09647f3 JF |
453 | //\r |
454 | // Wakeup APs per AP loop state\r | |
455 | //\r | |
456 | if (PeiCpuMpData->ApLoopMode == ApInHltLoop || PeiCpuMpData->InitFlag) {\r | |
457 | if (Broadcast) {\r | |
458 | SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r | |
459 | } else {\r | |
460 | SendInitSipiSipi (\r | |
461 | PeiCpuMpData->CpuData[ProcessorNumber].ApicId,\r | |
462 | (UINT32) ExchangeInfo->BufferStart\r | |
463 | );\r | |
464 | }\r | |
465 | } else if ((PeiCpuMpData->ApLoopMode == ApInMwaitLoop) ||\r | |
466 | (PeiCpuMpData->ApLoopMode == ApInRunLoop)) {\r | |
467 | if (Broadcast) {\r | |
468 | for (Index = 0; Index < PeiCpuMpData->CpuCount; Index++) {\r | |
469 | if (Index != PeiCpuMpData->BspNumber) {\r | |
4da1ebf3 | 470 | WriteStartupSignal (PeiCpuMpData->CpuData[Index].StartupApSignal);\r |
a09647f3 JF |
471 | }\r |
472 | }\r | |
473 | } else {\r | |
4da1ebf3 | 474 | WriteStartupSignal (PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal);\r |
a09647f3 JF |
475 | }\r |
476 | } else {\r | |
477 | ASSERT (FALSE);\r | |
478 | }\r | |
ea0f431c JF |
479 | return ;\r |
480 | }\r | |
481 | \r | |
482 | /**\r | |
483 | Get available system memory below 1MB by specified size.\r | |
484 | \r | |
485 | @param WakeupBufferSize Wakeup buffer size required\r | |
486 | \r | |
487 | @retval other Return wakeup buffer address below 1MB.\r | |
488 | @retval -1 Cannot find free memory below 1MB.\r | |
489 | **/\r | |
490 | UINTN\r | |
491 | GetWakeupBuffer (\r | |
492 | IN UINTN WakeupBufferSize\r | |
493 | )\r | |
494 | {\r | |
495 | EFI_PEI_HOB_POINTERS Hob;\r | |
496 | UINTN WakeupBufferStart;\r | |
497 | UINTN WakeupBufferEnd;\r | |
498 | \r | |
499 | //\r | |
500 | // Get the HOB list for processing\r | |
501 | //\r | |
502 | Hob.Raw = GetHobList ();\r | |
503 | \r | |
504 | //\r | |
505 | // Collect memory ranges\r | |
506 | //\r | |
507 | while (!END_OF_HOB_LIST (Hob)) {\r | |
508 | if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {\r | |
509 | if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&\r | |
510 | (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&\r | |
511 | ((Hob.ResourceDescriptor->ResourceAttribute &\r | |
512 | (EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |\r | |
513 | EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |\r | |
514 | EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED\r | |
515 | )) == 0)\r | |
516 | ) {\r | |
517 | //\r | |
518 | // Need memory under 1MB to be collected here\r | |
519 | //\r | |
520 | WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);\r | |
521 | if (WakeupBufferEnd > BASE_1MB) {\r | |
522 | //\r | |
523 | // Wakeup buffer should be under 1MB\r | |
524 | //\r | |
525 | WakeupBufferEnd = BASE_1MB;\r | |
526 | }\r | |
527 | //\r | |
528 | // Wakeup buffer should be aligned on 4KB\r | |
529 | //\r | |
530 | WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);\r | |
531 | if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {\r | |
532 | continue;\r | |
533 | }\r | |
534 | //\r | |
535 | // Create a memory allocation HOB.\r | |
536 | //\r | |
537 | BuildMemoryAllocationHob (\r | |
538 | WakeupBufferStart,\r | |
539 | WakeupBufferSize,\r | |
540 | EfiBootServicesData\r | |
541 | );\r | |
542 | return WakeupBufferStart;\r | |
543 | }\r | |
544 | }\r | |
545 | //\r | |
546 | // Find the next HOB\r | |
547 | //\r | |
548 | Hob.Raw = GET_NEXT_HOB (Hob);\r | |
549 | }\r | |
550 | \r | |
551 | return (UINTN) -1;\r | |
552 | }\r | |
553 | \r | |
554 | /**\r | |
555 | Get available system memory below 1MB by specified size.\r | |
556 | \r | |
557 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
558 | **/\r | |
559 | VOID\r | |
560 | BackupAndPrepareWakeupBuffer(\r | |
561 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
562 | )\r | |
563 | {\r | |
564 | CopyMem (\r | |
565 | (VOID *) PeiCpuMpData->BackupBuffer,\r | |
566 | (VOID *) PeiCpuMpData->WakeupBuffer,\r | |
567 | PeiCpuMpData->BackupBufferSize\r | |
568 | );\r | |
569 | CopyMem (\r | |
570 | (VOID *) PeiCpuMpData->WakeupBuffer,\r | |
571 | (VOID *) PeiCpuMpData->AddressMap.RendezvousFunnelAddress,\r | |
572 | PeiCpuMpData->AddressMap.RendezvousFunnelSize\r | |
573 | );\r | |
574 | }\r | |
575 | \r | |
576 | /**\r | |
577 | Restore wakeup buffer data.\r | |
578 | \r | |
579 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
580 | **/\r | |
581 | VOID\r | |
582 | RestoreWakeupBuffer(\r | |
583 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
584 | )\r | |
585 | {\r | |
586 | CopyMem ((VOID *) PeiCpuMpData->WakeupBuffer, (VOID *) PeiCpuMpData->BackupBuffer, PeiCpuMpData->BackupBufferSize);\r | |
587 | }\r | |
588 | \r | |
589 | /**\r | |
590 | This function will get CPU count in the system.\r | |
591 | \r | |
592 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
593 | \r | |
594 | @return AP processor count\r | |
595 | **/\r | |
596 | UINT32\r | |
597 | CountProcessorNumber (\r | |
598 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
599 | )\r | |
600 | {\r | |
601 | //\r | |
602 | // Load Microcode on BSP\r | |
603 | //\r | |
719ff8cf | 604 | MicrocodeDetect (PeiCpuMpData);\r |
ea0f431c JF |
605 | //\r |
606 | // Store BSP's MTRR setting\r | |
607 | //\r | |
608 | MtrrGetAllMtrrs (&PeiCpuMpData->MtrrTable);\r | |
944f45ae | 609 | \r |
ea0f431c | 610 | //\r |
944f45ae | 611 | // Only perform AP detection if PcdCpuMaxLogicalProcessorNumber is greater than 1\r |
ea0f431c | 612 | //\r |
944f45ae MK |
613 | if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {\r |
614 | //\r | |
2f0261b7 | 615 | // Send 1st broadcast IPI to APs to wakeup APs\r |
944f45ae | 616 | //\r |
2f0261b7 JF |
617 | PeiCpuMpData->InitFlag = TRUE;\r |
618 | PeiCpuMpData->X2ApicEnable = FALSE;\r | |
944f45ae MK |
619 | WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);\r |
620 | //\r | |
621 | // Wait for AP task to complete and then exit.\r | |
622 | //\r | |
623 | MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));\r | |
2f0261b7 | 624 | PeiCpuMpData->InitFlag = FALSE;\r |
944f45ae MK |
625 | PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;\r |
626 | ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));\r | |
627 | //\r | |
c7981a11 JF |
628 | // Wait for all APs finished the initialization\r |
629 | //\r | |
630 | while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {\r | |
631 | CpuPause ();\r | |
632 | }\r | |
633 | \r | |
634 | if (PeiCpuMpData->X2ApicEnable) {\r | |
635 | DEBUG ((EFI_D_INFO, "Force x2APIC mode!\n"));\r | |
636 | //\r | |
a09647f3 | 637 | // Wakeup all APs to enable x2APIC mode\r |
c7981a11 JF |
638 | //\r |
639 | WakeUpAP (PeiCpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);\r | |
640 | //\r | |
641 | // Wait for all known APs finished\r | |
642 | //\r | |
643 | while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {\r | |
644 | CpuPause ();\r | |
645 | }\r | |
646 | //\r | |
647 | // Enable x2APIC on BSP\r | |
648 | //\r | |
649 | SetApicMode (LOCAL_APIC_MODE_X2APIC);\r | |
650 | }\r | |
651 | DEBUG ((EFI_D_INFO, "APIC MODE is %d\n", GetApicMode ()));\r | |
652 | //\r | |
944f45ae MK |
653 | // Sort BSP/Aps by CPU APIC ID in ascending order\r |
654 | //\r | |
655 | SortApicId (PeiCpuMpData);\r | |
656 | }\r | |
ea0f431c JF |
657 | \r |
658 | DEBUG ((EFI_D_INFO, "CpuMpPei: Find %d processors in system.\n", PeiCpuMpData->CpuCount));\r | |
659 | return PeiCpuMpData->CpuCount;\r | |
660 | }\r | |
661 | \r | |
662 | /**\r | |
663 | Prepare for AP wakeup buffer and copy AP reset code into it.\r | |
664 | \r | |
665 | Get wakeup buffer below 1MB. Allocate memory for CPU MP Data and APs Stack.\r | |
666 | \r | |
667 | @return Pointer to PEI CPU MP Data\r | |
668 | **/\r | |
669 | PEI_CPU_MP_DATA *\r | |
670 | PrepareAPStartupVector (\r | |
671 | VOID\r | |
672 | )\r | |
673 | {\r | |
674 | EFI_STATUS Status;\r | |
675 | UINT32 MaxCpuCount;\r | |
676 | PEI_CPU_MP_DATA *PeiCpuMpData;\r | |
677 | EFI_PHYSICAL_ADDRESS Buffer;\r | |
678 | UINTN BufferSize;\r | |
679 | UINTN WakeupBuffer;\r | |
680 | UINTN WakeupBufferSize;\r | |
681 | MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r | |
e001e11f JF |
682 | UINT8 ApLoopMode;\r |
683 | UINT16 MonitorFilterSize;\r | |
684 | UINT8 *MonitorBuffer;\r | |
685 | UINTN Index;\r | |
ea0f431c JF |
686 | \r |
687 | AsmGetAddressMap (&AddressMap);\r | |
688 | WakeupBufferSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);\r | |
689 | WakeupBuffer = GetWakeupBuffer ((WakeupBufferSize + SIZE_4KB - 1) & ~(SIZE_4KB - 1));\r | |
690 | ASSERT (WakeupBuffer != (UINTN) -1);\r | |
691 | DEBUG ((EFI_D_INFO, "CpuMpPei: WakeupBuffer = 0x%x\n", WakeupBuffer));\r | |
692 | \r | |
693 | //\r | |
e001e11f JF |
694 | // Allocate Pages for APs stack, CPU MP Data, backup buffer for wakeup buffer,\r |
695 | // and monitor buffer if required.\r | |
ea0f431c JF |
696 | //\r |
697 | MaxCpuCount = PcdGet32(PcdCpuMaxLogicalProcessorNumber);\r | |
698 | BufferSize = PcdGet32 (PcdCpuApStackSize) * MaxCpuCount + sizeof (PEI_CPU_MP_DATA)\r | |
699 | + WakeupBufferSize + sizeof (PEI_CPU_DATA) * MaxCpuCount;\r | |
e001e11f JF |
700 | ApLoopMode = GetApLoopMode (&MonitorFilterSize);\r |
701 | BufferSize += MonitorFilterSize * MaxCpuCount;\r | |
ea0f431c JF |
702 | Status = PeiServicesAllocatePages (\r |
703 | EfiBootServicesData,\r | |
704 | EFI_SIZE_TO_PAGES (BufferSize),\r | |
705 | &Buffer\r | |
706 | );\r | |
707 | ASSERT_EFI_ERROR (Status);\r | |
708 | \r | |
709 | PeiCpuMpData = (PEI_CPU_MP_DATA *) (UINTN) (Buffer + PcdGet32 (PcdCpuApStackSize) * MaxCpuCount);\r | |
710 | PeiCpuMpData->Buffer = (UINTN) Buffer;\r | |
711 | PeiCpuMpData->CpuApStackSize = PcdGet32 (PcdCpuApStackSize);\r | |
712 | PeiCpuMpData->WakeupBuffer = WakeupBuffer;\r | |
713 | PeiCpuMpData->BackupBuffer = (UINTN)PeiCpuMpData + sizeof (PEI_CPU_MP_DATA);\r | |
714 | PeiCpuMpData->BackupBufferSize = WakeupBufferSize;\r | |
715 | PeiCpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN) (WakeupBuffer + AddressMap.RendezvousFunnelSize);\r | |
716 | \r | |
717 | PeiCpuMpData->CpuCount = 1;\r | |
718 | PeiCpuMpData->BspNumber = 0;\r | |
28f27af6 JF |
719 | PeiCpuMpData->CpuData = (PEI_CPU_DATA *) (PeiCpuMpData->BackupBuffer +\r |
720 | PeiCpuMpData->BackupBufferSize);\r | |
ea0f431c JF |
721 | PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();\r |
722 | PeiCpuMpData->CpuData[0].Health.Uint32 = 0;\r | |
723 | PeiCpuMpData->EndOfPeiFlag = FALSE;\r | |
2f0261b7 | 724 | InitializeSpinLock(&PeiCpuMpData->MpLock);\r |
22cfe73a | 725 | SaveVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters);\r |
ea0f431c | 726 | CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));\r |
e001e11f JF |
727 | //\r |
728 | // Initialize AP loop mode\r | |
729 | //\r | |
730 | PeiCpuMpData->ApLoopMode = ApLoopMode;\r | |
731 | DEBUG ((EFI_D_INFO, "AP Loop Mode is %d\n", PeiCpuMpData->ApLoopMode));\r | |
732 | MonitorBuffer = (UINT8 *)(PeiCpuMpData->CpuData + MaxCpuCount);\r | |
733 | if (PeiCpuMpData->ApLoopMode != ApInHltLoop) {\r | |
734 | //\r | |
735 | // Set up APs wakeup signal buffer\r | |
736 | //\r | |
737 | for (Index = 0; Index < MaxCpuCount; Index++) {\r | |
738 | PeiCpuMpData->CpuData[Index].StartupApSignal = \r | |
739 | (UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);\r | |
740 | }\r | |
741 | }\r | |
ea0f431c JF |
742 | //\r |
743 | // Backup original data and copy AP reset code in it\r | |
744 | //\r | |
745 | BackupAndPrepareWakeupBuffer(PeiCpuMpData);\r | |
746 | \r | |
747 | return PeiCpuMpData;\r | |
748 | }\r | |
749 | \r | |
750 | /**\r | |
751 | Notify function on End Of Pei PPI.\r | |
752 | \r | |
753 | On S3 boot, this function will restore wakeup buffer data.\r | |
754 | On normal boot, this function will flag wakeup buffer to be un-used type.\r | |
755 | \r | |
756 | @param PeiServices The pointer to the PEI Services Table.\r | |
757 | @param NotifyDescriptor Address of the notification descriptor data structure.\r | |
758 | @param Ppi Address of the PPI that was installed.\r | |
759 | \r | |
760 | @retval EFI_SUCCESS When everything is OK.\r | |
761 | \r | |
762 | **/\r | |
763 | EFI_STATUS\r | |
764 | EFIAPI\r | |
765 | CpuMpEndOfPeiCallback (\r | |
766 | IN EFI_PEI_SERVICES **PeiServices,\r | |
767 | IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r | |
768 | IN VOID *Ppi\r | |
769 | )\r | |
770 | {\r | |
771 | EFI_STATUS Status;\r | |
772 | EFI_BOOT_MODE BootMode;\r | |
773 | PEI_CPU_MP_DATA *PeiCpuMpData;\r | |
774 | EFI_PEI_HOB_POINTERS Hob;\r | |
775 | EFI_HOB_MEMORY_ALLOCATION *MemoryHob;\r | |
776 | \r | |
c972495e | 777 | DEBUG ((EFI_D_INFO, "CpuMpPei: CpuMpEndOfPeiCallback () invoked\n"));\r |
ea0f431c JF |
778 | \r |
779 | Status = PeiServicesGetBootMode (&BootMode);\r | |
780 | ASSERT_EFI_ERROR (Status);\r | |
781 | \r | |
782 | PeiCpuMpData = GetMpHobData ();\r | |
783 | ASSERT (PeiCpuMpData != NULL);\r | |
784 | \r | |
785 | if (BootMode != BOOT_ON_S3_RESUME) {\r | |
786 | //\r | |
787 | // Get the HOB list for processing\r | |
788 | //\r | |
789 | Hob.Raw = GetHobList ();\r | |
790 | //\r | |
791 | // Collect memory ranges\r | |
792 | //\r | |
793 | while (!END_OF_HOB_LIST (Hob)) {\r | |
794 | if (Hob.Header->HobType == EFI_HOB_TYPE_MEMORY_ALLOCATION) {\r | |
795 | MemoryHob = Hob.MemoryAllocation;\r | |
796 | if(MemoryHob->AllocDescriptor.MemoryBaseAddress == PeiCpuMpData->WakeupBuffer) {\r | |
797 | //\r | |
798 | // Flag this HOB type to un-used\r | |
799 | //\r | |
800 | GET_HOB_TYPE (Hob) = EFI_HOB_TYPE_UNUSED;\r | |
801 | break;\r | |
802 | }\r | |
803 | }\r | |
804 | Hob.Raw = GET_NEXT_HOB (Hob);\r | |
805 | }\r | |
806 | } else {\r | |
807 | RestoreWakeupBuffer (PeiCpuMpData);\r | |
808 | PeiCpuMpData->EndOfPeiFlag = TRUE;\r | |
809 | }\r | |
810 | return EFI_SUCCESS;\r | |
811 | }\r | |
812 | \r | |
813 | /**\r | |
814 | The Entry point of the MP CPU PEIM.\r | |
815 | \r | |
816 | This function will wakeup APs and collect CPU AP count and install the\r | |
817 | Mp Service Ppi.\r | |
818 | \r | |
819 | @param FileHandle Handle of the file being invoked.\r | |
820 | @param PeiServices Describes the list of possible PEI Services.\r | |
821 | \r | |
822 | @retval EFI_SUCCESS MpServicePpi is installed successfully.\r | |
823 | \r | |
824 | **/\r | |
825 | EFI_STATUS\r | |
826 | EFIAPI\r | |
827 | CpuMpPeimInit (\r | |
828 | IN EFI_PEI_FILE_HANDLE FileHandle,\r | |
829 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
830 | )\r | |
831 | {\r | |
9bedfb2f JF |
832 | EFI_STATUS Status;\r |
833 | PEI_CPU_MP_DATA *PeiCpuMpData;\r | |
834 | EFI_VECTOR_HANDOFF_INFO *VectorInfo;\r | |
835 | EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;\r | |
ea0f431c | 836 | \r |
ea0f431c | 837 | //\r |
9bedfb2f JF |
838 | // Get Vector Hand-off Info PPI\r |
839 | //\r | |
840 | VectorInfo = NULL;\r | |
841 | Status = PeiServicesLocatePpi (\r | |
842 | &gEfiVectorHandoffInfoPpiGuid,\r | |
843 | 0,\r | |
844 | NULL,\r | |
845 | (VOID **)&VectorHandoffInfoPpi\r | |
846 | );\r | |
847 | if (Status == EFI_SUCCESS) {\r | |
848 | VectorInfo = VectorHandoffInfoPpi->Info;\r | |
849 | }\r | |
850 | Status = InitializeCpuExceptionHandlers (VectorInfo);\r | |
851 | ASSERT_EFI_ERROR (Status);\r | |
852 | //\r | |
ea0f431c JF |
853 | // Get wakeup buffer and copy AP reset code in it\r |
854 | //\r | |
855 | PeiCpuMpData = PrepareAPStartupVector ();\r | |
856 | //\r | |
857 | // Count processor number and collect processor information\r | |
858 | //\r | |
6c7f3f1d | 859 | CountProcessorNumber (PeiCpuMpData);\r |
ea0f431c JF |
860 | //\r |
861 | // Build location of PEI CPU MP DATA buffer in HOB\r | |
862 | //\r | |
863 | BuildGuidDataHob (\r | |
864 | &gEfiCallerIdGuid,\r | |
865 | (VOID *)&PeiCpuMpData,\r | |
866 | sizeof(UINT64)\r | |
867 | );\r | |
868 | //\r | |
869 | // Update and publish CPU BIST information\r | |
870 | //\r | |
871 | CollectBistDataFromPpi (PeiServices, PeiCpuMpData);\r | |
872 | //\r | |
873 | // register an event for EndOfPei\r | |
874 | //\r | |
875 | Status = PeiServicesNotifyPpi (&mNotifyList);\r | |
876 | ASSERT_EFI_ERROR (Status);\r | |
877 | //\r | |
878 | // Install CPU MP PPI\r | |
879 | //\r | |
880 | Status = PeiServicesInstallPpi(&mPeiCpuMpPpiDesc);\r | |
881 | ASSERT_EFI_ERROR (Status);\r | |
882 | \r | |
883 | return Status;\r | |
884 | }\r |