]> git.proxmox.com Git - mirror_edk2.git/blame - UefiCpuPkg/CpuMpPei/CpuMpPei.h
UefiCpuPkg/CpuMpPei: Update and publish CPU BIST information
[mirror_edk2.git] / UefiCpuPkg / CpuMpPei / CpuMpPei.h
CommitLineData
65e79f93
JF
1/** @file
2 Definitions to install Multiple Processor PPI.
3
4 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13**/
14
15#ifndef _CPU_MP_PEI_H_
16#define _CPU_MP_PEI_H_
17
18#include <PiPei.h>
19
e66d675d 20#include <Ppi/SecPlatformInformation.h>
a21fe428 21#include <Ppi/SecPlatformInformation2.h>
65e79f93 22
d1cf9333
JF
23#include <Register/LocalApic.h>
24
65e79f93 25#include <Library/BaseLib.h>
e66d675d
JF
26#include <Library/BaseMemoryLib.h>
27#include <Library/DebugLib.h>
05e107f8 28#include <Library/HobLib.h>
e66d675d 29#include <Library/LocalApicLib.h>
b4cd9f78 30#include <Library/MtrrLib.h>
e66d675d 31#include <Library/PcdLib.h>
65e79f93 32#include <Library/PeimEntryPoint.h>
e66d675d 33#include <Library/PeiServicesLib.h>
a21fe428 34#include <Library/ReportStatusCodeLib.h>
7d51bf5c
JF
35#include <Library/SynchronizationLib.h>
36#include <Library/TimerLib.h>
46ba0f63 37#include <Library/UefiCpuLib.h>
d1cf9333
JF
38
39#include "Microcode.h"
40
e66d675d
JF
41//
42// AP state
43//
44typedef enum {
45 CpuStateIdle,
46 CpuStateBusy,
47 CpuStateDisabled
48} CPU_STATE;
65e79f93 49
8018cb15
JF
50//
51// AP reset code information
52//
53typedef struct {
54 UINT8 *RendezvousFunnelAddress;
55 UINTN PModeEntryOffset;
56 UINTN LModeEntryOffset;
57 UINTN RendezvousFunnelSize;
58} MP_ASSEMBLY_ADDRESS_MAP;
59
e66d675d
JF
60typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;
61
62#pragma pack()
a56f6f45 63
f9d30595
JF
64typedef union {
65 struct {
66 UINT32 LimitLow : 16;
67 UINT32 BaseLow : 16;
68 UINT32 BaseMid : 8;
69 UINT32 Type : 4;
70 UINT32 System : 1;
71 UINT32 Dpl : 2;
72 UINT32 Present : 1;
73 UINT32 LimitHigh : 4;
74 UINT32 Software : 1;
75 UINT32 Reserved : 1;
76 UINT32 DefaultSize : 1;
77 UINT32 Granularity : 1;
78 UINT32 BaseHigh : 8;
79 } Bits;
80 UINT64 Uint64;
81} IA32_GDT;
a56f6f45
JF
82
83//
84// MP CPU exchange information for AP reset code
85//
86typedef struct {
87 UINTN Lock;
88 UINTN StackStart;
89 UINTN StackSize;
90 UINTN CFunction;
91 IA32_DESCRIPTOR GdtrProfile;
92 IA32_DESCRIPTOR IdtrProfile;
93 UINTN BufferStart;
94 UINTN PmodeOffset;
95 UINTN NumApsExecuting;
96 UINTN LmodeOffset;
97 UINTN Cr3;
7d51bf5c 98 PEI_CPU_MP_DATA *PeiCpuMpData;
a56f6f45
JF
99} MP_CPU_EXCHANGE_INFO;
100
f9d30595 101#pragma pack()
8018cb15 102
e66d675d
JF
103typedef struct {
104 UINT32 ApicId;
105 EFI_HEALTH_FLAGS Health;
106 CPU_STATE State;
107 BOOLEAN CpuHealthy;
108} PEI_CPU_DATA;
109
110//
111// PEI CPU MP Data save in memory
112//
113struct _PEI_CPU_MP_DATA {
114 UINT32 CpuCount;
115 UINT32 BspNumber;
116 UINTN Buffer;
117 UINTN CpuApStackSize;
118 MP_ASSEMBLY_ADDRESS_MAP AddressMap;
119 UINTN WakeupBuffer;
120 UINTN BackupBuffer;
121 UINTN BackupBufferSize;
7d51bf5c
JF
122 UINTN ApFunction;
123 UINTN ApFunctionArgument;
124 volatile UINT32 FinishedCount;
125 BOOLEAN InitFlag;
b4cd9f78 126 MTRR_SETTINGS MtrrTable;
e66d675d
JF
127 PEI_CPU_DATA *CpuData;
128 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;
129};
130
8018cb15
JF
131/**
132 Assembly code to get starting address and size of the rendezvous entry for APs.
133 Information for fixing a jump instruction in the code is also returned.
134
135 @param AddressMap Output buffer for address map information.
136**/
137VOID
138EFIAPI
139AsmGetAddressMap (
140 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap
141 );
142
f9d30595
JF
143/**
144 Assembly code to load GDT table and update segment accordingly.
145
146 @param Gdtr Pointer to GDT descriptor
147**/
148VOID
149EFIAPI
150AsmInitializeGdt (
151 IN IA32_DESCRIPTOR *Gdtr
152 );
65e79f93
JF
153
154
a21fe428
JF
155/**
156 Get CPU MP Data pointer from the Guided HOB.
157
158 @return Pointer to Pointer to PEI CPU MP Data
159**/
160PEI_CPU_MP_DATA *
161GetMpHobData (
162 VOID
163 );
164
165/**
166 Collects BIST data from PPI.
167
168 This function collects BIST data from Sec Platform Information2 PPI
169 or SEC Platform Information PPI.
170
171 @param PeiServices Pointer to PEI Services Table
172 @param PeiCpuMpData Pointer to PEI CPU MP Data
173
174**/
175VOID
176CollectBistDataFromPpi (
177 IN CONST EFI_PEI_SERVICES **PeiServices,
178 IN PEI_CPU_MP_DATA *PeiCpuMpData
179 );
180
181/**
182 Implementation of the PlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.
183
184 @param PeiServices The pointer to the PEI Services Table.
185 @param StructureSize The pointer to the variable describing size of the input buffer.
186 @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.
187
188 @retval EFI_SUCCESS The data was successfully returned.
189 @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
190 hold the record is returned in StructureSize.
191
192**/
193EFI_STATUS
194EFIAPI
195SecPlatformInformation2 (
196 IN CONST EFI_PEI_SERVICES **PeiServices,
197 IN OUT UINT64 *StructureSize,
198 OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2
199 );
200
65e79f93 201#endif