[mirror_edk2.git] / UefiCpuPkg / Include / Library / LocalApicLib.h

/** @file\r
  Public include file for Local APIC library.\r
\r
  Local APIC library assumes local APIC is enabled. It does not\r
  handles cases where local APIC is disabled.\r
\r
  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef __LOCAL_APIC_LIB_H__\r
#define __LOCAL_APIC_LIB_H__\r
\r
#define LOCAL_APIC_MODE_XAPIC   0x1  ///< xAPIC mode.\r
#define LOCAL_APIC_MODE_X2APIC  0x2  ///< x2APIC mode.\r
\r
/**\r
  Get the current local APIC mode.\r
\r
  If local APIC is disabled, then ASSERT.\r
\r
  @retval LOCAL_APIC_MODE_XAPIC  current APIC mode is xAPIC.\r
  @retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.\r
**/\r
UINTN\r
EFIAPI\r
GetApicMode (\r
  VOID\r
  );\r
\r
/**\r
  Set the current local APIC mode.\r
\r
  If the specified local APIC mode is not valid, then ASSERT.\r
  If the specified local APIC mode can't be set as current, then ASSERT.\r
\r
  @param ApicMode APIC mode to be set.\r
**/\r
VOID\r
EFIAPI\r
SetApicMode (\r
  IN UINTN  ApicMode\r
  );\r
\r
/**\r
  Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.\r
\r
  In xAPIC mode, the initial local APIC ID is 8-bit, and may be different from current APIC ID.\r
  In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case, \r
  the 32-bit local APIC ID is returned as initial APIC ID.\r
\r
  @return  32-bit initial local APIC ID of the executing processor.\r
**/\r
UINT32\r
EFIAPI\r
GetInitialApicId (\r
  VOID\r
  );\r
\r
/**\r
  Get the local APIC ID of the executing processor.\r
\r
  @return  32-bit local APIC ID of the executing processor.\r
**/\r
UINT32\r
EFIAPI\r
GetApicId (\r
  VOID\r
  );\r
\r
/**\r
  Send a SMI IPI to a specified target processor.\r
\r
  This function returns after the IPI has been accepted by the target processor. \r
\r
  @param  ApicId   Specify the local APIC ID of the target processor.\r
**/\r
VOID\r
EFIAPI\r
SendSmiIpi (\r
  IN UINT32          ApicId\r
  );\r
\r
/**\r
  Send a SMI IPI to all processors excluding self.\r
\r
  This function returns after the IPI has been accepted by the target processors. \r
**/\r
VOID\r
EFIAPI\r
SendSmiIpiAllExcludingSelf (\r
  VOID\r
  );\r
\r
/**\r
  Send an INIT IPI to a specified target processor.\r
\r
  This function returns after the IPI has been accepted by the target processor. \r
\r
  @param  ApicId   Specify the local APIC ID of the target processor.\r
**/\r
VOID\r
EFIAPI\r
SendInitIpi (\r
  IN UINT32          ApicId\r
  );\r
\r
/**\r
  Send an INIT IPI to all processors excluding self.\r
\r
  This function returns after the IPI has been accepted by the target processors. \r
**/\r
VOID\r
EFIAPI\r
SendInitIpiAllExcludingSelf (\r
  VOID\r
  );\r
\r
/**\r
  Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.\r
\r
  This function returns after the IPI has been accepted by the target processor. \r
\r
  if StartupRoutine >= 1M, then ASSERT.\r
  if StartupRoutine is not multiple of 4K, then ASSERT.\r
\r
  @param  ApicId          Specify the local APIC ID of the target processor.\r
  @param  StartupRoutine  Points to a start-up routine which is below 1M physical\r
                          address and 4K aligned.\r
**/\r
VOID\r
EFIAPI\r
SendInitSipiSipi (\r
  IN UINT32          ApicId,\r
  IN UINT32          StartupRoutine\r
  );\r
\r
/**\r
  Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.\r
\r
  This function returns after the IPI has been accepted by the target processors. \r
\r
  if StartupRoutine >= 1M, then ASSERT.\r
  if StartupRoutine is not multiple of 4K, then ASSERT.\r
\r
  @param  StartupRoutine    Points to a start-up routine which is below 1M physical\r
                            address and 4K aligned.\r
**/\r
VOID\r
EFIAPI\r
SendInitSipiSipiAllExcludingSelf (\r
  IN UINT32          StartupRoutine\r
  );\r
\r
/**\r
  Programming Virtual Wire Mode.\r
\r
  This function programs the local APIC for virtual wire mode following\r
  the example described in chapter A.3 of the MP 1.4 spec.\r
\r
  IOxAPIC is not involved in this type of virtual wire mode.\r
**/\r
VOID\r
EFIAPI\r
ProgramVirtualWireMode (\r
  VOID\r
  );\r
\r
/**\r
  Get the divide value from the DCR (Divide Configuration Register) by which\r
  the processor's bus clock is divided to form the time base for the APIC timer.\r
\r
  @return The divide value is one of 1,2,4,8,16,32,64,128.\r
**/\r
UINTN\r
EFIAPI\r
GetApicTimerDivisor (\r
  VOID\r
  );\r
\r
/**\r
  Read the initial count value from the init-count register.\r
\r
  @return The initial count value read from the init-count register.\r
**/\r
UINT32\r
EFIAPI\r
GetApicTimerInitCount (\r
  VOID\r
  );\r
\r
/**\r
  Read the current count value from the current-count register.\r
\r
  @return The current count value read from the current-count register.\r
**/\r
UINT32\r
EFIAPI\r
GetApicTimerCurrentCount (\r
  VOID\r
  );\r
\r
/**\r
  Initialize the local APIC timer.\r
\r
  The local APIC timer is initialized and enabled.\r
\r
  @param DivideValue   The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.\r
                       If it is 0, then use the current divide value in the DCR.\r
  @param InitCount     The initial count value.\r
  @param PeriodicMode  If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.\r
  @param Vector        The timer interrupt vector number.\r
**/\r
VOID\r
EFIAPI\r
InitializeApicTimer (\r
  IN UINTN   DivideValue,\r
  IN UINT32  InitCount,\r
  IN BOOLEAN PeriodicMode,\r
  IN UINT8   Vector\r
  );\r
\r
/**\r
  Enable the local APIC timer interrupt.\r
**/\r
VOID\r
EFIAPI\r
EnableApicTimerInterrupt (\r
  VOID\r
  );\r
\r
/**\r
  Disable the local APIC timer interrupt.\r
**/\r
VOID\r
EFIAPI\r
DisableApicTimerInterrupt (\r
  VOID\r
  );\r
\r
/**\r
  Get the local APIC timer interrupt state.\r
\r
  @retval TRUE  The local APIC timer interrupt is enabled.\r
  @retval FALSE The local APIC timer interrupt is disabled.\r
**/\r
BOOLEAN\r
EFIAPI\r
GetApicTimerInterruptState (\r
  VOID\r
  );\r
\r
/**\r
  Send EOI to the local APIC.\r
**/\r
VOID\r
EFIAPI\r
SendApicEoi (\r
  VOID\r
  );\r
\r
#endif\r
\r
Commit	Line	Data
bf73cc4b	1	/** @file\r
	2	Public include file for Local APIC library.\r
	3	\r
	4	Local APIC library assumes local APIC is enabled. It does not\r
	5	handles cases where local APIC is disabled.\r
	6	\r
	7	Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
	8	This program and the accompanying materials\r
	9	are licensed and made available under the terms and conditions of the BSD License\r
	10	which accompanies this distribution. The full text of the license may be found at\r
	11	http://opensource.org/licenses/bsd-license.php\r
	12	\r
	13	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	14	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	15	\r
	16	**/\r
	17	\r
	18	#ifndef __LOCAL_APIC_LIB_H__\r
	19	#define __LOCAL_APIC_LIB_H__\r
	20	\r
	21	#define LOCAL_APIC_MODE_XAPIC 0x1 ///< xAPIC mode.\r
	22	#define LOCAL_APIC_MODE_X2APIC 0x2 ///< x2APIC mode.\r
	23	\r
	24	/**\r
	25	Get the current local APIC mode.\r
	26	\r
	27	If local APIC is disabled, then ASSERT.\r
	28	\r
	29	@retval LOCAL_APIC_MODE_XAPIC current APIC mode is xAPIC.\r
	30	@retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.\r
	31	**/\r
	32	UINTN\r
	33	EFIAPI\r
	34	GetApicMode (\r
	35	VOID\r
	36	);\r
	37	\r
	38	/**\r
	39	Set the current local APIC mode.\r
	40	\r
	41	If the specified local APIC mode is not valid, then ASSERT.\r
	42	If the specified local APIC mode can't be set as current, then ASSERT.\r
	43	\r
	44	@param ApicMode APIC mode to be set.\r
	45	**/\r
	46	VOID\r
	47	EFIAPI\r
	48	SetApicMode (\r
	49	IN UINTN ApicMode\r
	50	);\r
	51	\r
	52	/**\r
	53	Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.\r
	54	\r
	55	In xAPIC mode, the initial local APIC ID is 8-bit, and may be different from current APIC ID.\r
	56	In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case, \r
	57	the 32-bit local APIC ID is returned as initial APIC ID.\r
	58	\r
	59	@return 32-bit initial local APIC ID of the executing processor.\r
	60	**/\r
	61	UINT32\r
	62	EFIAPI\r
	63	GetInitialApicId (\r
	64	VOID\r
65	);\r
66	\r
67	/**\r
68	Get the local APIC ID of the executing processor.\r
69	\r
70	@return 32-bit local APIC ID of the executing processor.\r
71	**/\r
72	UINT32\r
73	EFIAPI\r
74	GetApicId (\r
75	VOID\r
76	);\r
77	\r
78	/**\r
79	Send a SMI IPI to a specified target processor.\r
80	\r
81	This function returns after the IPI has been accepted by the target processor. \r
82	\r
83	@param ApicId Specify the local APIC ID of the target processor.\r
84	**/\r
85	VOID\r
86	EFIAPI\r
87	SendSmiIpi (\r
88	IN UINT32 ApicId\r
89	);\r
90	\r
91	/**\r
92	Send a SMI IPI to all processors excluding self.\r
93	\r
94	This function returns after the IPI has been accepted by the target processors. \r
95	**/\r
96	VOID\r
97	EFIAPI\r
98	SendSmiIpiAllExcludingSelf (\r
99	VOID\r
100	);\r
101	\r
102	/**\r
103	Send an INIT IPI to a specified target processor.\r
104	\r
105	This function returns after the IPI has been accepted by the target processor. \r
106	\r
107	@param ApicId Specify the local APIC ID of the target processor.\r
108	**/\r
109	VOID\r
110	EFIAPI\r
111	SendInitIpi (\r
112	IN UINT32 ApicId\r
113	);\r
114	\r
115	/**\r
116	Send an INIT IPI to all processors excluding self.\r
117	\r
118	This function returns after the IPI has been accepted by the target processors. \r
119	**/\r
120	VOID\r
121	EFIAPI\r
122	SendInitIpiAllExcludingSelf (\r
123	VOID\r
124	);\r
125	\r
126	/**\r
127	Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.\r
128	\r
129	This function returns after the IPI has been accepted by the target processor. \r
130	\r
131	if StartupRoutine >= 1M, then ASSERT.\r
132	if StartupRoutine is not multiple of 4K, then ASSERT.\r
133	\r
134	@param ApicId Specify the local APIC ID of the target processor.\r
135	@param StartupRoutine Points to a start-up routine which is below 1M physical\r
136	address and 4K aligned.\r
137	**/\r
138	VOID\r
139	EFIAPI\r
140	SendInitSipiSipi (\r
141	IN UINT32 ApicId,\r
142	IN UINT32 StartupRoutine\r
143	);\r
144	\r
145	/**\r
146	Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.\r
147	\r
148	This function returns after the IPI has been accepted by the target processors. \r
149	\r
150	if StartupRoutine >= 1M, then ASSERT.\r
151	if StartupRoutine is not multiple of 4K, then ASSERT.\r
152	\r
153	@param StartupRoutine Points to a start-up routine which is below 1M physical\r
154	address and 4K aligned.\r
155	**/\r
156	VOID\r
157	EFIAPI\r
158	SendInitSipiSipiAllExcludingSelf (\r
159	IN UINT32 StartupRoutine\r
160	);\r
161	\r
162	/**\r
163	Programming Virtual Wire Mode.\r
164	\r
165	This function programs the local APIC for virtual wire mode following\r
166	the example described in chapter A.3 of the MP 1.4 spec.\r
167	\r
168	IOxAPIC is not involved in this type of virtual wire mode.\r
169	**/\r
170	VOID\r
171	EFIAPI\r
172	ProgramVirtualWireMode (\r
173	VOID\r
174	);\r
175	\r
176	/**\r
177	Get the divide value from the DCR (Divide Configuration Register) by which\r
178	the processor's bus clock is divided to form the time base for the APIC timer.\r
179	\r
180	@return The divide value is one of 1,2,4,8,16,32,64,128.\r
181	**/\r
182	UINTN\r
183	EFIAPI\r
184	GetApicTimerDivisor (\r
185	VOID\r
186	);\r
187	\r
188	/**\r
189	Read the initial count value from the init-count register.\r
190	\r
191	@return The initial count value read from the init-count register.\r
192	**/\r
193	UINT32\r
194	EFIAPI\r
195	GetApicTimerInitCount (\r
196	VOID\r
197	);\r
198	\r
199	/**\r
200	Read the current count value from the current-count register.\r
201	\r
202	@return The current count value read from the current-count register.\r
203	**/\r
204	UINT32\r
205	EFIAPI\r
206	GetApicTimerCurrentCount (\r
207	VOID\r
208	);\r
209	\r
210	/**\r
211	Initialize the local APIC timer.\r
212	\r
213	The local APIC timer is initialized and enabled.\r
214	\r
215	@param DivideValue The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.\r
216	If it is 0, then use the current divide value in the DCR.\r
217	@param InitCount The initial count value.\r
218	@param PeriodicMode If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.\r
219	@param Vector The timer interrupt vector number.\r
220	**/\r
221	VOID\r
222	EFIAPI\r
223	InitializeApicTimer (\r
224	IN UINTN DivideValue,\r
225	IN UINT32 InitCount,\r
226	IN BOOLEAN PeriodicMode,\r
227	IN UINT8 Vector\r
228	);\r
229	\r
230	/**\r
231	Enable the local APIC timer interrupt.\r
232	**/\r
233	VOID\r
234	EFIAPI\r
235	EnableApicTimerInterrupt (\r
236	VOID\r
237	);\r
238	\r
239	/**\r
240	Disable the local APIC timer interrupt.\r
241	**/\r
242	VOID\r
243	EFIAPI\r
244	DisableApicTimerInterrupt (\r
245	VOID\r
246	);\r
247	\r
248	/**\r
249	Get the local APIC timer interrupt state.\r
250	\r
251	@retval TRUE The local APIC timer interrupt is enabled.\r
252	@retval FALSE The local APIC timer interrupt is disabled.\r
253	**/\r
254	BOOLEAN\r
255	EFIAPI\r
256	GetApicTimerInterruptState (\r
257	VOID\r
258	);\r
259	\r
260	/**\r
261	Send EOI to the local APIC.\r
262	**/\r
263	VOID\r
264	EFIAPI\r
265	SendApicEoi (\r
266	VOID\r
267	);\r
268	\r
269	#endif\r
270	\r