projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| c788c2b1 SF |
1 | /** @file\r |
| 2 | This file declares EDKII Shadow Microcode PPI.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>\r | |
| 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
| 6 | \r | |
| 7 | **/\r | |
| 8 | \r | |
| 9 | #ifndef __PPI_SHADOW_MICROCODE_H__\r | |
| 10 | #define __PPI_SHADOW_MICROCODE_H__\r | |
| 11 | \r | |
| 12 | #define EDKII_PEI_SHADOW_MICROCODE_PPI_GUID \\r | |
| 13 | { \\r | |
| 14 | 0x430f6965, 0x9a69, 0x41c5, { 0x93, 0xed, 0x8b, 0xf0, 0x64, 0x35, 0xc1, 0xc6 } \\r | |
| 15 | }\r | |
| 16 | \r | |
| 17 | typedef struct _EDKII_PEI_SHADOW_MICROCODE_PPI EDKII_PEI_SHADOW_MICROCODE_PPI;\r | |
| 18 | \r | |
| 19 | typedef struct {\r | |
| 20 | UINT32 ProcessorSignature;\r | |
| 21 | UINT8 PlatformId;\r | |
| 22 | } EDKII_PEI_MICROCODE_CPU_ID;\r | |
| 23 | \r | |
| 24 | /**\r | |
| 25 | Shadow microcode update patches to memory.\r | |
| 26 | \r | |
| 27 | The function is used for shadowing microcode update patches to a continuous memory.\r | |
| 28 | It shall allocate memory buffer and only shadow the microcode patches for those\r | |
| 29 | processors specified by MicrocodeCpuId array. The checksum verification may be\r | |
| 30 | skiped in this function so the caller must perform checksum verification before\r | |
| 31 | using the microcode patches in returned memory buffer.\r | |
| 32 | \r | |
| 33 | @param[in] This The PPI instance pointer.\r | |
| 34 | @param[in] CpuIdCount Number of elements in MicrocodeCpuId array.\r | |
| 35 | @param[in] MicrocodeCpuId A pointer to an array of EDKII_PEI_MICROCODE_CPU_ID\r | |
| 36 | structures.\r | |
| 37 | @param[out] BufferSize Pointer to receive the total size of Buffer.\r | |
| 38 | @param[out] Buffer Pointer to receive address of allocated memory\r | |
| 39 | with microcode patches data in it.\r | |
| 40 | \r | |
| 41 | @retval EFI_SUCCESS The microcode has been shadowed to memory.\r | |
| 42 | @retval EFI_OUT_OF_RESOURCES The operation fails due to lack of resources.\r | |
| 43 | \r | |
| 44 | **/\r | |
| 45 | typedef\r | |
| 46 | EFI_STATUS\r | |
| 47 | (EFIAPI *EDKII_PEI_SHADOW_MICROCODE) (\r | |
| 48 | IN EDKII_PEI_SHADOW_MICROCODE_PPI *This,\r | |
| 49 | IN UINTN CpuIdCount,\r | |
| 50 | IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuId,\r | |
| 51 | OUT UINTN *BufferSize,\r | |
| 52 | OUT VOID **Buffer\r | |
| 53 | );\r | |
| 54 | \r | |
| 55 | ///\r | |
| 56 | /// This PPI is installed by some platform or chipset-specific PEIM that\r | |
| 57 | /// abstracts handling microcode shadow support.\r | |
| 58 | ///\r | |
| 59 | struct _EDKII_PEI_SHADOW_MICROCODE_PPI {\r | |
| 60 | EDKII_PEI_SHADOW_MICROCODE ShadowMicrocode;\r | |
| 61 | };\r | |
| 62 | \r | |
| 63 | extern EFI_GUID gEdkiiPeiShadowMicrocodePpiGuid;\r | |
| 64 | \r | |
| 65 | #endif\r | |
| 66 | \r |