projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 195c9436 MK |
1 | /** @file\r |
| 2 | MSR Definitions.\r | |
| 3 | \r | |
| 4 | Provides defines for Machine Specific Registers(MSR) indexes. Data structures\r | |
| 5 | are provided for MSRs that contain one or more bit fields. If the MSR value\r | |
| 6 | returned is a single 32-bit or 64-bit value, then a data structure is not\r | |
| 7 | provided for that MSR.\r | |
| 8 | \r | |
| b715c37e | 9 | Copyright (c) 2016 ~ 2018, Intel Corporation. All rights reserved.<BR>\r |
| 195c9436 MK |
10 | This program and the accompanying materials\r |
| 11 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 12 | which accompanies this distribution. The full text of the license may be found at\r | |
| 13 | http://opensource.org/licenses/bsd-license.php\r | |
| 14 | \r | |
| 15 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 16 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 17 | \r | |
| 18 | @par Specification Reference:\r | |
| b715c37e ED |
19 | Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 4,\r |
| 20 | May 2018, Volume 4: Model-Specific-Registers (MSR)\r | |
| 195c9436 MK |
21 | \r |
| 22 | **/\r | |
| 23 | \r | |
| 24 | #ifndef __MSR_H__\r | |
| 25 | #define __MSR_H__\r | |
| 26 | \r | |
| 27 | #include <Register/ArchitecturalMsr.h>\r | |
| 28 | #include <Register/Msr/Core2Msr.h>\r | |
| 29 | #include <Register/Msr/AtomMsr.h>\r | |
| 30 | #include <Register/Msr/SilvermontMsr.h>\r | |
| 35fd9411 | 31 | #include <Register/Msr/GoldmontMsr.h>\r |
| b715c37e | 32 | #include <Register/Msr/GoldmontPlusMsr.h>\r |
| 195c9436 MK |
33 | #include <Register/Msr/NehalemMsr.h>\r |
| 34 | #include <Register/Msr/Xeon5600Msr.h>\r | |
| 35 | #include <Register/Msr/XeonE7Msr.h>\r | |
| 36 | #include <Register/Msr/SandyBridgeMsr.h>\r | |
| 37 | #include <Register/Msr/IvyBridgeMsr.h>\r | |
| 38 | #include <Register/Msr/HaswellMsr.h>\r | |
| 39 | #include <Register/Msr/HaswellEMsr.h>\r | |
| 40 | #include <Register/Msr/BroadwellMsr.h>\r | |
| 41 | #include <Register/Msr/XeonDMsr.h>\r | |
| 42 | #include <Register/Msr/SkylakeMsr.h>\r | |
| 43 | #include <Register/Msr/XeonPhiMsr.h>\r | |
| 44 | #include <Register/Msr/Pentium4Msr.h>\r | |
| 45 | #include <Register/Msr/CoreMsr.h>\r | |
| 46 | #include <Register/Msr/PentiumMMsr.h>\r | |
| 47 | #include <Register/Msr/P6Msr.h>\r | |
| 48 | #include <Register/Msr/PentiumMsr.h>\r | |
| 49 | \r | |
| 50 | #endif\r |