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80c4b236 JF |
1 | /** @file\r |
2 | Features in MSR_IA32_FEATURE_CONTROL register.\r | |
3 | \r | |
9c90d39b | 4 | Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>\r |
0acd8697 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
80c4b236 JF |
6 | \r |
7 | **/\r | |
8 | \r | |
9 | #include "CpuCommonFeatures.h"\r | |
10 | \r | |
80c4b236 JF |
11 | /**\r |
12 | Detects if VMX feature supported on current processor.\r | |
13 | \r | |
14 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
15 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
16 | structure for the CPU executing this function.\r | |
17 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
18 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
19 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
20 | RegisterCpuFeature().\r | |
21 | \r | |
22 | @retval TRUE VMX feature is supported.\r | |
23 | @retval FALSE VMX feature is not supported.\r | |
24 | \r | |
25 | @note This service could be called by BSP/APs.\r | |
26 | **/\r | |
27 | BOOLEAN\r | |
28 | EFIAPI\r | |
29 | VmxSupport (\r | |
30 | IN UINTN ProcessorNumber,\r | |
31 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
32 | IN VOID *ConfigData OPTIONAL\r | |
33 | )\r | |
34 | {\r | |
80c4b236 JF |
35 | return (CpuInfo->CpuIdVersionInfoEcx.Bits.VMX == 1);\r |
36 | }\r | |
37 | \r | |
38 | /**\r | |
b1fe2029 | 39 | Initializes VMX feature to specific state.\r |
80c4b236 JF |
40 | \r |
41 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
42 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
43 | structure for the CPU executing this function.\r | |
44 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
45 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
46 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
47 | RegisterCpuFeature().\r | |
b1fe2029 ED |
48 | @param[in] State If TRUE, then the VMX feature must be enabled.\r |
49 | If FALSE, then the VMX feature must be disabled.\r | |
80c4b236 | 50 | \r |
b1fe2029 | 51 | @retval RETURN_SUCCESS VMX feature is initialized.\r |
80c4b236 JF |
52 | \r |
53 | @note This service could be called by BSP only.\r | |
54 | **/\r | |
55 | RETURN_STATUS\r | |
56 | EFIAPI\r | |
b1fe2029 | 57 | VmxInitialize (\r |
80c4b236 JF |
58 | IN UINTN ProcessorNumber,\r |
59 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
4ec586b9 | 60 | IN VOID *ConfigData OPTIONAL,\r |
80c4b236 JF |
61 | IN BOOLEAN State\r |
62 | )\r | |
63 | {\r | |
d28daadd ED |
64 | //\r |
65 | // The scope of EnableVmxOutsideSmx bit in the MSR_IA32_FEATURE_CONTROL is core for\r | |
66 | // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r | |
67 | // core.\r | |
68 | //\r | |
69 | if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
70 | IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
71 | IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r | |
72 | if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r | |
73 | return RETURN_SUCCESS;\r | |
74 | }\r | |
75 | }\r | |
76 | \r | |
9c90d39b ED |
77 | CPU_REGISTER_TABLE_TEST_THEN_WRITE_FIELD (\r |
78 | ProcessorNumber,\r | |
79 | Msr,\r | |
80 | MSR_IA32_FEATURE_CONTROL,\r | |
81 | MSR_IA32_FEATURE_CONTROL_REGISTER,\r | |
82 | Bits.EnableVmxOutsideSmx,\r | |
83 | (State) ? 1 : 0\r | |
84 | );\r | |
85 | \r | |
80c4b236 JF |
86 | return RETURN_SUCCESS;\r |
87 | }\r | |
88 | \r | |
89 | /**\r | |
90 | Detects if Lock Feature Control Register feature supported on current processor.\r | |
91 | \r | |
92 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
93 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
94 | structure for the CPU executing this function.\r | |
95 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
96 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
97 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
98 | RegisterCpuFeature().\r | |
99 | \r | |
100 | @retval TRUE Lock Feature Control Register feature is supported.\r | |
101 | @retval FALSE Lock Feature Control Register feature is not supported.\r | |
102 | \r | |
103 | @note This service could be called by BSP/APs.\r | |
104 | **/\r | |
105 | BOOLEAN\r | |
106 | EFIAPI\r | |
107 | LockFeatureControlRegisterSupport (\r | |
108 | IN UINTN ProcessorNumber,\r | |
109 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
110 | IN VOID *ConfigData OPTIONAL\r | |
111 | )\r | |
112 | {\r | |
80c4b236 JF |
113 | return TRUE;\r |
114 | }\r | |
115 | \r | |
116 | /**\r | |
117 | Initializes Lock Feature Control Register feature to specific state.\r | |
118 | \r | |
119 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
120 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
121 | structure for the CPU executing this function.\r | |
122 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
123 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
124 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
125 | RegisterCpuFeature().\r | |
126 | @param[in] State If TRUE, then the Lock Feature Control Register feature must be enabled.\r | |
127 | If FALSE, then the Lock Feature Control Register feature must be disabled.\r | |
128 | \r | |
129 | @retval RETURN_SUCCESS Lock Feature Control Register feature is initialized.\r | |
130 | \r | |
131 | @note This service could be called by BSP only.\r | |
132 | **/\r | |
133 | RETURN_STATUS\r | |
134 | EFIAPI\r | |
135 | LockFeatureControlRegisterInitialize (\r | |
136 | IN UINTN ProcessorNumber,\r | |
137 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
4ec586b9 | 138 | IN VOID *ConfigData OPTIONAL,\r |
80c4b236 JF |
139 | IN BOOLEAN State\r |
140 | )\r | |
141 | {\r | |
d28daadd ED |
142 | //\r |
143 | // The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for\r | |
144 | // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r | |
145 | // core.\r | |
146 | //\r | |
147 | if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
148 | IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
149 | IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r | |
150 | if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r | |
151 | return RETURN_SUCCESS;\r | |
152 | }\r | |
153 | }\r | |
154 | \r | |
9c90d39b ED |
155 | CPU_REGISTER_TABLE_TEST_THEN_WRITE_FIELD (\r |
156 | ProcessorNumber,\r | |
157 | Msr,\r | |
158 | MSR_IA32_FEATURE_CONTROL,\r | |
159 | MSR_IA32_FEATURE_CONTROL_REGISTER,\r | |
160 | Bits.Lock,\r | |
161 | 1\r | |
162 | );\r | |
163 | \r | |
80c4b236 JF |
164 | return RETURN_SUCCESS;\r |
165 | }\r | |
166 | \r | |
167 | /**\r | |
168 | Detects if SMX feature supported on current processor.\r | |
169 | \r | |
170 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
171 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
172 | structure for the CPU executing this function.\r | |
173 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
174 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
175 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
176 | RegisterCpuFeature().\r | |
177 | \r | |
178 | @retval TRUE SMX feature is supported.\r | |
179 | @retval FALSE SMX feature is not supported.\r | |
180 | \r | |
181 | @note This service could be called by BSP/APs.\r | |
182 | **/\r | |
183 | BOOLEAN\r | |
184 | EFIAPI\r | |
185 | SmxSupport (\r | |
186 | IN UINTN ProcessorNumber,\r | |
187 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
188 | IN VOID *ConfigData OPTIONAL\r | |
189 | )\r | |
190 | {\r | |
80c4b236 JF |
191 | return (CpuInfo->CpuIdVersionInfoEcx.Bits.SMX == 1);\r |
192 | }\r | |
193 | \r | |
194 | /**\r | |
b1fe2029 | 195 | Initializes SMX feature to specific state.\r |
80c4b236 JF |
196 | \r |
197 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
198 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
199 | structure for the CPU executing this function.\r | |
200 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
201 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
202 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
203 | RegisterCpuFeature().\r | |
b1fe2029 ED |
204 | @param[in] State If TRUE, then SMX feature must be enabled.\r |
205 | If FALSE, then SMX feature must be disabled.\r | |
80c4b236 | 206 | \r |
b1fe2029 ED |
207 | @retval RETURN_SUCCESS SMX feature is initialized.\r |
208 | @retval RETURN_UNSUPPORTED VMX not initialized.\r | |
80c4b236 JF |
209 | \r |
210 | @note This service could be called by BSP only.\r | |
211 | **/\r | |
212 | RETURN_STATUS\r | |
213 | EFIAPI\r | |
b1fe2029 | 214 | SmxInitialize (\r |
80c4b236 JF |
215 | IN UINTN ProcessorNumber,\r |
216 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
4ec586b9 | 217 | IN VOID *ConfigData OPTIONAL,\r |
80c4b236 JF |
218 | IN BOOLEAN State\r |
219 | )\r | |
220 | {\r | |
b1fe2029 ED |
221 | RETURN_STATUS Status;\r |
222 | \r | |
d28daadd ED |
223 | //\r |
224 | // The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for\r | |
225 | // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r | |
226 | // core.\r | |
227 | //\r | |
228 | if (IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
229 | IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r | |
230 | if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r | |
231 | return RETURN_SUCCESS;\r | |
232 | }\r | |
233 | }\r | |
234 | \r | |
b1fe2029 ED |
235 | Status = RETURN_SUCCESS;\r |
236 | \r | |
237 | if (State && (!IsCpuFeatureInSetting (CPU_FEATURE_VMX))) {\r | |
238 | DEBUG ((DEBUG_WARN, "Warning :: Can't enable SMX feature when VMX feature not enabled, disable it.\n"));\r | |
239 | State = FALSE;\r | |
240 | Status = RETURN_UNSUPPORTED;\r | |
241 | }\r | |
80c4b236 | 242 | \r |
1f0d8096 JV |
243 | CPU_REGISTER_TABLE_WRITE_FIELD (\r |
244 | ProcessorNumber,\r | |
245 | ControlRegister,\r | |
246 | 4,\r | |
247 | IA32_CR4,\r | |
248 | Bits.SMXE,\r | |
249 | (State) ? 1 : 0\r | |
250 | )\r | |
251 | \r | |
9c90d39b ED |
252 | CPU_REGISTER_TABLE_TEST_THEN_WRITE_FIELD (\r |
253 | ProcessorNumber,\r | |
254 | Msr,\r | |
255 | MSR_IA32_FEATURE_CONTROL,\r | |
256 | MSR_IA32_FEATURE_CONTROL_REGISTER,\r | |
257 | Bits.SenterLocalFunctionEnables,\r | |
258 | (State) ? 0x7F : 0\r | |
259 | );\r | |
260 | \r | |
261 | CPU_REGISTER_TABLE_TEST_THEN_WRITE_FIELD (\r | |
262 | ProcessorNumber,\r | |
263 | Msr,\r | |
264 | MSR_IA32_FEATURE_CONTROL,\r | |
265 | MSR_IA32_FEATURE_CONTROL_REGISTER,\r | |
266 | Bits.SenterGlobalEnable,\r | |
267 | (State) ? 1 : 0\r | |
268 | );\r | |
269 | \r | |
270 | CPU_REGISTER_TABLE_TEST_THEN_WRITE_FIELD (\r | |
271 | ProcessorNumber,\r | |
272 | Msr,\r | |
273 | MSR_IA32_FEATURE_CONTROL,\r | |
274 | MSR_IA32_FEATURE_CONTROL_REGISTER,\r | |
275 | Bits.EnableVmxInsideSmx,\r | |
276 | (State) ? 1 : 0\r | |
277 | );\r | |
278 | \r | |
b1fe2029 | 279 | return Status;\r |
80c4b236 | 280 | }\r |