projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 09119a00 MK |
1 | /** @file\r |
| 2 | SMM STM support functions\r | |
| 3 | \r | |
| 4 | Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r | |
| 0acd8697 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 09119a00 MK |
6 | \r |
| 7 | **/\r | |
| 8 | \r | |
| edd46cd4 | 9 | #include <PiMm.h>\r |
| 09119a00 MK |
10 | #include <Library/DebugLib.h>\r |
| 11 | \r | |
| 12 | #include "SmmStm.h"\r | |
| 13 | \r | |
| 14 | ///\r | |
| 15 | /// Page Table Entry\r | |
| 16 | ///\r | |
| 17 | #define IA32_PG_P BIT0\r | |
| 18 | #define IA32_PG_RW BIT1\r | |
| 19 | #define IA32_PG_PS BIT7\r | |
| 20 | \r | |
| 21 | /**\r | |
| 22 | \r | |
| 23 | Create 4G page table for STM.\r | |
| 24 | 4M Non-PAE page table in IA32 version.\r | |
| 25 | \r | |
| 26 | @param PageTableBase The page table base in MSEG\r | |
| 27 | \r | |
| 28 | **/\r | |
| 29 | VOID\r | |
| 30 | StmGen4GPageTable (\r | |
| 31 | IN UINTN PageTableBase\r | |
| 32 | )\r | |
| 33 | {\r | |
| 34 | UINTN Index;\r | |
| 35 | UINT32 *Pte;\r | |
| 36 | UINT32 Address;\r | |
| 37 | \r | |
| 38 | Pte = (UINT32*)(UINTN)PageTableBase;\r | |
| 39 | \r | |
| 40 | Address = 0;\r | |
| 41 | for (Index = 0; Index < SIZE_4KB / sizeof (*Pte); Index++) {\r | |
| 42 | *Pte = Address | IA32_PG_PS | IA32_PG_RW | IA32_PG_P;\r | |
| 43 | Pte++;\r | |
| 44 | Address += SIZE_4MB;\r | |
| 45 | }\r | |
| 46 | }\r | |
| 47 | \r | |
| 48 | /**\r | |
| 49 | This is SMM exception handle.\r | |
| 50 | Consumed by STM when exception happen.\r | |
| 51 | \r | |
| 52 | @param Context STM protection exception stack frame\r | |
| 53 | \r | |
| 54 | @return the EBX value for STM reference.\r | |
| 55 | EBX = 0: resume SMM guest using register state found on exception stack.\r | |
| 56 | EBX = 1 to 0x0F: EBX contains a BIOS error code which the STM must record in the\r | |
| 57 | TXT.ERRORCODE register and subsequently reset the system via\r | |
| 58 | TXT.CMD.SYS_RESET. The value of the TXT.ERRORCODE register is calculated as\r | |
| 59 | follows: TXT.ERRORCODE = (EBX & 0x0F) | STM_CRASH_BIOS_PANIC\r | |
| 60 | EBX = 0x10 to 0xFFFFFFFF - reserved, do not use.\r | |
| 61 | \r | |
| 62 | **/\r | |
| 63 | UINT32\r | |
| 64 | EFIAPI\r | |
| 65 | SmmStmExceptionHandler (\r | |
| 66 | IN OUT STM_PROTECTION_EXCEPTION_STACK_FRAME Context\r | |
| 67 | )\r | |
| 68 | {\r | |
| 69 | // TBD - SmmStmExceptionHandler, record information\r | |
| 70 | DEBUG ((DEBUG_ERROR, "SmmStmExceptionHandler ...\n"));\r | |
| 71 | //\r | |
| 72 | // Skip this instruction and continue;\r | |
| 73 | //\r | |
| 74 | Context.Ia32StackFrame->Rip += Context.Ia32StackFrame->VmcsExitInstructionLength;\r | |
| 75 | \r | |
| 76 | return 0;\r | |
| 77 | }\r |