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1/** @file\r
2Semaphore mechanism to indicate to the BSP that an AP has exited SMM\r
3after SMBASE relocation.\r
4\r
5Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
0acd8697 6SPDX-License-Identifier: BSD-2-Clause-Patent\r
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7\r
8**/\r
9\r
10#include "PiSmmCpuDxeSmm.h"\r
11\r
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12X86_ASSEMBLY_PATCH_LABEL gPatchSmmRelocationOriginalAddressPtr32;\r
13X86_ASSEMBLY_PATCH_LABEL gPatchRebasedFlagAddr32;\r
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14\r
15UINTN mSmmRelocationOriginalAddress;\r
16volatile BOOLEAN *mRebasedFlag;\r
17\r
18/**\r
19AP Semaphore operation in 32-bit mode while BSP runs in 64-bit mode.\r
20**/\r
21VOID\r
22SmmRelocationSemaphoreComplete32 (\r
23 VOID\r
24 );\r
25\r
26/**\r
27 Hook return address of SMM Save State so that semaphore code\r
28 can be executed immediately after AP exits SMM to indicate to\r
29 the BSP that an AP has exited SMM after SMBASE relocation.\r
30\r
31 @param[in] CpuIndex The processor index.\r
32 @param[in] RebasedFlag A pointer to a flag that is set to TRUE\r
33 immediately after AP exits SMM.\r
34\r
35**/\r
36VOID\r
37SemaphoreHook (\r
38 IN UINTN CpuIndex,\r
39 IN volatile BOOLEAN *RebasedFlag\r
40 )\r
41{\r
42 SMRAM_SAVE_STATE_MAP *CpuState;\r
43 UINTN TempValue;\r
44\r
45 mRebasedFlag = RebasedFlag;\r
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46 PatchInstructionX86 (\r
47 gPatchRebasedFlagAddr32,\r
48 (UINT32)(UINTN)mRebasedFlag,\r
49 4\r
50 );\r
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51\r
52 CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);\r
53 mSmmRelocationOriginalAddress = HookReturnFromSmm (\r
54 CpuIndex,\r
55 CpuState,\r
56 (UINT64)(UINTN)&SmmRelocationSemaphoreComplete32,\r
57 (UINT64)(UINTN)&SmmRelocationSemaphoreComplete\r
58 );\r
59\r
60 //\r
61 // Use temp value to fix ICC complier warning\r
62 //\r
63 TempValue = (UINTN)&mSmmRelocationOriginalAddress;\r
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64 PatchInstructionX86 (\r
65 gPatchSmmRelocationOriginalAddressPtr32,\r
66 (UINT32)TempValue,\r
67 4\r
68 );\r
427e3573 69}\r