[mirror_edk2.git] / UefiCpuPkg / SecCore / SecMain.c

/** @file\r
  C functions in SEC\r
\r
  Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include "SecMain.h"\r
\r
EFI_PEI_TEMPORARY_RAM_DONE_PPI gSecTemporaryRamDonePpi = {\r
  SecTemporaryRamDone\r
};\r
\r
EFI_SEC_PLATFORM_INFORMATION_PPI  mSecPlatformInformationPpi = { SecPlatformInformation };\r
\r
EFI_PEI_PPI_DESCRIPTOR            mPeiSecPlatformInformationPpi[] = {\r
  {\r
    //\r
    // SecPerformance PPI notify descriptor.\r
    //\r
    EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK,\r
    &gPeiSecPerformancePpiGuid,\r
    (VOID *) (UINTN) SecPerformancePpiCallBack\r
  },\r
  {\r
    EFI_PEI_PPI_DESCRIPTOR_PPI,\r
    &gEfiTemporaryRamDonePpiGuid,\r
    &gSecTemporaryRamDonePpi\r
  },\r
  {\r
    (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
    &gEfiSecPlatformInformationPpiGuid,\r
    &mSecPlatformInformationPpi\r
  }\r
};\r
\r
//\r
// These are IDT entries pointing to 10:FFFFFFE4h.\r
//\r
UINT64  mIdtEntryTemplate = 0xffff8e000010ffe4ULL;\r
\r
/**\r
  Caller provided function to be invoked at the end of InitializeDebugAgent().\r
\r
  Entry point to the C language phase of SEC. After the SEC assembly\r
  code has initialized some temporary memory and set up the stack,\r
  the control is transferred to this function.\r
\r
  @param[in] Context    The first input parameter of InitializeDebugAgent().\r
\r
**/\r
VOID\r
NORETURN\r
EFIAPI\r
SecStartupPhase2(\r
  IN VOID                     *Context\r
  );\r
\r
/**\r
  Entry point of the notification callback function itself within the PEIM.\r
  It is to get SEC performance data and build HOB to convey the SEC performance\r
  data to DXE phase.\r
\r
  @param  PeiServices      Indirect reference to the PEI Services Table.\r
  @param  NotifyDescriptor Address of the notification descriptor data structure.\r
  @param  Ppi              Address of the PPI that was installed.\r
\r
  @return Status of the notification.\r
          The status code returned from this function is ignored.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SecPerformancePpiCallBack (\r
  IN EFI_PEI_SERVICES           **PeiServices,\r
  IN EFI_PEI_NOTIFY_DESCRIPTOR  *NotifyDescriptor,\r
  IN VOID                       *Ppi\r
  )\r
{\r
  EFI_STATUS                    Status;\r
  PEI_SEC_PERFORMANCE_PPI       *SecPerf;\r
  FIRMWARE_SEC_PERFORMANCE      Performance;\r
\r
  SecPerf = (PEI_SEC_PERFORMANCE_PPI *) Ppi;\r
  Status = SecPerf->GetPerformance ((CONST EFI_PEI_SERVICES **) PeiServices, SecPerf, &Performance);\r
  if (!EFI_ERROR (Status)) {\r
    BuildGuidDataHob (\r
      &gEfiFirmwarePerformanceGuid,\r
      &Performance,\r
      sizeof (FIRMWARE_SEC_PERFORMANCE)\r
    );\r
    DEBUG ((DEBUG_INFO, "FPDT: SEC Performance Hob ResetEnd = %ld\n", Performance.ResetEnd));\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
\r
  Entry point to the C language phase of SEC. After the SEC assembly\r
  code has initialized some temporary memory and set up the stack,\r
  the control is transferred to this function.\r
\r
\r
  @param SizeOfRam           Size of the temporary memory available for use.\r
  @param TempRamBase         Base address of temporary ram\r
  @param BootFirmwareVolume  Base address of the Boot Firmware Volume.\r
**/\r
VOID\r
NORETURN\r
EFIAPI\r
SecStartup (\r
  IN UINT32                   SizeOfRam,\r
  IN UINT32                   TempRamBase,\r
  IN VOID                     *BootFirmwareVolume\r
  )\r
{\r
  EFI_SEC_PEI_HAND_OFF        SecCoreData;\r
  IA32_DESCRIPTOR             IdtDescriptor;\r
  SEC_IDT_TABLE               IdtTableInStack;\r
  UINT32                      Index;\r
  UINT32                      PeiStackSize;\r
  EFI_STATUS                  Status;\r
\r
  //\r
  // Report Status Code to indicate entering SEC core\r
  //\r
  REPORT_STATUS_CODE (\r
    EFI_PROGRESS_CODE,\r
    EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_ENTRY_POINT\r
    );\r
\r
  PeiStackSize = PcdGet32 (PcdPeiTemporaryRamStackSize);\r
  if (PeiStackSize == 0) {\r
    PeiStackSize = (SizeOfRam >> 1);\r
  }\r
\r
  ASSERT (PeiStackSize < SizeOfRam);\r
\r
  //\r
  // Process all libraries constructor function linked to SecCore.\r
  //\r
  ProcessLibraryConstructorList ();\r
\r
  //\r
  // Initialize floating point operating environment\r
  // to be compliant with UEFI spec.\r
  //\r
  InitializeFloatingPointUnits ();\r
\r
  // |-------------------|---->\r
  // |IDT Table          |\r
  // |-------------------|\r
  // |PeiService Pointer |    PeiStackSize\r
  // |-------------------|\r
  // |                   |\r
  // |      Stack        |\r
  // |-------------------|---->\r
  // |                   |\r
  // |                   |\r
  // |      Heap         |    PeiTemporayRamSize\r
  // |                   |\r
  // |                   |\r
  // |-------------------|---->  TempRamBase\r
\r
  IdtTableInStack.PeiService = 0;\r
  for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {\r
    CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&mIdtEntryTemplate, sizeof (UINT64));\r
  }\r
\r
  IdtDescriptor.Base  = (UINTN) &IdtTableInStack.IdtTable;\r
  IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);\r
\r
  AsmWriteIdtr (&IdtDescriptor);\r
\r
  //\r
  // Setup the default exception handlers\r
  //\r
  Status = InitializeCpuExceptionHandlers (NULL);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  //\r
  // Update the base address and length of Pei temporary memory\r
  //\r
  SecCoreData.DataSize               = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
  SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
  SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;\r
  SecCoreData.TemporaryRamBase       = (VOID*)(UINTN) TempRamBase;\r
  SecCoreData.TemporaryRamSize       = SizeOfRam;\r
  SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;\r
  SecCoreData.PeiTemporaryRamSize    = SizeOfRam - PeiStackSize;\r
  SecCoreData.StackBase              = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);\r
  SecCoreData.StackSize              = PeiStackSize;\r
\r
  //\r
  // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
  //\r
  InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
\r
  //\r
  // Should not come here.\r
  //\r
  UNREACHABLE ();\r
}\r
\r
/**\r
  Caller provided function to be invoked at the end of InitializeDebugAgent().\r
\r
  Entry point to the C language phase of SEC. After the SEC assembly\r
  code has initialized some temporary memory and set up the stack,\r
  the control is transferred to this function.\r
\r
  @param[in] Context    The first input parameter of InitializeDebugAgent().\r
\r
**/\r
VOID\r
NORETURN\r
EFIAPI\r
SecStartupPhase2(\r
  IN VOID                     *Context\r
  )\r
{\r
  EFI_SEC_PEI_HAND_OFF        *SecCoreData;\r
  EFI_PEI_PPI_DESCRIPTOR      *PpiList;\r
  UINT32                      Index;\r
  EFI_PEI_PPI_DESCRIPTOR      *AllSecPpiList;\r
  EFI_PEI_CORE_ENTRY_POINT    PeiCoreEntryPoint;\r
\r
  PeiCoreEntryPoint = NULL;\r
  SecCoreData   = (EFI_SEC_PEI_HAND_OFF *) Context;\r
\r
  //\r
  // Perform platform specific initialization before entering PeiCore.\r
  //\r
  PpiList = SecPlatformMain (SecCoreData);\r
  //\r
  // Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug\r
  // is enabled.\r
  //\r
  if (PpiList != NULL) {\r
    for (Index = 0;\r
      (PpiList[Index].Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;\r
      Index++) {\r
      if (CompareGuid (PpiList[Index].Guid, &gEfiPeiCoreFvLocationPpiGuid) &&\r
          (((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocation != 0)\r
         ) {\r
        //\r
        // In this case, SecCore is in BFV but PeiCore is in another FV reported by PPI.\r
        //\r
        FindAndReportEntryPoints (\r
          (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
          (EFI_FIRMWARE_VOLUME_HEADER *) ((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocation,\r
          &PeiCoreEntryPoint\r
          );\r
        if (PeiCoreEntryPoint != NULL) {\r
          break;\r
        } else {\r
          //\r
          // PeiCore not found\r
          //\r
          CpuDeadLoop ();\r
        }\r
      }\r
    }\r
  }\r
  //\r
  // If EFI_PEI_CORE_FV_LOCATION_PPI not found, try to locate PeiCore from BFV.\r
  //\r
  if (PeiCoreEntryPoint == NULL) {\r
    //\r
    // Both SecCore and PeiCore are in BFV.\r
    //\r
    FindAndReportEntryPoints (\r
      (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
      (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
      &PeiCoreEntryPoint\r
      );\r
    if (PeiCoreEntryPoint == NULL) {\r
      CpuDeadLoop ();\r
    }\r
  }\r
\r
  if (PpiList != NULL) {\r
    AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRamBase;\r
\r
    //\r
    // Remove the terminal flag from the terminal PPI\r
    //\r
    CopyMem (AllSecPpiList, mPeiSecPlatformInformationPpi, sizeof (mPeiSecPlatformInformationPpi));\r
    Index = sizeof (mPeiSecPlatformInformationPpi) / sizeof (EFI_PEI_PPI_DESCRIPTOR) - 1;\r
    AllSecPpiList[Index].Flags = AllSecPpiList[Index].Flags & (~EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
\r
    //\r
    // Append the platform additional PPI list\r
    //\r
    Index += 1;\r
    while (((PpiList->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)) {\r
      CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
      Index++;\r
      PpiList++;\r
    }\r
\r
    //\r
    // Add the terminal PPI\r
    //\r
    CopyMem (&AllSecPpiList[Index ++], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
\r
    //\r
    // Set PpiList to the total PPI\r
    //\r
    PpiList = AllSecPpiList;\r
\r
    //\r
    // Adjust PEI TEMP RAM Range.\r
    //\r
    ASSERT (SecCoreData->PeiTemporaryRamSize > Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
    SecCoreData->PeiTemporaryRamBase = (VOID *)((UINTN) SecCoreData->PeiTemporaryRamBase + Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
    SecCoreData->PeiTemporaryRamSize = SecCoreData->PeiTemporaryRamSize - Index * sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
    //\r
    // Adjust the Base and Size to be 8-byte aligned as HOB which has 8byte aligned requirement\r
    // will be built based on them in PEI phase.\r
    //\r
    SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);\r
    SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;\r
  } else {\r
    //\r
    // No addition PPI, PpiList directly point to the common PPI list.\r
    //\r
    PpiList = &mPeiSecPlatformInformationPpi[0];\r
  }\r
\r
  DEBUG ((\r
    DEBUG_INFO,\r
    "%a() Stack Base: 0x%p, Stack Size: 0x%x\n",\r
    __FUNCTION__,\r
    SecCoreData->StackBase,\r
    (UINT32) SecCoreData->StackSize\r
    ));\r
\r
  //\r
  // Report Status Code to indicate transferring to PEI core\r
  //\r
  REPORT_STATUS_CODE (\r
    EFI_PROGRESS_CODE,\r
    EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_HANDOFF_TO_NEXT\r
    );\r
\r
  //\r
  // Transfer the control to the PEI core\r
  //\r
  ASSERT (PeiCoreEntryPoint != NULL);\r
  (*PeiCoreEntryPoint) (SecCoreData, PpiList);\r
\r
  //\r
  // Should not come here.\r
  //\r
  UNREACHABLE ();\r
}\r
\r
/**\r
  TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked\r
  by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.\r
\r
  @retval EFI_SUCCESS           Use of Temporary RAM was disabled.\r
  @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
SecTemporaryRamDone (\r
  VOID\r
  )\r
{\r
  BOOLEAN  State;\r
\r
  //\r
  // Republish Sec Platform Information(2) PPI\r
  //\r
  RepublishSecPlatformInformationPpi ();\r
\r
  //\r
  // Migrate DebugAgentContext.\r
  //\r
  InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
\r
  //\r
  // Disable interrupts and save current interrupt state\r
  //\r
  State = SaveAndDisableInterrupts();\r
\r
  //\r
  // Disable Temporary RAM after Stack and Heap have been migrated at this point.\r
  //\r
  SecPlatformDisableTemporaryMemory ();\r
\r
  //\r
  // Restore original interrupt state\r
  //\r
  SetInterruptState (State);\r
\r
  return EFI_SUCCESS;\r
}\r
Commit	Line	Data
1921695e MK	1	/** @file\r
	2	C functions in SEC\r
	3	\r
373c2c5b	4	Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>\r
0acd8697	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
1921695e MK	6	\r
	7	**/\r
	8	\r
	9	#include "SecMain.h"\r
	10	\r
	11	EFI_PEI_TEMPORARY_RAM_DONE_PPI gSecTemporaryRamDonePpi = {\r
	12	SecTemporaryRamDone\r
	13	};\r
	14	\r
	15	EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = { SecPlatformInformation };\r
	16	\r
	17	EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {\r
f2e70629 SZ	18	{\r
	19	//\r
	20	// SecPerformance PPI notify descriptor.\r
	21	//\r
	22	EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK,\r
	23	&gPeiSecPerformancePpiGuid,\r
	24	(VOID *) (UINTN) SecPerformancePpiCallBack\r
	25	},\r
1921695e MK	26	{\r
	27	EFI_PEI_PPI_DESCRIPTOR_PPI,\r
	28	&gEfiTemporaryRamDonePpiGuid,\r
	29	&gSecTemporaryRamDonePpi\r
	30	},\r
	31	{\r
	32	(EFI_PEI_PPI_DESCRIPTOR_PPI \| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
	33	&gEfiSecPlatformInformationPpiGuid,\r
	34	&mSecPlatformInformationPpi\r
	35	}\r
	36	};\r
	37	\r
	38	//\r
	39	// These are IDT entries pointing to 10:FFFFFFE4h.\r
	40	//\r
	41	UINT64 mIdtEntryTemplate = 0xffff8e000010ffe4ULL;\r
	42	\r
	43	/**\r
	44	Caller provided function to be invoked at the end of InitializeDebugAgent().\r
	45	\r
	46	Entry point to the C language phase of SEC. After the SEC assembly\r
	47	code has initialized some temporary memory and set up the stack,\r
	48	the control is transferred to this function.\r
	49	\r
	50	@param[in] Context The first input parameter of InitializeDebugAgent().\r
	51	\r
	52	**/\r
	53	VOID\r
61257251	54	NORETURN\r
1921695e MK	55	EFIAPI\r
	56	SecStartupPhase2(\r
	57	IN VOID *Context\r
	58	);\r
	59	\r
f2e70629 SZ	60	/**\r
	61	Entry point of the notification callback function itself within the PEIM.\r
	62	It is to get SEC performance data and build HOB to convey the SEC performance\r
	63	data to DXE phase.\r
	64	\r
	65	@param PeiServices Indirect reference to the PEI Services Table.\r
	66	@param NotifyDescriptor Address of the notification descriptor data structure.\r
	67	@param Ppi Address of the PPI that was installed.\r
	68	\r
	69	@return Status of the notification.\r
	70	The status code returned from this function is ignored.\r
	71	**/\r
	72	EFI_STATUS\r
	73	EFIAPI\r
	74	SecPerformancePpiCallBack (\r
	75	IN EFI_PEI_SERVICES **PeiServices,\r
	76	IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
	77	IN VOID *Ppi\r
	78	)\r
	79	{\r
	80	EFI_STATUS Status;\r
	81	PEI_SEC_PERFORMANCE_PPI *SecPerf;\r
	82	FIRMWARE_SEC_PERFORMANCE Performance;\r
	83	\r
	84	SecPerf = (PEI_SEC_PERFORMANCE_PPI *) Ppi;\r
	85	Status = SecPerf->GetPerformance ((CONST EFI_PEI_SERVICES **) PeiServices, SecPerf, &Performance);\r
	86	if (!EFI_ERROR (Status)) {\r
	87	BuildGuidDataHob (\r
	88	&gEfiFirmwarePerformanceGuid,\r
	89	&Performance,\r
	90	sizeof (FIRMWARE_SEC_PERFORMANCE)\r
	91	);\r
	92	DEBUG ((DEBUG_INFO, "FPDT: SEC Performance Hob ResetEnd = %ld\n", Performance.ResetEnd));\r
	93	}\r
	94	\r
	95	return Status;\r
	96	}\r
	97	\r
1921695e MK	98	/**\r
	99	\r
	100	Entry point to the C language phase of SEC. After the SEC assembly\r
	101	code has initialized some temporary memory and set up the stack,\r
	102	the control is transferred to this function.\r
	103	\r
	104	\r
	105	@param SizeOfRam Size of the temporary memory available for use.\r
	106	@param TempRamBase Base address of temporary ram\r
	107	@param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
	108	**/\r
	109	VOID\r
7cd8a575	110	NORETURN\r
1921695e MK	111	EFIAPI\r
	112	SecStartup (\r
	113	IN UINT32 SizeOfRam,\r
	114	IN UINT32 TempRamBase,\r
	115	IN VOID *BootFirmwareVolume\r
	116	)\r
	117	{\r
	118	EFI_SEC_PEI_HAND_OFF SecCoreData;\r
	119	IA32_DESCRIPTOR IdtDescriptor;\r
	120	SEC_IDT_TABLE IdtTableInStack;\r
	121	UINT32 Index;\r
	122	UINT32 PeiStackSize;\r
	123	EFI_STATUS Status;\r
	124	\r
	125	//\r
	126	// Report Status Code to indicate entering SEC core\r
	127	//\r
	128	REPORT_STATUS_CODE (\r
	129	EFI_PROGRESS_CODE,\r
	130	EFI_SOFTWARE_SEC \| EFI_SW_SEC_PC_ENTRY_POINT\r
	131	);\r
	132	\r
	133	PeiStackSize = PcdGet32 (PcdPeiTemporaryRamStackSize);\r
	134	if (PeiStackSize == 0) {\r
	135	PeiStackSize = (SizeOfRam >> 1);\r
	136	}\r
	137	\r
	138	ASSERT (PeiStackSize < SizeOfRam);\r
	139	\r
	140	//\r
	141	// Process all libraries constructor function linked to SecCore.\r
	142	//\r
	143	ProcessLibraryConstructorList ();\r
	144	\r
	145	//\r
	146	// Initialize floating point operating environment\r
	147	// to be compliant with UEFI spec.\r
	148	//\r
	149	InitializeFloatingPointUnits ();\r
	150	\r
	151	// \|-------------------\|---->\r
	152	// \|IDT Table \|\r
	153	// \|-------------------\|\r
	154	// \|PeiService Pointer \| PeiStackSize\r
	155	// \|-------------------\|\r
	156	// \| \|\r
	157	// \| Stack \|\r
	158	// \|-------------------\|---->\r
	159	// \| \|\r
	160	// \| \|\r
	161	// \| Heap \| PeiTemporayRamSize\r
	162	// \| \|\r
	163	// \| \|\r
	164	// \|-------------------\|----> TempRamBase\r
	165	\r
	166	IdtTableInStack.PeiService = 0;\r
	167	for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {\r
	168	CopyMem ((VOID)&IdtTableInStack.IdtTable[Index], (VOID)&mIdtEntryTemplate, sizeof (UINT64));\r
	169	}\r
	170	\r
	171	IdtDescriptor.Base = (UINTN) &IdtTableInStack.IdtTable;\r
	172	IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);\r
	173	\r
	174	AsmWriteIdtr (&IdtDescriptor);\r
175	\r
176	//\r
177	// Setup the default exception handlers\r
178	//\r
179	Status = InitializeCpuExceptionHandlers (NULL);\r
180	ASSERT_EFI_ERROR (Status);\r
181	\r
182	//\r
183	// Update the base address and length of Pei temporary memory\r
184	//\r
185	SecCoreData.DataSize = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
186	SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
f0162959	187	SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;\r
1921695e MK	188	SecCoreData.TemporaryRamBase = (VOID*)(UINTN) TempRamBase;\r
	189	SecCoreData.TemporaryRamSize = SizeOfRam;\r
	190	SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;\r
	191	SecCoreData.PeiTemporaryRamSize = SizeOfRam - PeiStackSize;\r
	192	SecCoreData.StackBase = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);\r
	193	SecCoreData.StackSize = PeiStackSize;\r
	194	\r
	195	//\r
	196	// Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
	197	//\r
	198	InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
7cd8a575 MH	199	\r
	200	//\r
	201	// Should not come here.\r
	202	//\r
	203	UNREACHABLE ();\r
1921695e MK	204	}\r
	205	\r
	206	/**\r
	207	Caller provided function to be invoked at the end of InitializeDebugAgent().\r
	208	\r
	209	Entry point to the C language phase of SEC. After the SEC assembly\r
	210	code has initialized some temporary memory and set up the stack,\r
	211	the control is transferred to this function.\r
	212	\r
	213	@param[in] Context The first input parameter of InitializeDebugAgent().\r
	214	\r
	215	**/\r
	216	VOID\r
61257251	217	NORETURN\r
1921695e MK	218	EFIAPI\r
	219	SecStartupPhase2(\r
	220	IN VOID *Context\r
	221	)\r
	222	{\r
	223	EFI_SEC_PEI_HAND_OFF *SecCoreData;\r
	224	EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
	225	UINT32 Index;\r
	226	EFI_PEI_PPI_DESCRIPTOR *AllSecPpiList;\r
	227	EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;\r
	228	\r
373c2c5b	229	PeiCoreEntryPoint = NULL;\r
1921695e	230	SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;\r
373c2c5b	231	\r
1b261a70 CC	232	//\r
	233	// Perform platform specific initialization before entering PeiCore.\r
	234	//\r
	235	PpiList = SecPlatformMain (SecCoreData);\r
1921695e MK	236	//\r
	237	// Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug\r
	238	// is enabled.\r
	239	//\r
373c2c5b CC	240	if (PpiList != NULL) {\r
	241	for (Index = 0;\r
	242	(PpiList[Index].Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;\r
	243	Index++) {\r
08283b96 CC	244	if (CompareGuid (PpiList[Index].Guid, &gEfiPeiCoreFvLocationPpiGuid) &&\r
	245	(((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocation != 0)\r
	246	) {\r
	247	//\r
	248	// In this case, SecCore is in BFV but PeiCore is in another FV reported by PPI.\r
	249	//\r
	250	FindAndReportEntryPoints (\r
	251	(EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
	252	(EFI_FIRMWARE_VOLUME_HEADER ) ((EFI_PEI_CORE_FV_LOCATION_PPI ) PpiList[Index].Ppi)->PeiCoreFvLocation,\r
	253	&PeiCoreEntryPoint\r
	254	);\r
373c2c5b CC	255	if (PeiCoreEntryPoint != NULL) {\r
	256	break;\r
	257	} else {\r
	258	//\r
	259	// PeiCore not found\r
	260	//\r
	261	CpuDeadLoop ();\r
	262	}\r
	263	}\r
	264	}\r
	265	}\r
	266	//\r
	267	// If EFI_PEI_CORE_FV_LOCATION_PPI not found, try to locate PeiCore from BFV.\r
	268	//\r
	269	if (PeiCoreEntryPoint == NULL) {\r
08283b96 CC	270	//\r
	271	// Both SecCore and PeiCore are in BFV.\r
	272	//\r
	273	FindAndReportEntryPoints (\r
	274	(EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
	275	(EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
	276	&PeiCoreEntryPoint\r
	277	);\r
373c2c5b CC	278	if (PeiCoreEntryPoint == NULL) {\r
	279	CpuDeadLoop ();\r
	280	}\r
1921695e MK	281	}\r
1921695e MK	282	\r
1921695e	283	if (PpiList != NULL) {\r
47f167f4 ED	284	AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRamBase;\r
47f167f4 ED	285	\r
1921695e MK	286	//\r
	287	// Remove the terminal flag from the terminal PPI\r
	288	//\r
	289	CopyMem (AllSecPpiList, mPeiSecPlatformInformationPpi, sizeof (mPeiSecPlatformInformationPpi));\r
	290	Index = sizeof (mPeiSecPlatformInformationPpi) / sizeof (EFI_PEI_PPI_DESCRIPTOR) - 1;\r
	291	AllSecPpiList[Index].Flags = AllSecPpiList[Index].Flags & (~EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
	292	\r
	293	//\r
	294	// Append the platform additional PPI list\r
	295	//\r
	296	Index += 1;\r
	297	while (((PpiList->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)) {\r
	298	CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
	299	Index++;\r
	300	PpiList++;\r
	301	}\r
	302	\r
	303	//\r
	304	// Add the terminal PPI\r
	305	//\r
	306	CopyMem (&AllSecPpiList[Index ++], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
	307	\r
	308	//\r
	309	// Set PpiList to the total PPI\r
	310	//\r
	311	PpiList = AllSecPpiList;\r
	312	\r
	313	//\r
	314	// Adjust PEI TEMP RAM Range.\r
	315	//\r
	316	ASSERT (SecCoreData->PeiTemporaryRamSize > Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
	317	SecCoreData->PeiTemporaryRamBase = (VOID )((UINTN) SecCoreData->PeiTemporaryRamBase + Index sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
	318	SecCoreData->PeiTemporaryRamSize = SecCoreData->PeiTemporaryRamSize - Index * sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
9e9ca210 SZ	319	//\r
	320	// Adjust the Base and Size to be 8-byte aligned as HOB which has 8byte aligned requirement\r
	321	// will be built based on them in PEI phase.\r
	322	//\r
	323	SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);\r
59d3fad3	324	SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;\r
1921695e MK	325	} else {\r
	326	//\r
	327	// No addition PPI, PpiList directly point to the common PPI list.\r
	328	//\r
	329	PpiList = &mPeiSecPlatformInformationPpi[0];\r
	330	}\r
	331	\r
af34c106 JF	332	DEBUG ((\r
af34c106 JF	333	DEBUG_INFO,\r
ec16deea	334	"%a() Stack Base: 0x%p, Stack Size: 0x%x\n",\r
af34c106 JF	335	__FUNCTION__,\r
af34c106 JF	336	SecCoreData->StackBase,\r
ec16deea	337	(UINT32) SecCoreData->StackSize\r
af34c106 JF	338	));\r
af34c106 JF	339	\r
1921695e MK	340	//\r
	341	// Report Status Code to indicate transferring to PEI core\r
	342	//\r
	343	REPORT_STATUS_CODE (\r
	344	EFI_PROGRESS_CODE,\r
	345	EFI_SOFTWARE_SEC \| EFI_SW_SEC_PC_HANDOFF_TO_NEXT\r
	346	);\r
	347	\r
	348	//\r
	349	// Transfer the control to the PEI core\r
	350	//\r
	351	ASSERT (PeiCoreEntryPoint != NULL);\r
	352	(*PeiCoreEntryPoint) (SecCoreData, PpiList);\r
	353	\r
	354	//\r
	355	// Should not come here.\r
	356	//\r
61257251	357	UNREACHABLE ();\r
1921695e MK	358	}\r
	359	\r
	360	/**\r
	361	TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked\r
	362	by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.\r
	363	\r
	364	@retval EFI_SUCCESS Use of Temporary RAM was disabled.\r
	365	@retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.\r
	366	\r
	367	**/\r
	368	EFI_STATUS\r
	369	EFIAPI\r
	370	SecTemporaryRamDone (\r
	371	VOID\r
	372	)\r
	373	{\r
	374	BOOLEAN State;\r
	375	\r
8a5b8cef JF	376	//\r
	377	// Republish Sec Platform Information(2) PPI\r
	378	//\r
	379	RepublishSecPlatformInformationPpi ();\r
	380	\r
1921695e MK	381	//\r
	382	// Migrate DebugAgentContext.\r
	383	//\r
	384	InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
	385	\r
	386	//\r
	387	// Disable interrupts and save current interrupt state\r
	388	//\r
	389	State = SaveAndDisableInterrupts();\r
	390	\r
	391	//\r
	392	// Disable Temporary RAM after Stack and Heap have been migrated at this point.\r
	393	//\r
	394	SecPlatformDisableTemporaryMemory ();\r
	395	\r
	396	//\r
	397	// Restore original interrupt state\r
	398	//\r
	399	SetInterruptState (State);\r
	400	\r
	401	return EFI_SUCCESS;\r
	402	}\r