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UefiPayloadPkg: Replace MEMROY_ENTRY by MEMORY_ENTRY
[mirror_edk2.git] / UefiPayloadPkg / Library / PciHostBridgeLib / PciHostBridge.h
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1/** @file\r
2 Header file of PciHostBridgeLib.\r
3\r
4 Copyright (C) 2016, Red Hat, Inc.\r
99de2e7e 5 Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r
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6\r
7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
8\r
9**/\r
10\r
11#ifndef _PCI_HOST_BRIDGE_H\r
12#define _PCI_HOST_BRIDGE_H\r
13\r
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14#include <UniversalPayload/PciRootBridges.h>\r
15\r
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16typedef struct {\r
17 ACPI_HID_DEVICE_PATH AcpiDevicePath;\r
18 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
19} CB_PCI_ROOT_BRIDGE_DEVICE_PATH;\r
20\r
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21/**\r
22 Scan for all root bridges in platform.\r
23\r
24 @param[out] NumberOfRootBridges Number of root bridges detected\r
25\r
26 @retval Pointer to the allocated PCI_ROOT_BRIDGE structure array.\r
27**/\r
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28PCI_ROOT_BRIDGE *\r
29ScanForRootBridges (\r
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30 OUT UINTN *NumberOfRootBridges\r
31);\r
32\r
33/**\r
34 Scan for all root bridges from Universal Payload PciRootBridgeInfoHob\r
35\r
36 @param[in] PciRootBridgeInfo Pointer of Universal Payload PCI Root Bridge Info Hob\r
37 @param[out] NumberOfRootBridges Number of root bridges detected\r
38\r
39 @retval Pointer to the allocated PCI_ROOT_BRIDGE structure array.\r
40\r
41**/\r
42PCI_ROOT_BRIDGE *\r
43RetrieveRootBridgeInfoFromHob (\r
44 IN UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo,\r
45 OUT UINTN *NumberOfRootBridges\r
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46);\r
47\r
48/**\r
49 Initialize a PCI_ROOT_BRIDGE structure.\r
50\r
51 @param[in] Supports Supported attributes.\r
52\r
53 @param[in] Attributes Initial attributes.\r
54\r
55 @param[in] AllocAttributes Allocation attributes.\r
56\r
57 @param[in] RootBusNumber The bus number to store in RootBus.\r
58\r
59 @param[in] MaxSubBusNumber The inclusive maximum bus number that can be\r
60 assigned to any subordinate bus found behind any\r
61 PCI bridge hanging off this root bus.\r
62\r
63 The caller is responsible for ensuring that\r
64 RootBusNumber <= MaxSubBusNumber. If\r
65 RootBusNumber equals MaxSubBusNumber, then the\r
66 root bus has no room for subordinate buses.\r
67\r
68 @param[in] Io IO aperture.\r
69\r
70 @param[in] Mem MMIO aperture.\r
71\r
72 @param[in] MemAbove4G MMIO aperture above 4G.\r
73\r
74 @param[in] PMem Prefetchable MMIO aperture.\r
75\r
76 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.\r
77\r
78 @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the\r
79 caller) that should be filled in by this\r
80 function.\r
81\r
82 @retval EFI_SUCCESS Initialization successful. A device path\r
83 consisting of an ACPI device path node, with\r
84 UID = RootBusNumber, has been allocated and\r
85 linked into RootBus.\r
86\r
87 @retval EFI_OUT_OF_RESOURCES Memory allocation failed.\r
88**/\r
89EFI_STATUS\r
90InitRootBridge (\r
91 IN UINT64 Supports,\r
92 IN UINT64 Attributes,\r
93 IN UINT64 AllocAttributes,\r
94 IN UINT8 RootBusNumber,\r
95 IN UINT8 MaxSubBusNumber,\r
96 IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
97 IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
98 IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
99 IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
100 IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,\r
101 OUT PCI_ROOT_BRIDGE *RootBus\r
102);\r
103\r
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104/**\r
105 Initialize DevicePath for a PCI_ROOT_BRIDGE.\r
106 @param[in] HID HID for device path\r
107 @param[in] UID UID for device path\r
108\r
109 @retval A pointer to the new created device patch.\r
110**/\r
111EFI_DEVICE_PATH_PROTOCOL *\r
112CreateRootBridgeDevicePath (\r
113 IN UINT32 HID,\r
114 IN UINT32 UID\r
115);\r
04af8bf2 116#endif\r