projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 04af8bf2 DG |
1 | /** @file\r |
| 2 | Head file for BDS Platform specific code\r | |
| 3 | \r | |
| 4 | Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r | |
| 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
| 6 | **/\r | |
| 7 | \r | |
| 6ef57974 GD |
8 | #ifndef PLATFORM_CONSOLE_H_\r |
| 9 | #define PLATFORM_CONSOLE_H_\r | |
| 04af8bf2 DG |
10 | \r |
| 11 | #include <PiDxe.h>\r | |
| 12 | #include <IndustryStandard/Pci.h>\r | |
| 13 | #include <Library/DebugLib.h>\r | |
| 14 | #include <Library/BaseMemoryLib.h>\r | |
| 15 | #include <Library/UefiBootServicesTableLib.h>\r | |
| 16 | #include <Library/MemoryAllocationLib.h>\r | |
| 17 | #include <Library/BaseLib.h>\r | |
| 18 | #include <Library/PcdLib.h>\r | |
| 19 | #include <Library/UefiLib.h>\r | |
| 20 | #include <Library/DevicePathLib.h>\r | |
| 21 | #include <Protocol/PciIo.h>\r | |
| 22 | \r | |
| 23 | #define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)\r | |
| 24 | #define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)\r | |
| 25 | \r | |
| 26 | //\r | |
| 27 | // Type definitions\r | |
| 28 | //\r | |
| 29 | \r | |
| 30 | //\r | |
| 31 | // Platform Root Bridge\r | |
| 32 | //\r | |
| 33 | typedef struct {\r | |
| 34 | ACPI_HID_DEVICE_PATH PciRootBridge;\r | |
| 35 | EFI_DEVICE_PATH_PROTOCOL End;\r | |
| 36 | } PLATFORM_ROOT_BRIDGE_DEVICE_PATH;\r | |
| 37 | \r | |
| 38 | typedef\r | |
| 39 | EFI_STATUS\r | |
| 40 | (EFIAPI *PROTOCOL_INSTANCE_CALLBACK)(\r | |
| 41 | IN EFI_HANDLE Handle,\r | |
| 42 | IN VOID *Instance,\r | |
| 43 | IN VOID *Context\r | |
| 44 | );\r | |
| 45 | \r | |
| 46 | /**\r | |
| 47 | @param[in] Handle - Handle of PCI device instance\r | |
| 48 | @param[in] PciIo - PCI IO protocol instance\r | |
| 49 | @param[in] Pci - PCI Header register block\r | |
| 50 | **/\r | |
| 51 | typedef\r | |
| 52 | EFI_STATUS\r | |
| 53 | (EFIAPI *VISIT_PCI_INSTANCE_CALLBACK)(\r | |
| 54 | IN EFI_HANDLE Handle,\r | |
| 55 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r | |
| 56 | IN PCI_TYPE00 *Pci\r | |
| 57 | );\r | |
| 58 | \r | |
| 59 | /**\r | |
| 60 | Platform console init. Include the platform firmware vendor, revision\r | |
| 61 | and so crc check.\r | |
| 62 | \r | |
| 63 | **/\r | |
| 64 | VOID\r | |
| 65 | EFIAPI\r | |
| 66 | PlatformConsoleInit (\r | |
| 67 | VOID\r | |
| 68 | );\r | |
| 69 | \r | |
| 70 | #endif\r |