[mirror_edk2.git] / Vlv2DeviceRefCodePkg / AcpiTablesPCAT / Lpit / Lpit.aslc

/*++\r
\r
Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
\r
\r
--*/\r
\r
//\r
// Include files\r
//\r
\r
#include <PiDxe.h>\r
#include <IndustryStandard/Acpi50.h>\r
\r
\r
\r
//\r
// LPIT Definitions\r
//\r
\r
#define EFI_ACPI_LOW_POWER_IDLE_TABLE_REVISION 0x1\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
\r
typedef union _EFI_ACPI_LPI_STATE_FLAGS {\r
  struct {\r
    UINT32 Disabled           :1;\r
    UINT32 CounterUnavailable :1;\r
    UINT32 Reserved           :30;\r
  };\r
  UINT32 AsUlong;\r
} EFI_ACPI_LPI_STATE_FLAGS, *PEFI_ACPI_LPI_STATE_FLAGS;\r
\r
// Only Mwait LPI here:\r
\r
typedef struct _EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR {\r
  UINT32 Type;        // offset: 0\r
  UINT32 Length;      // offset: 4\r
  UINT16 UniqueId;    // offset: 8\r
  UINT8 Reserved[2];  // offset: 9\r
  EFI_ACPI_LPI_STATE_FLAGS Flags; // offset: 12\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EntryTrigger; // offset: 16\r
  UINT32 Residency;   // offset: 28\r
  UINT32 Latency;     // offset: 32\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResidencyCounter; // offset: 36\r
  UINT64 ResidencyCounterFrequency; //offset: 48\r
} EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR;\r
\r
\r
//\r
// Defines for LPIT table, some are VLV specific\r
//\r
\r
\r
// signature "LPIT"\r
#define EFI_ACPI_LOW_POWER_IDLE_TABLE_SIGNATURE  0x5449504c\r
\r
#define EFI_ACPI_OEM_LPIT_REVISION                      0x00000000\r
\r
#define EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE    0x0\r
#define EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG  0x0\r
#define EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K   0x8000    // 32768\r
\r
//\r
// LPI state count (4 on VLV: S0ir, S0i1, S0i2, S0i3)\r
//\r
\r
#define EFI_ACPI_VLV_LPI_STATE_COUNT          0x4\r
\r
//\r
// LPI TRIGGER (HW C7 on VLV),\r
// TOFIX!!!\r
//\r
#define EFI_ACPI_VLV_LPI_TRIGGER {0x7F,0x1,0x2,0x0,0x64}\r
\r
//\r
// LPI residency counter (MMIO)\r
//\r
#define  EFI_ACPI_VLV_LPI_RES_COUNTER0   {0x0,32,0x0,0x03,0xFED03080}\r
#define  EFI_ACPI_VLV_LPI_RES_COUNTER1   {0x0,32,0x0,0x03,0xFED03084}\r
#define  EFI_ACPI_VLV_LPI_RES_COUNTER2   {0x0,32,0x0,0x03,0xFED03088}\r
#define  EFI_ACPI_VLV_LPI_RES_COUNTER3   {0x0,32,0x0,0x03,0xFED0308C}\r
\r
//\r
// LPI break-even residency in us - all match S0i3 residency\r
// Residency estimate: Latency x 3\r
//\r
#define  EFI_ACPI_VLV_LPI_MIN_RES0   15000\r
#define  EFI_ACPI_VLV_LPI_MIN_RES1   15000\r
#define  EFI_ACPI_VLV_LPI_MIN_RES2   15000\r
#define  EFI_ACPI_VLV_LPI_MIN_RES3   15000\r
\r
//\r
// LPI latency in us - all match S0i3 latency\r
//\r
#define  EFI_ACPI_VLV_LPI_LATENCY0   5000\r
#define  EFI_ACPI_VLV_LPI_LATENCY1   5000\r
#define  EFI_ACPI_VLV_LPI_LATENCY2   5000\r
#define  EFI_ACPI_VLV_LPI_LATENCY3   5000\r
\r
\r
//\r
// LPI ID\r
//\r
#define  EFI_ACPI_VLV_LPI_UNIQUE_ID0   0\r
#define  EFI_ACPI_VLV_LPI_UNIQUE_ID1   1\r
#define  EFI_ACPI_VLV_LPI_UNIQUE_ID2   2\r
#define  EFI_ACPI_VLV_LPI_UNIQUE_ID3   3\r
\r
//\r
//  LPI ACPI table header\r
//\r
\r
\r
typedef struct _EFI_ACPI_LOW_POWER_IDLE_TABLE {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR     LpiStates[EFI_ACPI_VLV_LPI_STATE_COUNT];\r
} EFI_ACPI_LOW_POWER_IDLE_TABLE;\r
\r
#pragma pack()\r
\r
EFI_ACPI_LOW_POWER_IDLE_TABLE Lpit = {\r
\r
  //\r
  // Header\r
  //\r
\r
\r
  EFI_ACPI_LOW_POWER_IDLE_TABLE_SIGNATURE,\r
  sizeof (EFI_ACPI_LOW_POWER_IDLE_TABLE),\r
  EFI_ACPI_LOW_POWER_IDLE_TABLE_REVISION ,\r
\r
  //\r
  // Checksum will be updated at runtime\r
  //\r
  0x00,\r
\r
  //\r
  // It is expected that these values will be updated at runtime\r
  //\r
  ' ', ' ', ' ', ' ', ' ', ' ',\r
\r
  0,\r
  EFI_ACPI_OEM_LPIT_REVISION,\r
  0,\r
  0,\r
\r
\r
\r
  //\r
  // Descriptor\r
  //\r
  {\r
    {\r
      EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE,\r
      sizeof(EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR),\r
      EFI_ACPI_VLV_LPI_UNIQUE_ID0,\r
      {0,0},\r
      {EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG},   // Flags\r
      EFI_ACPI_VLV_LPI_TRIGGER,  //EntryTrigger\r
      EFI_ACPI_VLV_LPI_MIN_RES0, //Residency\r
      EFI_ACPI_VLV_LPI_LATENCY0, //Latency\r
      EFI_ACPI_VLV_LPI_RES_COUNTER0, //ResidencyCounter\r
      EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K //Residency counter frequency\r
    },\r
    {\r
      EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE,\r
      sizeof(EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR),\r
      EFI_ACPI_VLV_LPI_UNIQUE_ID1,\r
      {0,0},\r
      {EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG},   // Flags\r
      EFI_ACPI_VLV_LPI_TRIGGER,  //EntryTrigger\r
      EFI_ACPI_VLV_LPI_MIN_RES1, //Residency\r
      EFI_ACPI_VLV_LPI_LATENCY1, //Latency\r
      EFI_ACPI_VLV_LPI_RES_COUNTER1, //ResidencyCounter\r
      EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K //Residency counter frequency\r
    },\r
    {\r
      EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE,\r
      sizeof(EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR),\r
      EFI_ACPI_VLV_LPI_UNIQUE_ID2,\r
      {0,0},\r
      {EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG},   // Flags\r
      EFI_ACPI_VLV_LPI_TRIGGER,  //EntryTrigger\r
      EFI_ACPI_VLV_LPI_MIN_RES2, //Residency\r
      EFI_ACPI_VLV_LPI_LATENCY2, //Latency\r
      EFI_ACPI_VLV_LPI_RES_COUNTER2, //ResidencyCounter\r
      EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K //Residency counter frequency\r
    },\r
    {\r
      EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE,\r
      sizeof(EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR),\r
      EFI_ACPI_VLV_LPI_UNIQUE_ID3,\r
      {0,0},\r
      {EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG},   // Flags\r
      EFI_ACPI_VLV_LPI_TRIGGER,  //EntryTrigger\r
      EFI_ACPI_VLV_LPI_MIN_RES3, //Residency\r
      EFI_ACPI_VLV_LPI_LATENCY3, //Latency\r
      EFI_ACPI_VLV_LPI_RES_COUNTER3, //ResidencyCounter\r
      EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K //Residency counter frequency\r
    }\r
  }\r
\r
};\r
\r
\r
VOID*\r
ReferenceAcpiTable (\r
  VOID\r
  )\r
{\r
  //\r
  // Reference the table being generated to prevent the optimizer from\r
  // removing the data structure from the executable\r
  //\r
  return (VOID*)&Lpit;\r
}\r
Commit	Line	Data
3cbfba02 DW	1	/*++\r
	2	\r
	3	Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
	4	\r
7ede8060	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
3cbfba02 DW	6	\r
	7	\r
	8	\r
	9	--*/\r
	10	\r
	11	//\r
	12	// Include files\r
	13	//\r
	14	\r
	15	#include <PiDxe.h>\r
	16	#include <IndustryStandard/Acpi50.h>\r
	17	\r
	18	\r
	19	\r
	20	//\r
	21	// LPIT Definitions\r
	22	//\r
	23	\r
	24	#define EFI_ACPI_LOW_POWER_IDLE_TABLE_REVISION 0x1\r
	25	\r
	26	//\r
	27	// Ensure proper structure formats\r
	28	//\r
	29	#pragma pack(1)\r
	30	\r
	31	typedef union _EFI_ACPI_LPI_STATE_FLAGS {\r
	32	struct {\r
	33	UINT32 Disabled :1;\r
	34	UINT32 CounterUnavailable :1;\r
	35	UINT32 Reserved :30;\r
	36	};\r
	37	UINT32 AsUlong;\r
	38	} EFI_ACPI_LPI_STATE_FLAGS, *PEFI_ACPI_LPI_STATE_FLAGS;\r
	39	\r
	40	// Only Mwait LPI here:\r
	41	\r
	42	typedef struct _EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR {\r
	43	UINT32 Type; // offset: 0\r
	44	UINT32 Length; // offset: 4\r
	45	UINT16 UniqueId; // offset: 8\r
	46	UINT8 Reserved[2]; // offset: 9\r
	47	EFI_ACPI_LPI_STATE_FLAGS Flags; // offset: 12\r
	48	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EntryTrigger; // offset: 16\r
	49	UINT32 Residency; // offset: 28\r
	50	UINT32 Latency; // offset: 32\r
	51	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResidencyCounter; // offset: 36\r
	52	UINT64 ResidencyCounterFrequency; //offset: 48\r
	53	} EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR;\r
	54	\r
	55	\r
	56	//\r
	57	// Defines for LPIT table, some are VLV specific\r
	58	//\r
	59	\r
	60	\r
	61	// signature "LPIT"\r
	62	#define EFI_ACPI_LOW_POWER_IDLE_TABLE_SIGNATURE 0x5449504c\r
	63	\r
	64	#define EFI_ACPI_OEM_LPIT_REVISION 0x00000000\r
	65	\r
	66	#define EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE 0x0\r
	67	#define EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG 0x0\r
	68	#define EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K 0x8000 // 32768\r
	69	\r
70	//\r
71	// LPI state count (4 on VLV: S0ir, S0i1, S0i2, S0i3)\r
72	//\r
73	\r
74	#define EFI_ACPI_VLV_LPI_STATE_COUNT 0x4\r
75	\r
76	//\r
77	// LPI TRIGGER (HW C7 on VLV),\r
78	// TOFIX!!!\r
79	//\r
80	#define EFI_ACPI_VLV_LPI_TRIGGER {0x7F,0x1,0x2,0x0,0x64}\r
81	\r
82	//\r
83	// LPI residency counter (MMIO)\r
84	//\r
85	#define EFI_ACPI_VLV_LPI_RES_COUNTER0 {0x0,32,0x0,0x03,0xFED03080}\r
86	#define EFI_ACPI_VLV_LPI_RES_COUNTER1 {0x0,32,0x0,0x03,0xFED03084}\r
87	#define EFI_ACPI_VLV_LPI_RES_COUNTER2 {0x0,32,0x0,0x03,0xFED03088}\r
88	#define EFI_ACPI_VLV_LPI_RES_COUNTER3 {0x0,32,0x0,0x03,0xFED0308C}\r
89	\r
90	//\r
91	// LPI break-even residency in us - all match S0i3 residency\r
92	// Residency estimate: Latency x 3\r
93	//\r
94	#define EFI_ACPI_VLV_LPI_MIN_RES0 15000\r
95	#define EFI_ACPI_VLV_LPI_MIN_RES1 15000\r
96	#define EFI_ACPI_VLV_LPI_MIN_RES2 15000\r
97	#define EFI_ACPI_VLV_LPI_MIN_RES3 15000\r
98	\r
99	//\r
100	// LPI latency in us - all match S0i3 latency\r
101	//\r
102	#define EFI_ACPI_VLV_LPI_LATENCY0 5000\r
103	#define EFI_ACPI_VLV_LPI_LATENCY1 5000\r
104	#define EFI_ACPI_VLV_LPI_LATENCY2 5000\r
105	#define EFI_ACPI_VLV_LPI_LATENCY3 5000\r
106	\r
107	\r
108	//\r
109	// LPI ID\r
110	//\r
111	#define EFI_ACPI_VLV_LPI_UNIQUE_ID0 0\r
112	#define EFI_ACPI_VLV_LPI_UNIQUE_ID1 1\r
113	#define EFI_ACPI_VLV_LPI_UNIQUE_ID2 2\r
114	#define EFI_ACPI_VLV_LPI_UNIQUE_ID3 3\r
115	\r
116	//\r
117	// LPI ACPI table header\r
118	//\r
119	\r
120	\r
121	typedef struct _EFI_ACPI_LOW_POWER_IDLE_TABLE {\r
122	EFI_ACPI_DESCRIPTION_HEADER Header;\r
123	EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR LpiStates[EFI_ACPI_VLV_LPI_STATE_COUNT];\r
124	} EFI_ACPI_LOW_POWER_IDLE_TABLE;\r
125	\r
126	#pragma pack()\r
127	\r
128	EFI_ACPI_LOW_POWER_IDLE_TABLE Lpit = {\r
129	\r
130	//\r
131	// Header\r
132	//\r
133	\r
134	\r
135	EFI_ACPI_LOW_POWER_IDLE_TABLE_SIGNATURE,\r
136	sizeof (EFI_ACPI_LOW_POWER_IDLE_TABLE),\r
137	EFI_ACPI_LOW_POWER_IDLE_TABLE_REVISION ,\r
138	\r
139	//\r
140	// Checksum will be updated at runtime\r
141	//\r
142	0x00,\r
143	\r
144	//\r
145	// It is expected that these values will be updated at runtime\r
146	//\r
147	' ', ' ', ' ', ' ', ' ', ' ',\r
148	\r
149	0,\r
150	EFI_ACPI_OEM_LPIT_REVISION,\r
151	0,\r
152	0,\r
153	\r
154	\r
155	\r
156	//\r
157	// Descriptor\r
158	//\r
159	{\r
160	{\r
161	EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE,\r
162	sizeof(EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR),\r
163	EFI_ACPI_VLV_LPI_UNIQUE_ID0,\r
164	{0,0},\r
165	{EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG}, // Flags\r
166	EFI_ACPI_VLV_LPI_TRIGGER, //EntryTrigger\r
167	EFI_ACPI_VLV_LPI_MIN_RES0, //Residency\r
168	EFI_ACPI_VLV_LPI_LATENCY0, //Latency\r
169	EFI_ACPI_VLV_LPI_RES_COUNTER0, //ResidencyCounter\r
170	EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K //Residency counter frequency\r
171	},\r
172	{\r
173	EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE,\r
174	sizeof(EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR),\r
175	EFI_ACPI_VLV_LPI_UNIQUE_ID1,\r
176	{0,0},\r
177	{EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG}, // Flags\r
178	EFI_ACPI_VLV_LPI_TRIGGER, //EntryTrigger\r
179	EFI_ACPI_VLV_LPI_MIN_RES1, //Residency\r
180	EFI_ACPI_VLV_LPI_LATENCY1, //Latency\r
181	EFI_ACPI_VLV_LPI_RES_COUNTER1, //ResidencyCounter\r
182	EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K //Residency counter frequency\r
183	},\r
184	{\r
185	EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE,\r
186	sizeof(EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR),\r
187	EFI_ACPI_VLV_LPI_UNIQUE_ID2,\r
188	{0,0},\r
189	{EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG}, // Flags\r
190	EFI_ACPI_VLV_LPI_TRIGGER, //EntryTrigger\r
191	EFI_ACPI_VLV_LPI_MIN_RES2, //Residency\r
192	EFI_ACPI_VLV_LPI_LATENCY2, //Latency\r
193	EFI_ACPI_VLV_LPI_RES_COUNTER2, //ResidencyCounter\r
194	EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K //Residency counter frequency\r
195	},\r
196	{\r
197	EFI_ACPI_LOW_POWER_IDLE_MWAIT_TYPE,\r
198	sizeof(EFI_ACPI_MWAIT_LPI_STATE_DESCRIPTOR),\r
199	EFI_ACPI_VLV_LPI_UNIQUE_ID3,\r
200	{0,0},\r
201	{EFI_ACPI_LOW_POWER_IDLE_DEFAULT_FLAG}, // Flags\r
202	EFI_ACPI_VLV_LPI_TRIGGER, //EntryTrigger\r
203	EFI_ACPI_VLV_LPI_MIN_RES3, //Residency\r
204	EFI_ACPI_VLV_LPI_LATENCY3, //Latency\r
205	EFI_ACPI_VLV_LPI_RES_COUNTER3, //ResidencyCounter\r
206	EFI_ACPI_LOW_POWER_IDLE_RES_FREQ_8K //Residency counter frequency\r
207	}\r
208	}\r
209	\r
210	};\r
211	\r
212	\r
213	VOID*\r
214	ReferenceAcpiTable (\r
215	VOID\r
216	)\r
217	{\r
218	//\r
219	// Reference the table being generated to prevent the optimizer from\r
220	// removing the data structure from the executable\r
221	//\r
222	return (VOID*)&Lpit;\r
223	}\r