Add patch-able PCD to support binary modification of MRC module.
[mirror_edk2.git] / Vlv2DeviceRefCodePkg / Vlv2DeviceRefCodePkg.dec
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1## @file Vlv2DeviceRefCodePkg.dec\r
2#\r
3# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved\r
4#\r
5# This program and the accompanying materials are licensed and made available under\r
6# the terms and conditions of the BSD License that accompanies this distribution.\r
7# The full text of the license may be found at\r
8# http://opensource.org/licenses/bsd-license.php.\r
9#\r
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12#\r
13#\r
14##\r
15\r
16[Defines]\r
17 DEC_SPECIFICATION = 0x00010005\r
18 PACKAGE_NAME = Vlv2DeviceRefCodePkg\r
19 PACKAGE_GUID = E4FA0DCA-91A3-4957-9344-C10BAA0BFE5F\r
20 PACKAGE_VERSION = 0.1\r
21\r
22[Ppis]\r
23 gVlvPolicyPpiGuid = { 0x7D84B2C2, 0x22A1, 0x4372, {0xB1, 0x2C, 0xEB, 0xB2, 0x32, 0xD3, 0xA6, 0xA3}}\r
24 gVlvMmioPolicyPpiGuid = { 0xE767BF7F, 0x4DB6, 0x5B34, {0x10, 0x11, 0x4F, 0xBE, 0x4C, 0xA7, 0xAF, 0xD2}}\r
25 gPeiSmbusPolicyPpiGuid = { 0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}}\r
26 gSeCfTPMPpiGuid = { 0x10e26df1, 0x8775, 0x4ee1, {0xb5, 0x0a, 0x3a, 0xe8, 0x28, 0x93, 0x70, 0x3a}}\r
27 gPchUsbPolicyPpiGuid = { 0xc02b0573, 0x2b4e, 0x4a31, {0xa3, 0x1a, 0x94, 0x56, 0x7b, 0x50, 0x44, 0x2c}}\r
28 gPchInitPpiGuid = { 0x09ea894a, 0xbe0d, 0x4230, {0xa0, 0x03, 0xed, 0xc6, 0x93, 0xb4, 0x8e, 0x95}}\r
29 gPchPlatformPolicyPpiGuid = { 0x15344673, 0xD365, 0x4BE2, {0x85, 0x13, 0x14, 0x97, 0xCC, 0x07, 0x61, 0x1D}}\r
30 gPeiSpiPpiGuid = { 0xA38C6898, 0x2B5C, 0x4FF6, {0x93, 0x26, 0x2E, 0x63, 0x21, 0x2E, 0x56, 0xC2}}\r
31 gVlvPeiInitPpiGuid = { 0x09ea8911, 0xbe0d, 0x4230, {0xa0, 0x03, 0xed, 0xc6, 0x93, 0xb4, 0x8e, 0x11}}\r
32 gSeCUmaPpiGuid = { 0xcbd86677, 0x362f, 0x4c04, {0x94, 0x59, 0xa7, 0x41, 0x32, 0x6e, 0x05, 0xcf}}\r
33 gPeiSeCPlatformPolicyPpiGuid = { 0x7ae3ceb7, 0x2ee2, 0x48fa, {0xaa, 0x49, 0x35, 0x10, 0xbc, 0x83, 0xca, 0xbf}}\r
34 gPeiHeciPpiGuid = { 0xEE0EA811, 0xFBD9, 0x4777, {0xB9, 0x5A, 0xBA, 0x4F, 0x71, 0x10, 0x1F, 0x74}}\r
35 gPeiSdhcPpiGuid = { 0xf4ef9d7a, 0x98c5, 0x4c1a, {0xb4, 0xd9, 0xd8, 0xd8, 0x72, 0x65, 0xbe, 0x0c}}\r
36 gPeiBlockIoPpiGuid = { 0xbc5fa650, 0xedbb, 0x4d0d, {0xb3, 0xa3, 0xd9, 0x89, 0x07, 0xf8, 0x47, 0xdf}}\r
37 gSeCfTPMPolicyPpiGuid = { 0x4fd1ba49, 0x8f90, 0x471a, {0xa2, 0xc9, 0x17, 0x3c, 0x7a, 0x73, 0x2f, 0xd0}}\r
38 gEfiPeiReadOnlyVariable2PpiGuid = { 0x2ab86ef5, 0xecb5, 0x4134, {0xb5, 0x56, 0x38, 0x54, 0xca, 0x1f, 0xe1, 0xb4}}\r
39 gPchPeiInitPpiGuid = { 0xACB93B08, 0x5CDC, 0x4A8F, {0x93, 0xD4, 0x6, 0xE3, 0x42, 0xDF, 0x18, 0x2E}}\r
40\r
41[Protocols]\r
42 gEfiGlobalNvsAreaProtocolGuid = { 0x074e1e48, 0x8132, 0x47a1, {0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66, 0xdc}}\r
43 gPpmPlatformPolicyProtocolGuid = { 0xddabfeac, 0xef63, 0x452c, {0x8f, 0x39, 0xed, 0x7f, 0xae, 0xd8, 0x26, 0x5e}}\r
44 gEfiSpiProtocolGuid = { 0x1156efc6, 0xea32, 0x4396, {0xb5, 0xd5, 0x26, 0x93, 0x2e, 0x83, 0xc3, 0x13}}\r
45 gMemInfoProtocolGuid = { 0x6f20f7c8, 0xe5ef, 0x4f21, {0x8d, 0x19, 0xed, 0xc5, 0xf0, 0xc4, 0x96, 0xae}}\r
46 gEfiSdHostIoProtocolGuid = { 0xb63f8ec7, 0xa9c9, 0x4472, {0xa4, 0xc0, 0x4d, 0x8b, 0xf3, 0x65, 0xcc, 0x51}}\r
47 gEfiSpiProtocolGuid = { 0x1156efc6, 0xea32, 0x4396, {0xb5, 0xd5, 0x26, 0x93, 0x2e, 0x83, 0xc3, 0x13}}\r
48 gEfiSmmSpiProtocolGuid = { 0xD9072C35, 0xEB8F, 0x43AD, {0xA2, 0x20, 0x34, 0xD4, 0x0E, 0x2A, 0x82, 0x85}}\r
49 gEfiSmmIchnDispatchExProtocolGuid = { 0x3920405B, 0xC897, 0x44DA, {0x88, 0xF3, 0x4C, 0x49, 0x8A, 0x6F, 0xF7, 0x36}}\r
50 gEfiPchS3SupportProtocolGuid = { 0xE287D20B, 0xD897, 0x4E1E, {0xA5, 0xD9, 0x97, 0x77, 0x63, 0x93, 0x6A, 0x04}}\r
51 gPchResetProtocolGuid = { 0xDB63592C, 0xB8CC, 0x44C8, {0x91, 0x8C, 0x51, 0xF5, 0x34, 0x59, 0x8A, 0x5A}}\r
52 gPchResetCallbackProtocolGuid = { 0x3A3300AB, 0xC929, 0x487D, {0xAB, 0x34, 0x15, 0x9B, 0xC1, 0x35, 0x62, 0xC0}}\r
53 gDxePchPlatformPolicyProtocolGuid = { 0x4b0165a9, 0x61d6, 0x4e23, {0xa0, 0xb5, 0x3e, 0xc7, 0x9c, 0x2e, 0x30, 0xd5}}\r
54 gEfiPchInfoProtocolGuid = { 0xD31F0400, 0x7D16, 0x4316, {0xBF, 0x88, 0x60, 0x65, 0x88, 0x3B, 0x40, 0x2B}}\r
55 gEfiPchExtendedResetProtocolGuid = { 0xF0BBFCA0, 0x684E, 0x48B3, {0xBA, 0xE2, 0x6C, 0x84, 0xB8, 0x9E, 0x53, 0x39}}\r
56 gEfiActiveBiosProtocolGuid = { 0xEBBE2D1B, 0x1647, 0x4BDA, {0xAB, 0x9A, 0x78, 0x63, 0xE3, 0x96, 0xD4, 0x1A}}\r
57 gDxeIchPlatformPolicyProtocolGuid = { 0xf617b358, 0x12cf, 0x414a, {0xa0, 0x69, 0x60, 0x67, 0x7b, 0xda, 0x13, 0xb3}}\r
58 gEfiIchInfoProtocolGuid = { 0xd31f0400, 0x7d16, 0x4316, {0xbf, 0x88, 0x60, 0x65, 0x88, 0x3b, 0x40, 0x2b}}\r
59 gEfiSmmIoTrapDispatchProtocolGuid = { 0x58dc368d, 0x7bfa, 0x4e77, {0xab, 0xbc, 0x0e, 0x29, 0x41, 0x8d, 0xf9, 0x30}}\r
60 gEfiSmmSmbusProtocolGuid = { 0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}}\r
61 gDxeVlvPlatformPolicyGuid = { 0x5bab88ba, 0xe0e2, 0x4674, {0xb6, 0xad, 0xb8, 0x12, 0xf6, 0x88, 0x1c, 0xd6}}\r
62 gIgdOpRegionProtocolGuid = { 0xcdc5dddf, 0xe79d, 0x41ec, {0xa9, 0xb0, 0x65, 0x65, 0x49, 0x0d, 0xb9, 0xd3}}\r
63 gEfiHeciProtocolGuid = { 0xcfb33810, 0x6e87, 0x4284, {0xb2, 0x03, 0xa6, 0x6a, 0xbe, 0x07, 0xf6, 0xe8}}\r
64 gPlatformSeCHookProtocolGuid = { 0xbc52476e, 0xf67e, 0x4301, {0xb2, 0x62, 0x36, 0x9c, 0x48, 0x78, 0xaa, 0xc2}}\r
65 gEfiSeCRcInfoProtocolGuid = { 0x11fbfdfb, 0x10d2, 0x43e6, {0xb5, 0xb1, 0xb4, 0x38, 0x6e, 0xdc, 0xcb, 0x9a}}\r
66 gEfiTdtProtocolGuid = { 0x0bf70067, 0xd53b, 0x42df, {0xb7, 0x70, 0xe9, 0x2c, 0x91, 0xc6, 0x14, 0x11}}\r
67 gDxePlatformSeCPolicyGuid = { 0xf8bff014, 0x18fb, 0x4ef9, {0xb1, 0x0c, 0xae, 0x22, 0x73, 0x8d, 0xbe, 0xed}}\r
68 gLpssDummyProtocolGuid = { 0xaf4cc162, 0xd41c, 0x455a, {0xab, 0x45, 0x6d, 0xbc, 0xc1, 0xcd, 0x32, 0xf3}}\r
69 gEfiEmmcCardInfoProtocolGuid = { 0x1ebe5ab9, 0x2129, 0x49e7, {0x84, 0xd7, 0xee, 0xb9, 0xfc, 0xe5, 0xde, 0xdd}}\r
70 gEfiTdtOperationProtocolGuid = {0xfd301ba4, 0x5e62, 0x4679,{ 0xa0, 0x6f, 0xe0, 0x9a, 0xab, 0xdd, 0x2a, 0x91}}\r
71 gEfiConfigFileNameGuid = { 0x98B8D59B, 0xE8BA, 0x48EE, { 0x98, 0xDD, 0xC2, 0x95, 0x39, 0x2F, 0x1E, 0xDB }}\r
72 gEfiDFUResultGuid = { 0x14a7c46f, 0xbc02, 0x4047, { 0x9f, 0x18, 0xa5, 0xd7, 0x25, 0xd8, 0xbd, 0x19 }}\r
73\r
74[Guids]\r
75 gEfiCPTokenSpaceGuid = { 0x918211ce, 0xa1d2, 0x43a0, {0xa0, 0x4e, 0x75, 0xb5, 0xbf, 0x44, 0x50, 0x0E}}\r
76 gEfiSmbusArpMapGuid = { 0x707BE83E, 0x0BF6, 0x40A5, {0xBE, 0x64, 0x34, 0xC0, 0x3A, 0xA0, 0xB8, 0xE2}}\r
77 gEfiMemoryConfigDataGuid = { 0x80dbd530, 0xb74c, 0x4f11, {0x8c, 0x03, 0x41, 0x86, 0x65, 0x53, 0x28, 0x31}}\r
78 gEfiVLVTokenSpaceGuid = { 0xca452c68, 0xdf0c, 0x45c9, {0x82, 0xfb, 0xea, 0xe4, 0x2b, 0x31, 0x29, 0x46}}\r
79 gSataControllerDriverGuid = { 0xbb929da9, 0x68f7, 0x4035, {0xb2, 0x2c, 0xa3, 0xbb, 0x3f, 0x23, 0xda, 0x55}}\r
80 gDxePchPolicyUpdateProtocolGuid = { 0x1a819e49, 0xd8ee, 0x48cb, {0x9a, 0x9c, 0x0a, 0xa0, 0xd2, 0x81, 0x0a, 0x38}}\r
81 gPowerManagementAcpiTableStorageGuid = { 0x161be597, 0xe9c5, 0x49db, {0xae, 0x50, 0xc4, 0x62, 0xab, 0x54, 0xee, 0xda}}\r
82 gEfiSetupVariableGuid = { 0xec87d643, 0xeba4, 0x4bb5, {0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0x0d, 0xa9}}\r
83 gBmpImageGuid = { 0x878AC2CC, 0x5343, 0x46F2, {0xB5, 0x63, 0x51, 0xF8, 0x9D, 0xAF, 0x56, 0xBA}}\r
84 gPchInitVariableGuid = { 0xe6c2f70a, 0xb604, 0x4877, {0x85, 0xba, 0xde, 0xec, 0x89, 0xe1, 0x17, 0xeb}}\r
85 gEfiMemoryConfigDataGuid = { 0x80dbd530, 0xb74c, 0x4f11, {0x8c, 0x03, 0x41, 0x86, 0x65, 0x53, 0x28, 0x31}}\r
86 gVlvRefCodePkgTokenSpaceGuid = { 0x85768E4A, 0x6CDC, 0x444E, {0x93, 0xDF, 0x93, 0x66, 0x85, 0xB5, 0xDF, 0xCC}}\r
87 gSeCPlatformReadyToBootGuid = { 0x03fdf171, 0x1d67, 0x4ace, {0xa9, 0x04, 0x3e, 0x36, 0xd3, 0x38, 0xfa, 0x74}}\r
88 gAmtReadyToBootGuid = { 0x40b09b5a, 0xf0ef, 0x4627, {0x93, 0xd5, 0x27, 0xf0, 0x4b, 0x75, 0x4d, 0x05}}\r
89 #\r
90 # According to UEFI 2.3.1 Errata C, 3.2 Globally Defined Variables.\r
91 # To prevent name collisions with possible future globally defined variables,\r
92 # other internal firmware data variables that are not defined in Table.10 must be saved with a unique VendorGuid other than EFI_GLOBAL_VARIABLE.\r
93 #\r
94 gEfiVlv2VariableGuid = { 0x10ba6bbe, 0xa97e, 0x41c3, {0x9a, 0x07, 0x60, 0x7a, 0xd9, 0xbd, 0x60, 0xe5}}\r
95\r
96[Includes.common]\r
97 .\r
98 ValleyView2Soc/NorthCluster/Include\r
99 ValleyView2Soc/SouthCluster/Include\r
100 ValleyView2Soc/CPU/Include\r
101 Include\r
102\r
103[PcdsFixedAtBuild]\r
104 gEfiVLVTokenSpaceGuid.PcdTCSmbaIoBaseAddress|0x1040|UINT16|0x10000207\r
105\r
106[PcdsDynamic, PcdsDynamicEx]\r
107 gEfiVLVTokenSpaceGuid.PcdTCSmbaIoBaseAddress|0x1040|UINT16|0x10000207\r
108 gEfiVLVTokenSpaceGuid.PcdEmmcManufacturerId|0|UINT8|0x10000208\r
109 gEfiVLVTokenSpaceGuid.PcdProductSerialNumber|0|UINT32|0x10000209\r
110 gEfiVLVTokenSpaceGuid.PcdMeasuredBootEnable|TRUE|BOOLEAN|0x1000020A\r
111 gEfiVLVTokenSpaceGuid.PcdFTPMErrorOccur|FALSE|BOOLEAN|0x1000020B\r
112 gEfiVLVTokenSpaceGuid.PcdFTPMErrorSkip|FALSE|BOOLEAN|0x1000020C\r
113 gEfiVLVTokenSpaceGuid.PcdFTPMCommand|0|UINT32|0x1000020D\r
114 gEfiVLVTokenSpaceGuid.PcdFTPMResponse|0|UINT32|0x1000020E\r
115 gEfiVLVTokenSpaceGuid.PcdFTPMNotRespond|FALSE|BOOLEAN|0x1000020F\r
116 gEfiVLVTokenSpaceGuid.PcdFTPMStatus|0|UINT32|0x10000210\r
117\r
118[PcdsFeatureFlag]\r
119 gVlvRefCodePkgTokenSpaceGuid.PcdCeAtaSupport|FALSE|BOOLEAN|0x12\r
120 gVlvRefCodePkgTokenSpaceGuid.PcdMmcSdMultiBlockSupport|TRUE|BOOLEAN|0x13\r
121\r
9d6cdba3
DW
122[PcdsPatchableInModule]\r
123\r
124 ## Memory Down or DIMM slot.<BR><BR>\r
125 # 0 - DIMM<BR>\r
126 # 1 - Memory Down<BR>\r
127 # @Prompt Enable Memory Down\r
128 # @ValidList 0x80000001 | 0, 1\r
129 gVlvRefCodePkgTokenSpaceGuid.PcdEnableMemoryDown|1|UINT8|0x20000000\r
130 \r
131 ## Memory Parameter Patchable.<BR><BR>\r
132 # 0 - Fixed Parameter for MinnowBoard Max<BR>\r
133 # 1 - Patchable Parameter for Customization<BR>\r
134 # @Prompt Memory Parameter Patchable.\r
135 # @ValidList 0x80000001 | 0, 1 \r
136 gVlvRefCodePkgTokenSpaceGuid.PcdMemoryParameterPatchable|FALSE|BOOLEAN|0x20000010\r
137 \r
138 ## The speed of DRAM.<BR><BR>\r
139 # 0 - 800 MHz<BR>\r
140 # 1 - 1066 MHz<BR>\r
141 # 2 - 1333 MHz<BR>\r
142 # 3 - 1600 MHz<BR>\r
143 # @Prompt DRAM Speed\r
144 # @ValidList 0x80000001 | 0, 1, 2, 3\r
145 gVlvRefCodePkgTokenSpaceGuid.PcdDramSpeed|1|UINT8|0x20000001\r
146\r
147 ## DRAM Type.<BR><BR>\r
148 # 0 - DDR3<BR>\r
149 # 1 - DDR3L<BR>\r
150 # 2 - DDR3U<BR>\r
151 # 3 - DDR3All<BR>\r
152 # 4 - LPDDR2<BR>\r
153 # 5 - LPDDR3<BR>\r
154 # 6 - DDR4<BR>\r
155 # @Prompt DRAM Type\r
156 # @ValidList 0x80000001 | 0, 1, 2, 3, 4, 5, 6\r
157 gVlvRefCodePkgTokenSpaceGuid.PcdDramType|1|UINT8|0x20000002\r
158 \r
159 ## Please populate DIMM slot 0 if only one DIMM is supported.<BR><BR>\r
160 # 0 - Disable<BR>\r
161 # 1 - Enable<BR>\r
162 # @Prompt DIMM 0 Enable \r
163 # @ValidList 0x80000001 | 0, 1\r
164 gVlvRefCodePkgTokenSpaceGuid.PcdEnableDimm0|1|UINT8|0x20000003\r
165\r
166 ## DIMM 1 has to be identical to DIMM 0.<BR><BR>\r
167 # 0 - Disable<BR>\r
168 # 1 - Enable<BR>\r
169 # @Prompt DIMM 1 Enable Type\r
170 # @ValidList 0x80000001 | 0, 1\r
171 gVlvRefCodePkgTokenSpaceGuid.PcdEnableDimm1|0|UINT8|0x20000004\r
172 \r
173 ## DRAM device data width.<BR><BR>\r
174 # 0 - x8<BR>\r
175 # 1 - x16<BR>\r
176 # 2 - x32<BR>\r
177 # @Prompt DIMM_DWIDTH\r
178 # @ValidList 0x80000001 | 0, 1, 2\r
179 gVlvRefCodePkgTokenSpaceGuid.PcdDimmDataWidth|1|UINT8|0x20000005\r
180\r
181 ## DRAM device data density.<BR><BR>\r
182 # 0 - 1 Gbit<BR>\r
183 # 1 - 2 Gbit<BR>\r
184 # 2 - 4 Gbit<BR>\r
185 # 3 - 8 Gbit<BR>\r
186 # @Prompt DIMM_Density\r
187 # @ValidList 0x80000001 | 0, 1, 2, 3\r
188 gVlvRefCodePkgTokenSpaceGuid.PcdDimmDensity|2|UINT8|0x20000006\r
189 \r
190 ## DRAM device data bus width.<BR><BR>\r
191 # 0 - 8 bits<BR>\r
192 # 1 - 16 bits<BR>\r
193 # 2 - 32 bits<BR>\r
194 # 3 - 64 bits<BR>\r
195 # @Prompt DIMM_BusWidth\r
196 # @ValidList 0x80000001 | 0, 1, 2, 3\r
197 gVlvRefCodePkgTokenSpaceGuid.PcdDimmBusWidth|3|UINT8|0x20000007\r
198\r
199 ## Ranks Per DIMM or Sides Per DIMM.<BR><BR>\r
200 # 0 - 1 Rank<BR>\r
201 # 1 - 2 Ranks<BR>\r
202 # @Prompt DIMM_Sides\r
203 # @ValidList 0x80000001 | 0, 1\r
204 gVlvRefCodePkgTokenSpaceGuid.PcdRankPerDimm|0|UINT8|0x20000008\r
205\r
206 ## tCL.<BR><BR>\r
207 # @Prompt tCL\r
208 gVlvRefCodePkgTokenSpaceGuid.PcdTcl|11|UINT8|0x20000009\r
209\r
210 ## tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc.<BR><BR> \r
211 # @Prompt tRP_tRCD \r
212 gVlvRefCodePkgTokenSpaceGuid.PcdTrpTrcd|11|UINT8|0x2000000A\r
213\r
214 ## tWR in DRAM clk.<BR><BR> \r
215 # @Prompt tWR \r
216 gVlvRefCodePkgTokenSpaceGuid.PcdTwr|12|UINT8|0x2000000B\r
217 \r
218 ## tWTR in DRAM clk.<BR><BR> \r
219 # @Prompt tWTR \r
220 gVlvRefCodePkgTokenSpaceGuid.PcdTwtr|6|UINT8|0x2000000C\r
221 \r
222 ## tRRD in DRAM clk.<BR><BR> \r
223 # @Prompt tRRD \r
224 gVlvRefCodePkgTokenSpaceGuid.PcdTrrd|6|UINT8|0x2000000D\r
225 \r
226 ## tRTP in DRAM clk.<BR><BR> \r
227 # @Prompt tRTP \r
228 gVlvRefCodePkgTokenSpaceGuid.PcdTrtp|6|UINT8|0x2000000E\r
229\r
230 ## tFAW in DRAM clk.<BR><BR> \r
231 # @Prompt tFAW \r
232 gVlvRefCodePkgTokenSpaceGuid.PcdTfaw|32|UINT8|0x2000000F\r