[mirror_edk2.git] / Vlv2TbltDevicePkg / Include / Guid / HwWatchdogTimerHob.h

/*++\r
\r
  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>\r
                                                                                   \r\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
                                                                                   \r\r
\r
\r
Module Name:\r
\r
  HwWatchdogTimerHob.h\r
\r
Abstract:\r
\r
  GUID used for Watchdog Timer status in the HOB list.\r
\r
--*/\r
\r
#ifndef _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r
#define _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r
\r
#define EFI_WATCHDOG_TIMER_HOB_GUID \\r
  { 0x226cd3f, 0x69b5, 0x4150, 0xac, 0xbe, 0xbf, 0xbf, 0x18, 0xe3, 0x3, 0xd5 }\r
\r
#define EFI_WATCHDOG_TIMER_DEFINITION_HOB_GUID \\r
  { 0xd29302b0, 0x11ba, 0x4073, 0xa2, 0x27, 0x53, 0x8d, 0x25, 0x42, 0x70, 0x9f }\r
\r
typedef enum {\r
  HWWD_NONE,\r
  HWWD_TIMER_EXPIRED,\r
  HWWD_SPONTANEOUS_REBOOT,\r
  HWWD_FORCED_TIMEOUT\r
} HW_WATCHDOG_TIMEOUT;\r
\r
typedef struct {\r
  HW_WATCHDOG_TIMEOUT         TimeoutStatus;\r
} HW_WATCHDOG_INFO;\r
\r
//\r
// Watchdog timer action values.\r
//\r
#define WDT_ACTION_RESET                    0x01    // reload/reset timer\r
#define WDT_ACTION_QUERY_CURRENT_VALUE      0x04    // get current value                     // DON'T NEED FOR OVERCLOCK UTILITY\r
#define WDT_ACTION_QUERY_COUNTDOWN_PERIOD   0x05    // get countdown period\r
#define WDT_ACTION_SET_COUNTDOWN_PERIOD     0x06    // set countdown period\r
#define WDT_ACTION_QUERY_RUNNING_STATE      0x08    // query if running\r
#define WDT_ACTION_SET_RUNNING_STATE        0x09    // start timer\r
#define WDT_ACTION_QUERY_STOPPED_STATE      0x0A    // query if stopped\r
#define WDT_ACTION_SET_STOPPED_STATE        0x0B    // stop timer\r
#define WDT_ACTION_QUERY_STATUS             0x20    // is current boot cause by wdt timeout?\r
#define WDT_ACTION_SET_STATUS               0x21    // resets wdt status bit\r
\r
//\r
// Watchdog timer instruction values.\r
//\r
#define WDT_INSTR_VALUE_MASK                0x03    // Mask for just the value\r
#define WDT_INSTR_READ_CMP_VALUE            0x00    // Read / compare value\r
#define WDT_INSTR_READ_COUNTDOWN            0x01    // read countdown value\r
#define WDT_INSTR_WRITE_VALUE               0x02    // Write value\r
#define WDT_INSTR_WRITE_COUNTDOWN           0x03    // write countdown value\r
#define WDT_INSTR_PRESERVE_REG              0x80    // preserve reg; used in Write Value / Write Countdown\r
#define WDT_INSTR_WRITE_VALUE_PRES         (0x02 | WDT_INSTR_PRESERVE_REG)   // Write value with preserve\r
#define WDT_INSTR_WRITE_COUNTDOWN_PRES     (0x03 | WDT_INSTR_PRESERVE_REG)   // write countdown value with preserve\r
\r
//\r
// The Generic Address Structure is defined in the ACPI Specification and should only be\r
// changed to match updated revisions of that specification.  The GAS_ADDRESS_SPACE and\r
// GAS_ACCESS_SIZE enumerations are also defined by the ACPI Specification.\r
//\r
typedef enum {\r
  GAS_SYSTEM_MEMORY,\r
  GAS_SYSTEM_IO,\r
  GAS_PCI_CONFIG_SPACE,\r
  GAS_EMBEDDED_CONTROLLER,\r
  GAS_SMBUS\r
} GAS_ADDRESS_SPACE;\r
\r
typedef enum {\r
  GAS_UNDEFINED,\r
  GAS_BYTE_ACCESS,\r
  GAS_WORD_ACCESS,\r
  GAS_DWORD_ACCESS,\r
  GAS_QWORD_ACCESS\r
} GAS_ACCESS_SIZE;\r
\r
#pragma pack(1)\r
\r
typedef struct {\r
  UINT8                       AddressSpaceId;\r
  UINT8                       RegisterBitWidth;\r
  UINT8                       RegisterBitOffset;\r
  UINT8                       AccessSize;\r
  UINT64                      Address;\r
} GENERIC_ADDRESS_STRUCTURE;\r
\r
//\r
// GAS_SYSTEM_MEMORY -    When used as the AddressSpaceId, the 64-bit physical memory address\r
//                        of the register.  32-bit platforms must have the high DWORD set to 0.\r
// GAS_SYSTEM_IO -        The 64-bit I/O address of the register.  32-bit platforms must have\r
//                        the high DWORD set to 0.\r
// GAS_PCI_CONFIG_SPACE - PCI Configuration space addresses must be confined to devices on PCI\r
//                        Sepment Group 0, Bus 0.  This restriction exists to accommodate access\r
//                        to fixed hardware prior to PCI bus enumeration.  The format of addresses\r
//                        are defined as follows:\r
//                            Highest WORD: Reserved and must be -0-\r
//                            ...           PCI Device number on bus 0\r
//                            ...           PCI Function number\r
//                            Lowest WORD:  Offset in the configuration space header.\r
//\r
\r
typedef struct {\r
  UINT8                       WdAction;\r
  UINT8                       Flag;\r
  UINT16                      Res;\r
  GENERIC_ADDRESS_STRUCTURE   GenericAddressStructures;\r
  UINT32                      Value;\r
  UINT32                      Mask;\r
} WD_INSTRUCTION;\r
\r
typedef struct {\r
  UINT32                      TimerPeriod;\r
  UINT32                      MaxTimerCount;\r
  UINT32                      MinTimerCount;\r
  UINT16                      InstructionCount;\r
  WD_INSTRUCTION              ActionDefinitions[1];\r
} WD_HOB_DEFINITION;\r
\r
#pragma pack()\r
\r
extern EFI_GUID gWatchdogTimerHobGuid;\r
extern EFI_GUID gWatchdogTimerDefinitionHobGuid;\r
\r
#endif // _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r
Commit	Line	Data
3cbfba02 DW	1	/*++\r
	2	\r
	3	Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r
	4	\r\r
9dc8036d MK	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
9dc8036d MK	6	\r
3cbfba02 DW	7	\r\r
	8	\r
	9	\r
	10	Module Name:\r
	11	\r
	12	HwWatchdogTimerHob.h\r
	13	\r
	14	Abstract:\r
	15	\r
	16	GUID used for Watchdog Timer status in the HOB list.\r
	17	\r
	18	--*/\r
	19	\r
	20	#ifndef _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r
	21	#define _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r
	22	\r
	23	#define EFI_WATCHDOG_TIMER_HOB_GUID \\r
	24	{ 0x226cd3f, 0x69b5, 0x4150, 0xac, 0xbe, 0xbf, 0xbf, 0x18, 0xe3, 0x3, 0xd5 }\r
	25	\r
	26	#define EFI_WATCHDOG_TIMER_DEFINITION_HOB_GUID \\r
	27	{ 0xd29302b0, 0x11ba, 0x4073, 0xa2, 0x27, 0x53, 0x8d, 0x25, 0x42, 0x70, 0x9f }\r
	28	\r
	29	typedef enum {\r
	30	HWWD_NONE,\r
	31	HWWD_TIMER_EXPIRED,\r
	32	HWWD_SPONTANEOUS_REBOOT,\r
	33	HWWD_FORCED_TIMEOUT\r
	34	} HW_WATCHDOG_TIMEOUT;\r
	35	\r
	36	typedef struct {\r
	37	HW_WATCHDOG_TIMEOUT TimeoutStatus;\r
	38	} HW_WATCHDOG_INFO;\r
	39	\r
	40	//\r
	41	// Watchdog timer action values.\r
	42	//\r
	43	#define WDT_ACTION_RESET 0x01 // reload/reset timer\r
	44	#define WDT_ACTION_QUERY_CURRENT_VALUE 0x04 // get current value // DON'T NEED FOR OVERCLOCK UTILITY\r
	45	#define WDT_ACTION_QUERY_COUNTDOWN_PERIOD 0x05 // get countdown period\r
	46	#define WDT_ACTION_SET_COUNTDOWN_PERIOD 0x06 // set countdown period\r
	47	#define WDT_ACTION_QUERY_RUNNING_STATE 0x08 // query if running\r
	48	#define WDT_ACTION_SET_RUNNING_STATE 0x09 // start timer\r
	49	#define WDT_ACTION_QUERY_STOPPED_STATE 0x0A // query if stopped\r
	50	#define WDT_ACTION_SET_STOPPED_STATE 0x0B // stop timer\r
	51	#define WDT_ACTION_QUERY_STATUS 0x20 // is current boot cause by wdt timeout?\r
	52	#define WDT_ACTION_SET_STATUS 0x21 // resets wdt status bit\r
	53	\r
	54	//\r
	55	// Watchdog timer instruction values.\r
	56	//\r
	57	#define WDT_INSTR_VALUE_MASK 0x03 // Mask for just the value\r
	58	#define WDT_INSTR_READ_CMP_VALUE 0x00 // Read / compare value\r
	59	#define WDT_INSTR_READ_COUNTDOWN 0x01 // read countdown value\r
	60	#define WDT_INSTR_WRITE_VALUE 0x02 // Write value\r
	61	#define WDT_INSTR_WRITE_COUNTDOWN 0x03 // write countdown value\r
	62	#define WDT_INSTR_PRESERVE_REG 0x80 // preserve reg; used in Write Value / Write Countdown\r
	63	#define WDT_INSTR_WRITE_VALUE_PRES (0x02 \| WDT_INSTR_PRESERVE_REG) // Write value with preserve\r
	64	#define WDT_INSTR_WRITE_COUNTDOWN_PRES (0x03 \| WDT_INSTR_PRESERVE_REG) // write countdown value with preserve\r
	65	\r
	66	//\r
	67	// The Generic Address Structure is defined in the ACPI Specification and should only be\r
	68	// changed to match updated revisions of that specification. The GAS_ADDRESS_SPACE and\r
	69	// GAS_ACCESS_SIZE enumerations are also defined by the ACPI Specification.\r
	70	//\r
71	typedef enum {\r
72	GAS_SYSTEM_MEMORY,\r
73	GAS_SYSTEM_IO,\r
74	GAS_PCI_CONFIG_SPACE,\r
75	GAS_EMBEDDED_CONTROLLER,\r
76	GAS_SMBUS\r
77	} GAS_ADDRESS_SPACE;\r
78	\r
79	typedef enum {\r
80	GAS_UNDEFINED,\r
81	GAS_BYTE_ACCESS,\r
82	GAS_WORD_ACCESS,\r
83	GAS_DWORD_ACCESS,\r
84	GAS_QWORD_ACCESS\r
85	} GAS_ACCESS_SIZE;\r
86	\r
87	#pragma pack(1)\r
88	\r
89	typedef struct {\r
90	UINT8 AddressSpaceId;\r
91	UINT8 RegisterBitWidth;\r
92	UINT8 RegisterBitOffset;\r
93	UINT8 AccessSize;\r
94	UINT64 Address;\r
95	} GENERIC_ADDRESS_STRUCTURE;\r
96	\r
97	//\r
98	// GAS_SYSTEM_MEMORY - When used as the AddressSpaceId, the 64-bit physical memory address\r
99	// of the register. 32-bit platforms must have the high DWORD set to 0.\r
100	// GAS_SYSTEM_IO - The 64-bit I/O address of the register. 32-bit platforms must have\r
101	// the high DWORD set to 0.\r
102	// GAS_PCI_CONFIG_SPACE - PCI Configuration space addresses must be confined to devices on PCI\r
103	// Sepment Group 0, Bus 0. This restriction exists to accommodate access\r
104	// to fixed hardware prior to PCI bus enumeration. The format of addresses\r
105	// are defined as follows:\r
106	// Highest WORD: Reserved and must be -0-\r
107	// ... PCI Device number on bus 0\r
108	// ... PCI Function number\r
109	// Lowest WORD: Offset in the configuration space header.\r
110	//\r
111	\r
112	typedef struct {\r
113	UINT8 WdAction;\r
114	UINT8 Flag;\r
115	UINT16 Res;\r
116	GENERIC_ADDRESS_STRUCTURE GenericAddressStructures;\r
117	UINT32 Value;\r
118	UINT32 Mask;\r
119	} WD_INSTRUCTION;\r
120	\r
121	typedef struct {\r
122	UINT32 TimerPeriod;\r
123	UINT32 MaxTimerCount;\r
124	UINT32 MinTimerCount;\r
125	UINT16 InstructionCount;\r
126	WD_INSTRUCTION ActionDefinitions[1];\r
127	} WD_HOB_DEFINITION;\r
128	\r
129	#pragma pack()\r
130	\r
131	extern EFI_GUID gWatchdogTimerHobGuid;\r
132	extern EFI_GUID gWatchdogTimerDefinitionHobGuid;\r
133	\r
134	#endif // _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r