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[mirror_edk2.git] / Vlv2TbltDevicePkg / Include / Protocol / I2cHostMcg.h
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1/*++\r
2\r
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r
4 \r\r
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5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
6\r
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7 \r\r
8\r
9**/\r
10\r
11#ifndef __I2C_HOST_H__\r
12#define __I2C_HOST_H__\r
13\r
14#include <Protocol/I2cMasterMcg.h>\r
15\r
16/**\r
17 Declare the forward references\r
18\r
19**/\r
20typedef struct _EFI_I2C_HOST_PROTOCOL EFI_I2C_HOST_PROTOCOL;\r
21typedef struct _EFI_I2C_HOST_CALLBACKS EFI_I2C_HOST_CALLBACKS;\r
22\r
23\r
24/**\r
25 Queue an I2C operation for execution on the I2C controller.\r
26\r
27 This routine must be called at or below TPL_NOTIFY. For synchronous\r
28 requests this routine must be called at or below TPL_CALLBACK.\r
29\r
30 N.B. The typical consumers of this API are the I2C bus driver and\r
31 on rare occasions the I2C test application. Extreme care must be\r
32 taken by other consumers of this API to prevent confusing the\r
33 third party I2C drivers due to a state change at the I2C device\r
34 which the third party I2C drivers did not initiate. I2C platform\r
35 drivers may use this API within these guidelines.\r
36\r
37 This layer uses the concept of I2C bus configurations to describe\r
38 the I2C bus. An I2C bus configuration is defined as a unique\r
39 setting of the multiplexers and switches in the I2C bus which\r
40 enable access to one or more I2C devices. When using a switch\r
41 to divide a bus, due to speed differences, the I2C platform layer\r
42 would define an I2C bus configuration for the I2C devices on each\r
43 side of the switch. When using a multiplexer, the I2C platform\r
44 layer defines an I2C bus configuration for each of the selector\r
45 values required to control the multiplexer. See Figure 1 in the\r
46 <a href="http://www.nxp.com/documents/user_manual/UM10204.pdf">I<sup>2</sup>C\r
47 Specification</a> for a complex I2C bus configuration.\r
48\r
49 The I2C host driver processes all operations in FIFO order. Prior to\r
50 performing the operation, the I2C host driver calls the I2C platform\r
51 driver to reconfigure the switches and multiplexers in the I2C bus\r
52 enabling access to the specified I2C device. The I2C platform driver\r
53 also selects the maximum bus speed for the device. After the I2C bus\r
54 is configured, the I2C host driver calls the I2C port driver to\r
55 initialize the I2C controller and start the I2C operation.\r
56\r
57 @param[in] This Address of an EFI_I2C_HOST_PROTOCOL instance.\r
58 @param[in] I2cBusConfiguration I2C bus configuration to access the I2C\r
59 device.\r
60 @param[in] SlaveAddress Address of the device on the I2C bus.\r
61 @param[in] Event Event to set for asynchronous operations,\r
62 NULL for synchronous operations\r
63 @param[in] RequestPacket Address of an EFI_I2C_REQUEST_PACKET\r
64 structure describing the I2C operation\r
65 @param[out] I2cStatus Optional buffer to receive the I2C operation\r
66 completion status\r
67\r
68 @retval EFI_SUCCESS The operation completed successfully.\r
69 @retval EFI_ABORTED The request did not complete because the driver\r
70 was shutdown.\r
71 @retval EFI_BAD_BUFFER_SIZE The WriteBytes or ReadBytes buffer size is too large.\r
72 @retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the operation.\r
73 This could indicate the slave device is not present.\r
74 @retval EFI_INVALID_PARAMETER RequestPacket is NULL\r
75 @retval EFI_INVALID_PARAMETER TPL is too high\r
76 @retval EFI_NO_MAPPING Invalid I2cBusConfiguration value\r
77 @retval EFI_NO_RESPONSE The I2C device is not responding to the\r
78 slave address. EFI_DEVICE_ERROR may also be\r
79 returned if the controller cannot distinguish\r
80 when the NACK occurred.\r
81 @retval EFI_NOT_FOUND I2C slave address exceeds maximum address\r
82 @retval EFI_NOT_READY I2C bus is busy or operation pending, wait for\r
83 the event and then read status pointed to by\r
84 the request packet.\r
85 @retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C operation\r
86 @retval EFI_TIMEOUT The transaction did not complete within an internally\r
87 specified timeout period.\r
88\r
89**/\r
90typedef\r
91EFI_STATUS\r
92(EFIAPI *EFI_I2C_HOST_QUEUE_REQUEST) (\r
93 IN CONST EFI_I2C_HOST_PROTOCOL *This,\r
94 IN UINTN I2cBusConfiguration,\r
95 IN UINTN SlaveAddress,\r
96 IN EFI_EVENT Event OPTIONAL,\r
97 IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket,\r
98 OUT EFI_STATUS *I2cStatus OPTIONAL\r
99 );\r
100\r
101///\r
102/// Host access to the I2C bus.\r
103///\r
104struct _EFI_I2C_HOST_PROTOCOL {\r
105 ///\r
106 /// Queue an operation for execution on the I2C bus\r
107 ///\r
108 EFI_I2C_HOST_QUEUE_REQUEST QueueRequest;\r
109\r
110 ///\r
111 /// The maximum number of I2C bus configurations\r
112 ///\r
113 UINTN I2cBusConfigurationCount;\r
114\r
115 ///\r
116 /// The maximum number of bytes the I2C host controller\r
117 /// is able to receive from the I2C bus.\r
118 ///\r
119 UINT32 MaximumReceiveBytes;\r
120\r
121 ///\r
122 /// The maximum number of bytes the I2C host controller\r
123 /// is able to send on the I2C bus.\r
124 ///\r
125 UINT32 MaximumTransmitBytes;\r
126\r
127 ///\r
128 /// The maximum number of bytes in the I2C bus transaction.\r
129 ///\r
130 UINT32 MaximumTotalBytes;\r
131};\r
132\r
133///\r
134/// GUID for the EFI_I2C_HOST_PROTOCOL\r
135///\r
136extern EFI_GUID gEfiI2cHostProtocolGuid;\r
137\r
138#endif // __I2C_HOST_H__\r