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3cbfba02 DW |
1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
4 | \r\r | |
9dc8036d MK |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
6 | \r | |
3cbfba02 DW |
7 | \r\r |
8 | \r | |
9 | Module Name:\r | |
10 | \r | |
11 | \r | |
12 | CpuIA32.c\r | |
13 | \r | |
14 | Abstract:\r | |
15 | \r | |
16 | --*/\r | |
17 | \r | |
18 | #include <Library/CpuIA32.h>\r | |
19 | \r | |
20 | VOID\r | |
21 | EfiHalt (VOID)\r | |
22 | {\r | |
23 | __asm {\r | |
24 | hlt\r | |
25 | }\r | |
26 | }\r | |
27 | \r | |
28 | VOID\r | |
29 | EfiWbinvd (VOID)\r | |
30 | {\r | |
31 | __asm {\r | |
32 | wbinvd\r | |
33 | }\r | |
34 | }\r | |
35 | \r | |
36 | VOID\r | |
37 | EfiInvd (VOID)\r | |
38 | {\r | |
39 | __asm {\r | |
40 | invd\r | |
41 | }\r | |
42 | }\r | |
43 | \r | |
44 | VOID\r | |
45 | EfiCpuid (IN UINT32 RegisterInEax,\r | |
46 | OUT EFI_CPUID_REGISTER *Reg OPTIONAL)\r | |
47 | {\r | |
48 | __asm {\r | |
49 | pushad\r | |
50 | \r | |
51 | mov eax, RegisterInEax\r | |
52 | cpuid\r | |
53 | cmp Reg, 0\r | |
54 | je _Exit\r | |
55 | mov edi, DWORD PTR Reg\r | |
56 | \r | |
57 | mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax\r | |
58 | mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx\r | |
59 | mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx\r | |
60 | mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx\r | |
61 | \r | |
62 | _Exit:\r | |
63 | popad\r | |
64 | }\r | |
65 | }\r | |
66 | \r | |
67 | UINT64\r | |
68 | EfiReadMsr (IN UINT32 Index)\r | |
69 | {\r | |
70 | __asm {\r | |
71 | mov ecx, Index\r | |
72 | rdmsr\r | |
73 | }\r | |
74 | }\r | |
75 | \r | |
76 | VOID\r | |
77 | EfiWriteMsr (\r | |
78 | IN UINT32 Index,\r | |
79 | IN UINT64 Value\r | |
80 | )\r | |
81 | {\r | |
82 | __asm {\r | |
83 | mov ecx, Index\r | |
84 | mov eax, DWORD PTR Value[0]\r | |
85 | mov edx, DWORD PTR Value[4]\r | |
86 | wrmsr\r | |
87 | }\r | |
88 | }\r | |
89 | \r | |
90 | UINT64\r | |
91 | EfiReadTsc (VOID)\r | |
92 | {\r | |
93 | __asm {\r | |
94 | rdtsc\r | |
95 | }\r | |
96 | }\r | |
97 | \r | |
98 | VOID\r | |
99 | EfiDisableCache (VOID)\r | |
100 | {\r | |
101 | __asm {\r | |
102 | mov eax, cr0\r | |
103 | bswap eax\r | |
104 | and al, 60h\r | |
105 | cmp al, 60h\r | |
106 | je Exit\r | |
107 | mov eax, cr0\r | |
108 | or eax, 060000000h\r | |
109 | mov cr0, eax\r | |
110 | wbinvd\r | |
111 | Exit:\r | |
112 | }\r | |
113 | }\r | |
114 | \r | |
115 | VOID\r | |
116 | EfiEnableCache (VOID)\r | |
117 | {\r | |
118 | __asm {\r | |
119 | wbinvd\r | |
120 | mov eax, cr0\r | |
121 | and eax, 09fffffffh\r | |
122 | mov cr0, eax\r | |
123 | }\r | |
124 | }\r | |
125 | \r | |
126 | UINT32\r | |
127 | EfiGetEflags (\r | |
128 | VOID\r | |
129 | )\r | |
130 | {\r | |
131 | __asm {\r | |
132 | pushfd\r | |
133 | pop eax\r | |
134 | }\r | |
135 | }\r | |
136 | \r | |
137 | VOID\r | |
138 | EfiDisableInterrupts (VOID)\r | |
139 | {\r | |
140 | __asm {\r | |
141 | cli\r | |
142 | }\r | |
143 | }\r | |
144 | \r | |
145 | VOID\r | |
146 | EfiEnableInterrupts (\r | |
147 | VOID\r | |
148 | )\r | |
149 | {\r | |
150 | __asm {\r | |
151 | sti\r | |
152 | }\r | |
153 | }\r | |
154 | \r | |
155 | VOID\r | |
156 | EfiCpuidExt (\r | |
157 | IN UINT32 RegisterInEax,\r | |
158 | IN UINT32 CacheLevel,\r | |
159 | OUT EFI_CPUID_REGISTER *Regs\r | |
160 | )\r | |
161 | {\r | |
162 | __asm {\r | |
163 | pushad\r | |
164 | \r | |
165 | mov eax, RegisterInEax\r | |
166 | mov ecx, CacheLevel\r | |
167 | cpuid\r | |
168 | mov edi, DWORD PTR Regs\r | |
169 | \r | |
170 | mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax\r | |
171 | mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx\r | |
172 | mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx\r | |
173 | mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx\r | |
174 | \r | |
175 | popad\r | |
176 | }\r | |
177 | }\r |