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3cbfba02 DW |
1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
4 | \r\r | |
9dc8036d MK |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
6 | \r | |
3cbfba02 DW |
7 | \r\r |
8 | \r | |
9 | Module Name:\r | |
10 | \r | |
11 | \r | |
12 | PeiPostCode.c\r | |
13 | \r | |
14 | Abstract:\r | |
15 | \r | |
16 | Worker functions for PostCode\r | |
17 | \r | |
18 | --*/\r | |
19 | \r | |
20 | #include "EfiStatusCode.h"\r | |
21 | \r | |
22 | #pragma pack(1)\r | |
23 | typedef struct {\r | |
24 | EFI_STATUS_CODE_VALUE StatusValue;\r | |
25 | UINT8 Port80Value;\r | |
26 | } EFI_STATUS_CODE_TO_PORT_80;\r | |
27 | #pragma pack()\r | |
28 | \r | |
29 | //\r | |
30 | // see Edk\Foundation\Library\EfiCommonLib\PostCode.c for DXE/BDS POST codes.\r | |
31 | //\r | |
32 | EFI_STATUS_CODE_TO_PORT_80 mPeiPort80Table[] = {\r | |
33 | //\r | |
34 | // Platform init\r | |
35 | //\r | |
36 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_INIT, 0x11},\r | |
37 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_STEP1, 0x12},\r | |
38 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_STEP2, 0x13},\r | |
39 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_STEP3, 0x14},\r | |
40 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_STEP4, 0x15},\r | |
41 | \r | |
42 | //\r | |
43 | // SMBUS\r | |
44 | //\r | |
45 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_SMBUS_PEI_INIT, 0x16},\r | |
46 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_SMBUS_PEI_EXEC_ENTRY, 0x17},\r | |
47 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_SMBUS_PEI_EXEC_EXIT, 0x18},\r | |
48 | \r | |
49 | //\r | |
50 | // Clock\r | |
51 | //\r | |
52 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_CLOCK_PEI_INIT_ENTRY, 0x19},\r | |
53 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_CLOCK_PEI_INIT_EXIT, 0x1A},\r | |
54 | \r | |
55 | //\r | |
56 | // Over clocking support\r | |
57 | //\r | |
58 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_OVERCLOCK_PEI_INIT_ENTRY, 0x1B},\r | |
59 | {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_OVERCLOCK_PEI_INIT_EXIT, 0x1C},\r | |
60 | \r | |
61 | //\r | |
62 | // MRC\r | |
63 | //\r | |
64 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_INIT_BEGIN, 0x21},\r | |
65 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_SPD_READ, 0x23},\r | |
66 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_PRESENCE_DETECT, 0x24},\r | |
67 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_TIMING, 0x25},\r | |
68 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_OPTIMIZING, 0x26},\r | |
69 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_CONFIGURING, 0x27},\r | |
70 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_TEST, 0x28},\r | |
71 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_COMPLETE, 0x29},\r | |
72 | \r | |
73 | //\r | |
74 | // Platform Init after MRC\r | |
75 | //\r | |
76 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_PROG_MTRR, 0x2A},\r | |
77 | {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_PROG_MTRR_END, 0x2B},\r | |
78 | \r | |
79 | {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_PC_RECOVERY_BEGIN, 0x31},\r | |
80 | {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_PC_RECOVERY_AUTO, 0x32},\r | |
81 | {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_PC_CAPSULE_LOAD, 0x33},\r | |
82 | {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_PC_CAPSULE_START, 0x34},\r | |
83 | {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_EC_NO_RECOVERY_CAPSULE, 0x35},\r | |
84 | \r | |
85 | {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_PEI_INIT, 0x41},\r | |
86 | {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_PEI_STEP1, 0x42},\r | |
87 | {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_PEI_END, 0x43},\r | |
88 | {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_SMM_PEI_INIT, 0x44},\r | |
89 | {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_SMM_PEI_STEP1, 0x45},\r | |
90 | {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_SMM_PEI_END, 0x46}\r | |
91 | };\r | |
92 | \r | |
93 | BOOLEAN\r | |
94 | PeiCodeTypeToPostCode (\r | |
95 | IN EFI_STATUS_CODE_TYPE CodeType,\r | |
96 | IN EFI_STATUS_CODE_VALUE Value,\r | |
97 | OUT UINT8 *PostCode\r | |
98 | )\r | |
99 | {\r | |
100 | UINTN Index;\r | |
101 | \r | |
102 | if (CodeType == EFI_PROGRESS_CODE) {\r | |
103 | if ((Value == (EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_BEGIN)) ||\r | |
104 | (Value == (EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_END)) ||\r | |
105 | (Value == (EFI_SOFTWARE_DXE_CORE | EFI_SW_PC_INIT_BEGIN)) ||\r | |
106 | (Value == (EFI_SOFTWARE_DXE_CORE | EFI_SW_PC_INIT_END))) {\r | |
107 | return FALSE;\r | |
108 | }\r | |
109 | } else {\r | |
110 | return FALSE;\r | |
111 | }\r | |
112 | \r | |
113 | for (Index = 0; Index < sizeof(mPeiPort80Table)/sizeof(EFI_STATUS_CODE_TO_PORT_80); Index++) {\r | |
114 | if (mPeiPort80Table[Index].StatusValue == Value) {\r | |
115 | *PostCode = mPeiPort80Table[Index].Port80Value;\r | |
116 | return TRUE;\r | |
117 | }\r | |
118 | }\r | |
119 | \r | |
120 | return FALSE;\r | |
121 | }\r |