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[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformDxe / IchPlatformPolicy.c
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3cbfba02
DW		 1/** @file
2
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
4
5
9dc8036d 6 SPDX-License-Identifier: BSD-2-Clause-Patent
3cbfba02
DW		 7
8
9
10
11Module Name:
12
13
14 PchPlatformPolicy.c
15
16Abstract:
17
18
19--*/
20
21#include "PlatformDxe.h"
22#include <Protocol/PchPlatformPolicy.h>
23#include <Protocol/VlvPlatformPolicy.h>
24#include <Library/PchPlatformLib.h>
25
26#include "AzaliaVerbTable.h"
27#include "Protocol/GlobalNvsArea.h"
28#include "Protocol/DxePchPolicyUpdateProtocol.h"
29
30#define MOBILE_PLATFORM 1
31#define DESKTOP_PLATFORM 2
32
33EFI_GUID gDxePchPolicyUpdateProtocolGuid = DXE_PCH_POLICY_UPDATE_PROTOCOL_GUID;
34DXE_PCH_POLICY_UPDATE_PROTOCOL mDxePchPolicyUpdate = { 0 };
35
36/**
37
38 Updates the feature policies according to the setup variable.
39
40 @retval VOID
41
42**/
43VOID
44InitPchPlatformPolicy (
45 IN EFI_PLATFORM_INFO_HOB *PlatformInfo
46 )
47{
48 DXE_PCH_PLATFORM_POLICY_PROTOCOL *DxePlatformPchPolicy;
49 EFI_STATUS Status;
50 EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea;
51 UINT8 PortIndex;
52 EFI_HANDLE Handle;
53 PCH_STEPPING SocStepping = PchA0;
54 BOOLEAN ModifyVariable;
55
56 ModifyVariable = FALSE;
57 DEBUG ((EFI_D_INFO, "InitPchPlatformPolicy() - Start\n"));
58
59 Status = gBS->LocateProtocol (&gDxePchPlatformPolicyProtocolGuid, NULL, (VOID **) &DxePlatformPchPolicy);
60 ASSERT_EFI_ERROR (Status);
61
62 //
63 // Locate the Global NVS Protocol.
64 //
65 Status = gBS->LocateProtocol (
66 &gEfiGlobalNvsAreaProtocolGuid,
67 NULL,
68 (VOID **) &GlobalNvsArea
69 );
70 ASSERT_EFI_ERROR (Status);
71
72 //
73 // Update system information
74 //
75 DxePlatformPchPolicy->Revision = DXE_PCH_PLATFORM_POLICY_PROTOCOL_REVISION_12;
76
77 //
78 // General initialization
79 //
80 DxePlatformPchPolicy->BusNumber = 0;
81
82 //
83 // VLV BIOS Spec Section 3.6 Flash Security Recommendation,
84 // Intel strongly recommends that BIOS sets the BIOS Interface Lock Down bit. Enabling this bit
85 // will mitigate malicious software attempts to replace the system BIOS option ROM with its own code.
86 // We always enable this as a platform policy.
87 //
88 DxePlatformPchPolicy->LockDownConfig->BiosInterface = PCH_DEVICE_ENABLE;
89 DxePlatformPchPolicy->LockDownConfig->BiosLock = mSystemConfiguration.SpiRwProtect;
90
91 //
92 // DeviceEnables
93 //
94 DxePlatformPchPolicy->DeviceEnabling->Lan = mSystemConfiguration.Lan;
95 DxePlatformPchPolicy->DeviceEnabling->Azalia = mSystemConfiguration.PchAzalia;
96 DxePlatformPchPolicy->DeviceEnabling->Sata = mSystemConfiguration.Sata;
97 DxePlatformPchPolicy->DeviceEnabling->Smbus = PCH_DEVICE_ENABLE;
98 DxePlatformPchPolicy->DeviceEnabling->LpeEnabled = mSystemConfiguration.Lpe;
99
100 DxePlatformPchPolicy->UsbConfig->Ehci1Usbr = PCH_DEVICE_DISABLE;
101
102 DxePlatformPchPolicy->UsbConfig->UsbXhciLpmSupport =mSystemConfiguration.UsbXhciLpmSupport;
103
104 //
105 // Disable FFRD PR0 USB port2 for power saving since PR0 uses non-POR WWAN (but enable on PR0.3/PR0.5/PR1)
106 //
107 if ((PlatformInfo->BoardId == BOARD_ID_BL_FFRD) && (PlatformInfo->BoardRev == PR0))
108 if (mSystemConfiguration.PchUsbPort[2] !=0) {
109 mSystemConfiguration.PchUsbPort[2]=0;
110 ModifyVariable = TRUE;
111 }
112
113
114 if (ModifyVariable) {
115 Status = gRT->SetVariable (
116 NORMAL_SETUP_NAME,
117 &gEfiNormalSetupGuid,
118 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
119 sizeof(SYSTEM_CONFIGURATION),
120 &mSystemConfiguration
121 );
122 }
123
124 SocStepping = PchStepping();
125 if (mSystemConfiguration.UsbAutoMode == 1) { // auto mode is enabled
126 if (PchA0 == SocStepping) {
127 //
128 // For A0, EHCI is enabled as default.
129 //
130 mSystemConfiguration.PchUsb20 = 1;
131 mSystemConfiguration.PchUsb30Mode = 0;
132 mSystemConfiguration.UsbXhciSupport = 0;
133 DEBUG ((EFI_D_INFO, "EHCI is enabled as default. SOC 0x%x\n", SocStepping));
134 } else {
135 //
136 // For A1 and later, XHCI is enabled as default.
137 //
138 mSystemConfiguration.PchUsb20 = 0;
139 mSystemConfiguration.PchUsb30Mode = 1;
140 mSystemConfiguration.UsbXhciSupport = 1;
141 DEBUG ((EFI_D_INFO, "XHCI is enabled as default. SOC 0x%x\n", SocStepping));
142 }
143 //
144 //overwrite the setting
145 //
146 Status = gRT->SetVariable(
147 NORMAL_SETUP_NAME,
148 &gEfiNormalSetupGuid,
149 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
150 sizeof(SYSTEM_CONFIGURATION),
151 &mSystemConfiguration
152 );
153 }
154
155 //
156 // USB Device 29 configuration
157 //
158 DxePlatformPchPolicy->UsbConfig->Usb20Settings[0].Enable = mSystemConfiguration.PchUsb20;
159 DxePlatformPchPolicy->UsbConfig->UsbPerPortCtl = mSystemConfiguration.PchUsbPerPortCtl;
160 if (mSystemConfiguration.PchUsbPerPortCtl != PCH_DEVICE_DISABLE) {
161 for (PortIndex = 0; PortIndex < PCH_USB_MAX_PHYSICAL_PORTS; PortIndex++) {
162 DxePlatformPchPolicy->UsbConfig->PortSettings[PortIndex].Enable = mSystemConfiguration.PchUsbPort[PortIndex];
163 }
164 }
165
166 DxePlatformPchPolicy->UsbConfig->EhciDebug = mSystemConfiguration.PchEhciDebug;
167
168 //
169 // xHCI (USB 3.0) related settings from setup variable
170 //
171 DxePlatformPchPolicy->UsbConfig->Usb30Settings.XhciStreams = mSystemConfiguration.PchUsb30Streams;
172
173 DxePlatformPchPolicy->UsbConfig->Usb30Settings.Mode = mSystemConfiguration.PchUsb30Mode;
174
175 //
176 // Remove XHCI Pre-Boot Driver setup option selection from end-user view and automate loading of USB 3.0 BIOS driver based on XhciMode selection
177 //
178 switch (mSystemConfiguration.PchUsb30Mode) {
179 case 0: // Disabled
180 DxePlatformPchPolicy->UsbConfig->Usb30Settings.PreBootSupport = 0;
181 break;
182 case 1: // Enabled
183 DxePlatformPchPolicy->UsbConfig->Usb30Settings.PreBootSupport = 1;
184 break;
185 case 2: // Auto
186 DxePlatformPchPolicy->UsbConfig->Usb30Settings.PreBootSupport = 0;
187 break;
188 case 3: // Smart Auto
189 DxePlatformPchPolicy->UsbConfig->Usb30Settings.PreBootSupport = 1;
190 break;
191 default:
192 DxePlatformPchPolicy->UsbConfig->Usb30Settings.PreBootSupport = mSystemConfiguration.UsbXhciSupport;
193 break;
194 }
195
196
197
198 DxePlatformPchPolicy->UsbConfig->UsbOtgSettings.Enable = mSystemConfiguration.PchUsbOtg;
199
200 DxePlatformPchPolicy->UsbConfig->PortSettings[0].Dock = PCH_DEVICE_DISABLE;
201 DxePlatformPchPolicy->UsbConfig->PortSettings[1].Dock = PCH_DEVICE_DISABLE;
202 DxePlatformPchPolicy->UsbConfig->PortSettings[2].Dock = PCH_DEVICE_DISABLE;
203 DxePlatformPchPolicy->UsbConfig->PortSettings[3].Dock = PCH_DEVICE_DISABLE;
204
205 DxePlatformPchPolicy->UsbConfig->PortSettings[0].Panel = PCH_USB_FRONT_PANEL;
206 DxePlatformPchPolicy->UsbConfig->PortSettings[1].Panel = PCH_USB_FRONT_PANEL;
207 DxePlatformPchPolicy->UsbConfig->PortSettings[2].Panel = PCH_USB_BACK_PANEL;
208 DxePlatformPchPolicy->UsbConfig->PortSettings[3].Panel = PCH_USB_BACK_PANEL;
209
210 //
211 //
212 // Enable USB Topology control and program the topology setting for every USB port
213 // See Platform Design Guide for description of topologies
214 //
215 //
216 // Port 0: ~5.3", Port 1: ~4.9", Port 2: ~4.7", Port 3: ~8.0"
217 //
218 DxePlatformPchPolicy->UsbConfig->Usb20PortLength[0] = 0x53;
219 DxePlatformPchPolicy->UsbConfig->Usb20PortLength[1] = 0x49;
220 DxePlatformPchPolicy->UsbConfig->Usb20PortLength[2] = 0x47;
221 DxePlatformPchPolicy->UsbConfig->Usb20PortLength[3] = 0x80;
222
223 DxePlatformPchPolicy->UsbConfig->Usb20OverCurrentPins[0] = PchUsbOverCurrentPin0;
224 DxePlatformPchPolicy->UsbConfig->Usb20OverCurrentPins[1] = PchUsbOverCurrentPin0;
225 DxePlatformPchPolicy->UsbConfig->Usb20OverCurrentPins[2] = PchUsbOverCurrentPin1;
226 DxePlatformPchPolicy->UsbConfig->Usb20OverCurrentPins[3] = PchUsbOverCurrentPin1;
227
228 DxePlatformPchPolicy->UsbConfig->Usb30OverCurrentPins[0] = PchUsbOverCurrentPinSkip;//PchUsbOverCurrentPin0;
229
230 DxePlatformPchPolicy->EhciPllCfgEnable = mSystemConfiguration.EhciPllCfgEnable;
231 DEBUG ((EFI_D_INFO, "InitPchPlatformPolicy() DxePlatformPchPolicy->EhciPllCfgEnable = 0x%x \n",DxePlatformPchPolicy->EhciPllCfgEnable));
232 DxePlatformPchPolicy->PciExpressConfig->PcieDynamicGating = mSystemConfiguration.PcieDynamicGating;
233 for (PortIndex = 0; PortIndex < PCH_PCIE_MAX_ROOT_PORTS; PortIndex++) {
234 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].Enable = mSystemConfiguration.IchPciExp[PortIndex];
235 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].SlotImplemented = PCH_DEVICE_ENABLE;
236 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].FunctionNumber = PortIndex;
237 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].PhysicalSlotNumber = PortIndex;
238 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].Aspm = 4;
239 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].PmSci = PCH_DEVICE_DISABLE;
240 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].ExtSync = PCH_DEVICE_DISABLE;
241 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].HotPlug = PCH_DEVICE_DISABLE;
242 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].AdvancedErrorReporting = PCH_DEVICE_DISABLE;
243 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].UnsupportedRequestReport = PCH_DEVICE_DISABLE;
244 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].FatalErrorReport = PCH_DEVICE_DISABLE;
245 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].NoFatalErrorReport = PCH_DEVICE_DISABLE;
246 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].CorrectableErrorReport = PCH_DEVICE_DISABLE;
247 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].PmeInterrupt = 0;
248 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].SystemErrorOnFatalError = PCH_DEVICE_DISABLE;
249 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].SystemErrorOnNonFatalError = PCH_DEVICE_DISABLE;
250 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].SystemErrorOnCorrectableError = PCH_DEVICE_DISABLE;
251 DxePlatformPchPolicy->PciExpressConfig->RootPort[PortIndex].CompletionTimeout = PchPciECompletionTO_Default;
252 }
253
254 //
255 // SATA configuration
256 //
257 for (PortIndex = 0; PortIndex < PCH_AHCI_MAX_PORTS; PortIndex++) {
258 if (mSystemConfiguration.SataType == 0) {
259 DxePlatformPchPolicy->SataConfig->PortSettings[PortIndex].Enable = PCH_DEVICE_ENABLE;
260 DxePlatformPchPolicy->SataConfig->LegacyMode = PCH_DEVICE_ENABLE;
261 } else {
262 DxePlatformPchPolicy->SataConfig->PortSettings[PortIndex].Enable = PCH_DEVICE_ENABLE;
263 DxePlatformPchPolicy->SataConfig->LegacyMode = PCH_DEVICE_DISABLE;
264 }
265 if(mSystemConfiguration.Sata == 1){
266 DxePlatformPchPolicy->SataConfig->PortSettings[PortIndex].Enable = PCH_DEVICE_ENABLE;
267 } else {
268 DxePlatformPchPolicy->SataConfig->PortSettings[PortIndex].Enable = PCH_DEVICE_DISABLE;
269 }
270 if(0 == PortIndex){
271 DxePlatformPchPolicy->SataConfig->PortSettings[PortIndex].HotPlug = PCH_DEVICE_DISABLE;
272 } else if(1 == PortIndex){
273 DxePlatformPchPolicy->SataConfig->PortSettings[PortIndex].HotPlug = PCH_DEVICE_DISABLE;
274 }
275
276 DxePlatformPchPolicy->SataConfig->PortSettings[PortIndex].SpinUp = PCH_DEVICE_DISABLE;
277 DxePlatformPchPolicy->SataConfig->PortSettings[PortIndex].MechSw = PCH_DEVICE_DISABLE;
278 }
279 DxePlatformPchPolicy->SataConfig->RaidAlternateId = PCH_DEVICE_DISABLE;
280 DxePlatformPchPolicy->SataConfig->Raid0 = PCH_DEVICE_ENABLE;
281 DxePlatformPchPolicy->SataConfig->Raid1 = PCH_DEVICE_ENABLE;
282 DxePlatformPchPolicy->SataConfig->Raid10 = PCH_DEVICE_ENABLE;
283 DxePlatformPchPolicy->SataConfig->Raid5 = PCH_DEVICE_ENABLE;
284 DxePlatformPchPolicy->SataConfig->Irrt = PCH_DEVICE_ENABLE;
285 DxePlatformPchPolicy->SataConfig->OromUiBanner = PCH_DEVICE_ENABLE;
286 DxePlatformPchPolicy->SataConfig->HddUnlock = PCH_DEVICE_ENABLE;
287 DxePlatformPchPolicy->SataConfig->LedLocate = PCH_DEVICE_ENABLE;
288 DxePlatformPchPolicy->SataConfig->IrrtOnly = PCH_DEVICE_ENABLE;
289 DxePlatformPchPolicy->SataConfig->SalpSupport = PCH_DEVICE_ENABLE;
290 DxePlatformPchPolicy->SataConfig->TestMode = mSystemConfiguration.SataTestMode;
291
292 //
293 // AzaliaConfig
294 //
295 DxePlatformPchPolicy->AzaliaConfig->Pme = mSystemConfiguration.AzaliaPme;
296 DxePlatformPchPolicy->AzaliaConfig->HdmiCodec = mSystemConfiguration.HdmiCodec;
297 DxePlatformPchPolicy->AzaliaConfig->DS = mSystemConfiguration.AzaliaDs;
298 DxePlatformPchPolicy->AzaliaConfig->AzaliaVCi = mSystemConfiguration.AzaliaVCiEnable;
299
300 //
301 // Set LPSS configuration according to setup value.
302 //
303 DxePlatformPchPolicy->LpssConfig->LpssPciModeEnabled = mSystemConfiguration.LpssPciModeEnabled;
304
305 DxePlatformPchPolicy->LpssConfig->Dma1Enabled = mSystemConfiguration.LpssDma1Enabled;
306 DxePlatformPchPolicy->LpssConfig->I2C0Enabled = mSystemConfiguration.LpssI2C0Enabled;
307 DxePlatformPchPolicy->LpssConfig->I2C1Enabled = mSystemConfiguration.LpssI2C1Enabled;
308 DxePlatformPchPolicy->LpssConfig->I2C2Enabled = mSystemConfiguration.LpssI2C2Enabled;
309 DxePlatformPchPolicy->LpssConfig->I2C3Enabled = mSystemConfiguration.LpssI2C3Enabled;
310 DxePlatformPchPolicy->LpssConfig->I2C4Enabled = mSystemConfiguration.LpssI2C4Enabled;
311 DxePlatformPchPolicy->LpssConfig->I2C5Enabled = mSystemConfiguration.LpssI2C5Enabled;
312 DxePlatformPchPolicy->LpssConfig->I2C6Enabled = mSystemConfiguration.LpssI2C6Enabled;
313
314 DxePlatformPchPolicy->LpssConfig->Dma0Enabled = mSystemConfiguration.LpssDma0Enabled;;
315 DxePlatformPchPolicy->LpssConfig->Pwm0Enabled = mSystemConfiguration.LpssPwm0Enabled;
316 DxePlatformPchPolicy->LpssConfig->Pwm1Enabled = mSystemConfiguration.LpssPwm1Enabled;
317 DxePlatformPchPolicy->LpssConfig->Hsuart0Enabled = mSystemConfiguration.LpssHsuart0Enabled;
318 DxePlatformPchPolicy->LpssConfig->Hsuart1Enabled = mSystemConfiguration.LpssHsuart1Enabled;
319 DxePlatformPchPolicy->LpssConfig->SpiEnabled = mSystemConfiguration.LpssSpiEnabled;
320
321 //
322 // Set SCC configuration according to setup value.
323 //
324 DxePlatformPchPolicy->SccConfig->SdioEnabled = mSystemConfiguration.LpssSdioEnabled;
325 DxePlatformPchPolicy->SccConfig->SdcardEnabled = TRUE;
326 DxePlatformPchPolicy->SccConfig->SdCardSDR25Enabled = mSystemConfiguration.LpssSdCardSDR25Enabled;
327 DxePlatformPchPolicy->SccConfig->SdCardDDR50Enabled = mSystemConfiguration.LpssSdCardDDR50Enabled;
328 DxePlatformPchPolicy->SccConfig->HsiEnabled = mSystemConfiguration.LpssMipiHsi;
329
330 if (mSystemConfiguration.eMMCBootMode== 1) {// Auto detection mode
331 //
332 // Silicon Stepping
333 //
334 switch (PchStepping()) {
335 case PchA0: // A0 and A1
336 case PchA1:
337 DEBUG ((EFI_D_ERROR, "Auto Detect: SOC A0/A1: SCC eMMC 4.41 Configuration\n"));
338 DxePlatformPchPolicy->SccConfig->eMMCEnabled = 1;
339 DxePlatformPchPolicy->SccConfig->eMMC45Enabled = 0;
340 DxePlatformPchPolicy->SccConfig->eMMC45DDR50Enabled = 0;
341 DxePlatformPchPolicy->SccConfig->eMMC45HS200Enabled = 0;
342 DxePlatformPchPolicy->SccConfig->eMMC45RetuneTimerValue = 0;
343 break;
344 case PchB0: // B0 and later
345 default:
346 DEBUG ((EFI_D_ERROR, "Auto Detect: SOC B0 and later: SCC eMMC 4.5 Configuration\n"));
347 DxePlatformPchPolicy->SccConfig->eMMCEnabled = 0;
348 DxePlatformPchPolicy->SccConfig->eMMC45Enabled = mSystemConfiguration.LpsseMMC45Enabled;
349 DxePlatformPchPolicy->SccConfig->eMMC45DDR50Enabled = mSystemConfiguration.LpsseMMC45DDR50Enabled;
350 DxePlatformPchPolicy->SccConfig->eMMC45HS200Enabled = mSystemConfiguration.LpsseMMC45HS200Enabled;
351 DxePlatformPchPolicy->SccConfig->eMMC45RetuneTimerValue = mSystemConfiguration.LpsseMMC45RetuneTimerValue;
352 break;
353 }
354 } else if (mSystemConfiguration.eMMCBootMode == 2) { // eMMC 4.41
355 DEBUG ((EFI_D_ERROR, "Force to SCC eMMC 4.41 Configuration\n"));
356 DxePlatformPchPolicy->SccConfig->eMMCEnabled = 1;
357 DxePlatformPchPolicy->SccConfig->eMMC45Enabled = 0;
358 DxePlatformPchPolicy->SccConfig->eMMC45DDR50Enabled = 0;
359 DxePlatformPchPolicy->SccConfig->eMMC45HS200Enabled = 0;
360 DxePlatformPchPolicy->SccConfig->eMMC45RetuneTimerValue = 0;
361
362 } else if (mSystemConfiguration.eMMCBootMode == 3) { // eMMC 4.5
363 DEBUG ((EFI_D_ERROR, "Force to eMMC 4.5 Configuration\n"));
364 DxePlatformPchPolicy->SccConfig->eMMCEnabled = 0;
365 DxePlatformPchPolicy->SccConfig->eMMC45Enabled = mSystemConfiguration.LpsseMMC45Enabled;
366 DxePlatformPchPolicy->SccConfig->eMMC45DDR50Enabled = mSystemConfiguration.LpsseMMC45DDR50Enabled;
367 DxePlatformPchPolicy->SccConfig->eMMC45HS200Enabled = mSystemConfiguration.LpsseMMC45HS200Enabled;
368 DxePlatformPchPolicy->SccConfig->eMMC45RetuneTimerValue = mSystemConfiguration.LpsseMMC45RetuneTimerValue;
369
370 } else { // Disable eMMC controllers
371 DEBUG ((EFI_D_ERROR, "Disable eMMC controllers\n"));
372 DxePlatformPchPolicy->SccConfig->eMMCEnabled = 0;
373 DxePlatformPchPolicy->SccConfig->eMMC45Enabled = 0;
374 DxePlatformPchPolicy->SccConfig->eMMC45DDR50Enabled = 0;
375 DxePlatformPchPolicy->SccConfig->eMMC45HS200Enabled = 0;
376 DxePlatformPchPolicy->SccConfig->eMMC45RetuneTimerValue = 0;
377 }
378
379 //
380 // Reserved SMBus Address
381 //
382 DxePlatformPchPolicy->SmbusConfig->NumRsvdSmbusAddresses = 4;
383 DxePlatformPchPolicy->SmbusConfig->RsvdSmbusAddressTable = mSmbusRsvdAddresses;
384
385 //
386 // MiscPm Configuration
387 //
388 DxePlatformPchPolicy->MiscPmConfig->WakeConfig.WolEnableOverride = mSystemConfiguration.WakeOnLanS5;
389 DxePlatformPchPolicy->MiscPmConfig->SlpLanLowDc = mSystemConfiguration.SlpLanLowDc;
390 DxePlatformPchPolicy->MiscPmConfig->PowerResetStatusClear.MeWakeSts = PCH_DEVICE_ENABLE;
391 DxePlatformPchPolicy->MiscPmConfig->PowerResetStatusClear.MeHrstColdSts = PCH_DEVICE_ENABLE;
392 DxePlatformPchPolicy->MiscPmConfig->PowerResetStatusClear.MeHrstWarmSts = PCH_DEVICE_ENABLE;
393
394 //
395 // Enable / disable serial IRQ according to setup value.
396 //
397 DxePlatformPchPolicy->SerialIrqConfig->SirqEnable = PCH_DEVICE_ENABLE;
398
399 //
400 // Set Serial IRQ Mode Select according to setup value.
401 //
402 DxePlatformPchPolicy->SerialIrqConfig->SirqMode = PchQuietMode;
403
404 //
405 // Program the default Sub System Vendor Device Id
406 //
407 DxePlatformPchPolicy->DefaultSvidSid->SubSystemVendorId = V_PCH_INTEL_VENDOR_ID;
408 DxePlatformPchPolicy->DefaultSvidSid->SubSystemId = V_PCH_DEFAULT_SID;
409
410 mAzaliaVerbTable[9].VerbTableData = mAzaliaVerbTableData12;
411
412 DxePlatformPchPolicy->AzaliaConfig->AzaliaVerbTableNum = sizeof (mAzaliaVerbTable) / sizeof (PCH_AZALIA_VERB_TABLE);
413 DxePlatformPchPolicy->AzaliaConfig->AzaliaVerbTable = mAzaliaVerbTable;
414 DxePlatformPchPolicy->AzaliaConfig->ResetWaitTimer = 300;
415
416 DxePlatformPchPolicy->IdleReserve = mSystemConfiguration.IdleReserve;
417 DxePlatformPchPolicy->AcpiHWRed = PCH_DEVICE_DISABLE;
418
419 //
420 // Install DxePchPolicyUpdateProtocol
421 //
422 Handle = NULL;
423
424 mDxePchPolicyUpdate.Revision = DXE_PCH_POLICY_UPDATE_PROTOCOL_REVISION_1;
425
426 Status = gBS->InstallMultipleProtocolInterfaces (
427 &Handle,
428 &gDxePchPolicyUpdateProtocolGuid,
429 &mDxePchPolicyUpdate,
430 NULL
431 );
432 ASSERT_EFI_ERROR (Status);
433
434 DEBUG ((EFI_D_INFO, "InitPchPlatformPolicy() - End\n"));
435}
436
437
438DXE_VLV_PLATFORM_POLICY_PROTOCOL mDxePlatformVlvPolicy;
439
440VOID
441InitVlvPlatformPolicy (
442 )
443{
444 DXE_VLV_PLATFORM_POLICY_PROTOCOL *DxePlatformVlvPolicy;
445 EFI_STATUS Status;
446 EFI_HANDLE Handle;
447
448 ZeroMem (&mDxePlatformVlvPolicy, sizeof(DXE_VLV_PLATFORM_POLICY_PROTOCOL));
449
450 DxePlatformVlvPolicy = &mDxePlatformVlvPolicy;
451
452
453 DxePlatformVlvPolicy->GraphicReserve00 = mSystemConfiguration.GraphicReserve00;
454 DxePlatformVlvPolicy->PavpMode = mSystemConfiguration.PavpMode;
455 DxePlatformVlvPolicy->GraphicReserve01 = 1;
456 DxePlatformVlvPolicy->GraphicReserve02 = mSystemConfiguration.GraphicReserve02;
457 DxePlatformVlvPolicy->GraphicReserve03 = 1;
458 DxePlatformVlvPolicy->GraphicReserve04 = 0;
459 DxePlatformVlvPolicy->GraphicReserve05 = mSystemConfiguration.GraphicReserve05;
460 DxePlatformVlvPolicy->IgdPanelFeatures.PFITStatus = mSystemConfiguration.PanelScaling;
461
462 DxePlatformVlvPolicy->IgdPanelFeatures.LidStatus = 1;
463 DxePlatformVlvPolicy->IdleReserve = mSystemConfiguration.IdleReserve;
464
465 DxePlatformVlvPolicy->GraphicReserve06 = 1;
466
467 if ( (mSystemConfiguration.Lpe == 1) || mSystemConfiguration.Lpe == 2) {
468 DxePlatformVlvPolicy ->AudioTypeSupport = LPE_AUDIO ;
469 } else if ( mSystemConfiguration.PchAzalia == 1 ) {
470 DxePlatformVlvPolicy ->AudioTypeSupport = HD_AUDIO;
471 } else {
472 DxePlatformVlvPolicy ->AudioTypeSupport = NO_AUDIO;
473 }
474
475 Handle = NULL;
476 Status = gBS->InstallProtocolInterface (
477 &Handle,
478 &gDxeVlvPlatformPolicyGuid,
479 EFI_NATIVE_INTERFACE,
480 DxePlatformVlvPolicy
481 );
482 ASSERT_EFI_ERROR(Status);
483
484}
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