projects / mirror_edk2.git / blame
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|---|---|---|
| 3cbfba02 DW |
1 | /** @file\r |
| 2 | \r | |
| 3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
| 4 | \r\r | |
| 5 | This program and the accompanying materials are licensed and made available under\r\r | |
| 6 | the terms and conditions of the BSD License that accompanies this distribution. \r\r | |
| 7 | The full text of the license may be found at \r\r | |
| 8 | http://opensource.org/licenses/bsd-license.php. \r\r | |
| 9 | \r\r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r | |
| 12 | \r\r | |
| 13 | \r | |
| 14 | \r | |
| 15 | Module Name:\r | |
| 16 | \r | |
| 17 | Stall.c\r | |
| 18 | \r | |
| 19 | Abstract:\r | |
| 20 | \r | |
| 21 | Produce Stall Ppi.\r | |
| 22 | \r | |
| 23 | --*/\r | |
| 24 | \r | |
| 25 | \r | |
| 26 | #include "CommonHeader.h"\r | |
| 27 | #include "PlatformBaseAddresses.h"\r | |
| 28 | #include "PchRegs.h"\r | |
| 29 | \r | |
| 30 | /**\r | |
| 31 | Waits for at least the given number of microseconds.\r | |
| 32 | \r | |
| 33 | @param PeiServices General purpose services available to every PEIM.\r | |
| 34 | @param This PPI instance structure.\r | |
| 35 | @param Microseconds Desired length of time to wait.\r | |
| 36 | \r | |
| 37 | @retval EFI_SUCCESS If the desired amount of time was passed.\r | |
| 38 | \r | |
| 39 | **/\r | |
| 40 | EFI_STATUS\r | |
| 41 | EFIAPI\r | |
| 42 | Stall (\r | |
| 43 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
| 44 | IN CONST EFI_PEI_STALL_PPI *This,\r | |
| 45 | IN UINTN Microseconds\r | |
| 46 | )\r | |
| 47 | {\r | |
| 48 | UINTN Ticks;\r | |
| 49 | UINTN Counts;\r | |
| 50 | UINT32 CurrentTick;\r | |
| 51 | UINT32 OriginalTick;\r | |
| 52 | UINT32 RemainingTick;\r | |
| 53 | \r | |
| 54 | if (Microseconds == 0) {\r | |
| 55 | return EFI_SUCCESS;\r | |
| 56 | }\r | |
| 57 | \r | |
| 58 | OriginalTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR);\r | |
| 59 | OriginalTick &= (V_PCH_ACPI_PM1_TMR_MAX_VAL - 1);\r | |
| 60 | CurrentTick = OriginalTick;\r | |
| 61 | \r | |
| 62 | //\r | |
| 63 | // The timer frequency is 3.579545MHz, so 1 ms corresponds to 3.58 clocks\r | |
| 64 | //\r | |
| 65 | Ticks = Microseconds * 358 / 100 + OriginalTick + 1;\r | |
| 66 | \r | |
| 67 | //\r | |
| 68 | // The loops needed for timer overflow\r | |
| 69 | //\r | |
| 70 | Counts = (UINTN)RShiftU64((UINT64)Ticks, 24);\r | |
| 71 | \r | |
| 72 | //\r | |
| 73 | // Remaining clocks within one loop\r | |
| 74 | //\r | |
| 75 | RemainingTick = Ticks & 0xFFFFFF;\r | |
| 76 | \r | |
| 77 | //\r | |
| 78 | // Do not intend to use TMROF_STS bit of register PM1_STS, because this add extra\r | |
| 79 | // one I/O operation, and may generate SMI\r | |
| 80 | //\r | |
| 81 | while (Counts != 0) {\r | |
| 82 | CurrentTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR) & B_PCH_ACPI_PM1_TMR_VAL;\r | |
| 83 | if (CurrentTick <= OriginalTick) {\r | |
| 84 | Counts--;\r | |
| 85 | }\r | |
| 86 | OriginalTick = CurrentTick;\r | |
| 87 | }\r | |
| 88 | \r | |
| 89 | while ((RemainingTick > CurrentTick) && (OriginalTick <= CurrentTick)) {\r | |
| 90 | OriginalTick = CurrentTick;\r | |
| 91 | CurrentTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR) & B_PCH_ACPI_PM1_TMR_VAL;\r | |
| 92 | }\r | |
| 93 | \r | |
| 94 | return EFI_SUCCESS;\r | |
| 95 | }\r |