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Vlv2TbltDevicePkg: Use the new PCDs defined in MdePkg and MdeModulePkg.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkg.fdf
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3cbfba02
DW		 1#/** @file
2# FDF file of Platform.
3#
4# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
5#
6# This program and the accompanying materials are licensed and made available under
7# the terms and conditions of the BSD License that accompanies this distribution.
8# The full text of the license may be found at
9# http://opensource.org/licenses/bsd-license.php.
10#
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13#
14#
15#**/
16
17[Defines]
18DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3Mb FLASH Device.
19DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3Mb FLASH Device.
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3Mb FLASH Device.
21DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3Mb FLASH Device.
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23DEFINE FLASH_AREA_SIZE = 0x00800000
24
b9459211
MG		 25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFD00000
3cbfba02 28
b9459211 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00030000
3cbfba02
DW		 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
b9459211 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0006E000
3cbfba02
DW		 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
b9459211 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00070000
3cbfba02
DW		 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39!if $(MINNOW2_FSP_BUILD) == TRUE
b9459211 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
3cbfba02 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
b9459211 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
3cbfba02 43
b9459211 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
3cbfba02 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
b9459211 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
3cbfba02
DW		 47
48!endif
49
a4d42c22 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
b9459211 51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x001A5000
3cbfba02 52
b9459211 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x002A5000
d58cb22f 54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
3cbfba02 55
d58cb22f
SL		 56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002D1000
57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0002F000
3cbfba02
DW		 58
59################################################################################
60#
61# FD Section
62# The [FD] Section is made up of the definition statements and a
63# description of what goes into the Flash Device Image. Each FD section
64# defines one flash "device" image. A flash device image may be one of
65# the following: Removable media bootable image (like a boot floppy
66# image,) an Option ROM image (that would be "flashed" into an add-in
67# card,) a System "Flash" image (that would be burned into a system's
68# flash) or an Update ("Capsule") image that will be used to update and
69# existing system flash.
70#
71################################################################################
72[FD.Vlv]
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
75ErasePolarity = 1
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
78
79#
80#Flash location override based on actual flash map
81#
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
84
85!if $(MINNOW2_FSP_BUILD) == TRUE
86# put below PCD value setting into dsc file
87#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
88#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
89#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
90#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
91#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
92#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
93#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
94
95!endif
96################################################################################
97#
98# Following are lists of FD Region layout which correspond to the locations of different
99# images within the flash device.
100#
101# Regions must be defined in ascending order and may not overlap.
102#
103# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
104# the pipe "|" character, followed by the size of the region, also in hex with the leading
105# "0x" characters. Like:
106# Offset|Size
107# PcdOffsetCName|PcdSizeCName
108# RegionType <FV, DATA, or FILE>
109# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
110#
111################################################################################
b9459211
MG		 112 #
113 # CPU Microcodes
114 #
115
116$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
117gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
118FV = MICROCODE_FV
3cbfba02
DW		 119$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
120gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
121#NV_VARIABLE_STORE
122DATA = {
123 ## This is the EFI_FIRMWARE_VOLUME_HEADER
124 # ZeroVector []
125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
126 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127 # FileSystemGuid: gEfiSystemNvDataFvGuid =
128 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
129 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
130 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
131 # FvLength: 0x80000
132 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
133 #Signature "_FVH" #Attributes
134 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
135 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
136 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,
137 #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block
138 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
139 #Blockmap[1]: End
140 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
141 ## This is the VARIABLE_STORE_HEADER
142!if $(SECURE_BOOT_ENABLE) == TRUE
143 #Signature: gEfiAuthenticatedVariableGuid =
144 # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
145 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
146 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
147!else
148 #Signature: gEfiVariableGuid =
149 # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
150 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
151 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
152!endif
153 #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8
154 # This can speed up the Variable Dispatch a bit.
155 0xB8, 0xDF, 0x03, 0x00,
156 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
157 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
158}
159
160
161$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
162gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
163#NV_FTW_WORKING
164DATA = {
165 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
166 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
167 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
168 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,
169
170 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
171 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,
172 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
173 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
174}
175
176$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
177gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
178
179!if $(MINNOW2_FSP_BUILD) == TRUE
180
181 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
182 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
183 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
184
185
186 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
187 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
188
189!endif
3cbfba02
DW		 190
191 #
192 # Main Block
193 #
194$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
195gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
196FV = FVMAIN_COMPACT
197
198 #
199 # FV Recovery#2
200 #
201$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
202gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
203FV = FVRECOVERY2
204
205 #
206 # FV Recovery
207 #
208$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
209gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
210FV = FVRECOVERY
211
212################################################################################
213#
214# FV Section
215#
216# [FV] section is used to define what components or modules are placed within a flash
217# device file. This section also defines order the components and modules are positioned
218# within the image. The [FV] section consists of define statements, set statements and
219# module statements.
220#
221################################################################################
222[FV.MICROCODE_FV]
223BlockSize = $(FLASH_BLOCK_SIZE)
224FvAlignment = 16
225ERASE_POLARITY = 1
226MEMORY_MAPPED = TRUE
227STICKY_WRITE = TRUE
228LOCK_CAP = TRUE
229LOCK_STATUS = FALSE
230WRITE_DISABLED_CAP = TRUE
231WRITE_ENABLED_CAP = TRUE
232WRITE_STATUS = TRUE
233WRITE_LOCK_CAP = TRUE
234WRITE_LOCK_STATUS = TRUE
235READ_DISABLED_CAP = TRUE
236READ_ENABLED_CAP = TRUE
237READ_STATUS = TRUE
238READ_LOCK_CAP = TRUE
239READ_LOCK_STATUS = TRUE
240
241FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
242 $(OUTPUT_DIRECTORY)\$(TARGET)_$(TOOL_CHAIN_TAG)\$(DXE_ARCHITECTURE)\MicrocodeUpdates.bin
243}
244
245################################################################################
246#
247# FV Section
248#
249# [FV] section is used to define what components or modules are placed within a flash
250# device file. This section also defines order the components and modules are positioned
251# within the image. The [FV] section consists of define statements, set statements and
252# module statements.
253#
254################################################################################
255[FV.FVRECOVERY2]
256BlockSize = $(FLASH_BLOCK_SIZE)
257FvAlignment = 16 #FV alignment and FV attributes setting.
258ERASE_POLARITY = 1
259MEMORY_MAPPED = TRUE
260STICKY_WRITE = TRUE
261LOCK_CAP = TRUE
262LOCK_STATUS = TRUE
263WRITE_DISABLED_CAP = TRUE
264WRITE_ENABLED_CAP = TRUE
265WRITE_STATUS = TRUE
266WRITE_LOCK_CAP = TRUE
267WRITE_LOCK_STATUS = TRUE
268READ_DISABLED_CAP = TRUE
269READ_ENABLED_CAP = TRUE
270READ_STATUS = TRUE
271READ_LOCK_CAP = TRUE
272READ_LOCK_STATUS = TRUE
273FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
274
275
276
277INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
278
279!if $(MINNOW2_FSP_BUILD) == FALSE
280INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
281INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
282INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
283INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
284INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
285INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
286INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
287INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
288INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
289!endif
290
291INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
292!if $(TPM_ENABLED) == TRUE
293INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
294INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
295INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
296!endif
297INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
298
299!if $(ACPI50_ENABLE) == TRUE
300 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
301!endif
302!if $(PERFORMANCE_ENABLE) == TRUE
303INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
304!endif
305
306[FV.FVRECOVERY]
307BlockSize = $(FLASH_BLOCK_SIZE)
308FvAlignment = 16 #FV alignment and FV attributes setting.
309ERASE_POLARITY = 1
310MEMORY_MAPPED = TRUE
311STICKY_WRITE = TRUE
312LOCK_CAP = TRUE
313LOCK_STATUS = TRUE
314WRITE_DISABLED_CAP = TRUE
315WRITE_ENABLED_CAP = TRUE
316WRITE_STATUS = TRUE
317WRITE_LOCK_CAP = TRUE
318WRITE_LOCK_STATUS = TRUE
319READ_DISABLED_CAP = TRUE
320READ_ENABLED_CAP = TRUE
321READ_STATUS = TRUE
322READ_LOCK_CAP = TRUE
323READ_LOCK_STATUS = TRUE
324FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
325
326
327!if $(MINNOW2_FSP_BUILD) == TRUE
328INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
329!else
330INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
331!endif
332
333INF MdeModulePkg/Core/Pei/PeiMain.inf
334!if $(MINNOW2_FSP_BUILD) == TRUE
335INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
336INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
337!endif
338INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
339INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
340!if $(SECURE_BOOT_ENABLE) == TRUE
341INF SecurityPkg/VariableAuthenticated/Pei/VariablePei.inf
342!else
343INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
344!endif
345
346INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
347
348!if $(MINNOW2_FSP_BUILD) == FALSE
349INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
350!endif
351
352!if $(SOURCE_DEBUG_ENABLE) == TRUE
353 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
354!endif
355
356
357!if $(CAPSULE_ENABLE) == TRUE
358INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
359INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
360!endif
361
362!if $(MINNOW2_FSP_BUILD) == FALSE
363!if $(PCIESC_ENABLE) == TRUE
364INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
365!endif
366INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
367!endif
368
369INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
370
371[FV.FVMAIN]
372BlockSize = $(FLASH_BLOCK_SIZE)
373FvAlignment = 16
374ERASE_POLARITY = 1
375MEMORY_MAPPED = TRUE
376STICKY_WRITE = TRUE
377LOCK_CAP = TRUE
378LOCK_STATUS = TRUE
379WRITE_DISABLED_CAP = TRUE
380WRITE_ENABLED_CAP = TRUE
381WRITE_STATUS = TRUE
382WRITE_LOCK_CAP = TRUE
383WRITE_LOCK_STATUS = TRUE
384READ_DISABLED_CAP = TRUE
385READ_ENABLED_CAP = TRUE
386READ_STATUS = TRUE
387READ_LOCK_CAP = TRUE
388READ_LOCK_STATUS = TRUE
389FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
390
391APRIORI DXE {
392 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
393 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
394 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
395 }
396
397FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
398 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
399 }
400
401 #
402 # EDK II Related Platform codes
403 #
404
405 !if $(MINNOW2_FSP_BUILD) == TRUE
406 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
407 !endif
408
409INF MdeModulePkg/Core/Dxe/DxeMain.inf
410INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
411!if $(ACPI50_ENABLE) == TRUE
412INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
413INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
414!endif
415
416
417INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
418INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
419INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
420INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
421INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
422INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
423INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
424INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
425INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
426INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
427INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
428INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
429INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
430
431!if $(SECURE_BOOT_ENABLE)
432INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmmRuntimeDxe.inf
433INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmm.inf
434INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
435INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
436INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
437INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
438!else
439INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
440INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
441INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
442INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
443INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
444!endif
445
446INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
447
448INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
449INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
450INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
451INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
452
453
454INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
455
456!if $(DATAHUB_ENABLE) == TRUE
457INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
458!endif
459INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
460INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
461
462INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
463
464 #
465 # EDK II Related Silicon codes
466 #
467INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
468
469!if $(USE_HPET_TIMER) == TRUE
470INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
471!else
472INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
473!endif
474INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
475
476INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
477
478INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
479INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
480
481!if $(MINNOW2_FSP_BUILD) == FALSE
482INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
483!endif
484INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
485!if $(PCIESC_ENABLE) == TRUE
486INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
487!endif
488
489INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
490INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
491INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
492INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
493INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
494!if $(MINNOW2_FSP_BUILD) == FALSE
495INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
496!else
497INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
498INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
499!endif
500!if $(TPM_ENABLED) == TRUE
501INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
502INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
503INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
504!endif
505
506#
507# EDK II Related Platform codes
508#
509INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
510INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
511INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
512INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
513INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
514INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
515INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
516INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
517INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
518!if $(GOP_DRIVER_ENABLE) == TRUE
519 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
520 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
521 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
522 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
523 SECTION UI = "IntelGopDriver"
524}
525!endif
526
527INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
528 #
529 # SMM
530 #
531INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
532INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
533INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
534
535INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
536INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
537INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
538INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
539INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
540# INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
541 #
542 # ACPI
543 #
544INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
545INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
546INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
547INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
548
549INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
550
551INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
552
553 #
554 # PCI
555 #
556INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
557
558INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
559
560
561#
562# ISA
563#
564INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
565INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
566INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
567!if $(SOURCE_DEBUG_ENABLE) != TRUE
568INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
569!endif
1b354b08
TH		 570#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
571#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
3cbfba02
DW		 572
573#
574# SDIO
575#
576INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
577INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
578#
579# IDE/SCSI/AHCI
580#
581INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
582
583INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
584
585INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
586!if $(SATA_ENABLE) == TRUE
587INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
588#
589
590#
591INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
592INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
593!if $(SCSI_ENABLE) == TRUE
594INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
595INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
596!endif
597#
598!endif
599# Console
600#
601INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
c7d161de 602INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
3cbfba02
DW		 603INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
604INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
605INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
606INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
607INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
608INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
609 #
610 # USB
611 #
612!if $(USB_ENABLE) == TRUE
613INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
614INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
615INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
616INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
617INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
618INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
619INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
620!endif
621
622 #
623 # ECP
624 #
625INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
626INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
627INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
628INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
629INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
630INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
631 #
632 # SMBIOS
633 #
634INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
635INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
636
637INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
638
639 #
640 # Legacy Modules
641 #
642INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
643
644#
645# FAT file system
646#
647FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
648 SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(EDK_DXE_ARCHITECTURE)/Fat.efi
649 }
650#
651# UEFI Shell
652#
653FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
a4d42c22
TH		 654# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
655 SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
3cbfba02
DW		 656 }
657
658
659
660!if $(GOP_DRIVER_ENABLE) == TRUE
661FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
662 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
663 SECTION UI = "IntelGopVbt"
664}
665!endif
666
667#
668# Network Modules
669#
670!if $(NETWORK_ENABLE) == TRUE
671 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
672 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
673 SECTION UI = "UNDI"
674 }
675 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
676 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
677 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
678 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
679 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
680 INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
681 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
682 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
683 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
684 !if $(NETWORK_IP6_ENABLE) == TRUE
685 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
686 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
687 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
688 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
689 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
690 !endif
691 !if $(NETWORK_IP6_ENABLE) == TRUE
692 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
693 INF NetworkPkg/TcpDxe/TcpDxe.inf
694 !else
695 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
696 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
697 !endif
698 !if $(NETWORK_VLAN_ENABLE) == TRUE
699 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
700 !endif
701 !if $(NETWORK_ISCSI_ENABLE) == TRUE
702 !if $(NETWORK_IP6_ENABLE) == TRUE
703 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
704 !else
705 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
706 !endif
707 !endif
708!endif
709
710[FV.FVMAIN_COMPACT]
711BlockSize = $(FLASH_BLOCK_SIZE)
712FvAlignment = 16
713ERASE_POLARITY = 1
714MEMORY_MAPPED = TRUE
715STICKY_WRITE = TRUE
716LOCK_CAP = TRUE
717LOCK_STATUS = TRUE
718WRITE_DISABLED_CAP = TRUE
719WRITE_ENABLED_CAP = TRUE
720WRITE_STATUS = TRUE
721WRITE_LOCK_CAP = TRUE
722WRITE_LOCK_STATUS = TRUE
723READ_DISABLED_CAP = TRUE
724READ_ENABLED_CAP = TRUE
725READ_STATUS = TRUE
726READ_LOCK_CAP = TRUE
727READ_LOCK_STATUS = TRUE
728
729
730
731FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
732!if $(LZMA_ENABLE) == TRUE
733# LZMA Compress
734 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
735 SECTION FV_IMAGE = FVMAIN
736 }
737!else
738!if $(DXE_COMPRESS_ENABLE) == TRUE
739# Tiano Compress
740 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
741 SECTION FV_IMAGE = FVMAIN
742 }
743!else
744# No Compress
745 SECTION COMPRESS PI_NONE {
746 SECTION FV_IMAGE = FVMAIN
747 }
748!endif
749!endif
750 }
751
752[FV.SETUP_DATA]
753BlockSize = $(FLASH_BLOCK_SIZE)
754#NumBlocks = 0x10
755FvAlignment = 16
756ERASE_POLARITY = 1
757MEMORY_MAPPED = TRUE
758STICKY_WRITE = TRUE
759LOCK_CAP = TRUE
760LOCK_STATUS = TRUE
761WRITE_DISABLED_CAP = TRUE
762WRITE_ENABLED_CAP = TRUE
763WRITE_STATUS = TRUE
764WRITE_LOCK_CAP = TRUE
765WRITE_LOCK_STATUS = TRUE
766READ_DISABLED_CAP = TRUE
767READ_ENABLED_CAP = TRUE
768READ_STATUS = TRUE
769READ_LOCK_CAP = TRUE
770READ_LOCK_STATUS = TRUE
771
772
773[FV.Update_Data]
774BlockSize = $(FLASH_BLOCK_SIZE)
775FvAlignment = 16
776ERASE_POLARITY = 1
777MEMORY_MAPPED = TRUE
778STICKY_WRITE = TRUE
779LOCK_CAP = TRUE
780LOCK_STATUS = TRUE
781WRITE_DISABLED_CAP = TRUE
782WRITE_ENABLED_CAP = TRUE
783WRITE_STATUS = TRUE
784WRITE_LOCK_CAP = TRUE
785WRITE_LOCK_STATUS = TRUE
786READ_DISABLED_CAP = TRUE
787READ_ENABLED_CAP = TRUE
788READ_STATUS = TRUE
789READ_LOCK_CAP = TRUE
790READ_LOCK_STATUS = TRUE
791
792FILE RAW = 88888888-8888-8888-8888-888888888888 {
793 FD = Vlv
794 }
795
796[FV.BiosUpdateCargo]
797BlockSize = $(FLASH_BLOCK_SIZE)
798FvAlignment = 16
799ERASE_POLARITY = 1
800MEMORY_MAPPED = TRUE
801STICKY_WRITE = TRUE
802LOCK_CAP = TRUE
803LOCK_STATUS = TRUE
804WRITE_DISABLED_CAP = TRUE
805WRITE_ENABLED_CAP = TRUE
806WRITE_STATUS = TRUE
807WRITE_LOCK_CAP = TRUE
808WRITE_LOCK_STATUS = TRUE
809READ_DISABLED_CAP = TRUE
810READ_ENABLED_CAP = TRUE
811READ_STATUS = TRUE
812READ_LOCK_CAP = TRUE
813READ_LOCK_STATUS = TRUE
814
815
816
817[FV.BiosUpdate]
818BlockSize = $(FLASH_BLOCK_SIZE)
819FvAlignment = 16
820ERASE_POLARITY = 1
821MEMORY_MAPPED = TRUE
822STICKY_WRITE = TRUE
823LOCK_CAP = TRUE
824LOCK_STATUS = TRUE
825WRITE_DISABLED_CAP = TRUE
826WRITE_ENABLED_CAP = TRUE
827WRITE_STATUS = TRUE
828WRITE_LOCK_CAP = TRUE
829WRITE_LOCK_STATUS = TRUE
830READ_DISABLED_CAP = TRUE
831READ_ENABLED_CAP = TRUE
832READ_STATUS = TRUE
833READ_LOCK_CAP = TRUE
834READ_LOCK_STATUS = TRUE
835
836[Capsule.Capsule_Boot]
837#
838# gEfiCapsuleGuid supported by platform
839# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
840#
841CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
842CAPSULE_FLAGS = PersistAcrossReset
843CAPSULE_HEADER_SIZE = 0x20
844
845FV = BiosUpdate
846
847[Capsule.Capsule_Reset]
848#
849# gEfiCapsuleGuid supported by platform
850# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
851#
852CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
853CAPSULE_FLAGS = PersistAcrossReset
854CAPSULE_HEADER_SIZE = 0x20
855
856FV = BiosUpdate
857
858################################################################################
859#
860# Rules are use with the [FV] section's module INF type to define
861# how an FFS file is created for a given INF file. The following Rule are the default
862# rules for the different module type. User can add the customized rules to define the
863# content of the FFS file.
864#
865################################################################################
866[Rule.Common.SEC]
867 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
868 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
869 RAW BIN Align = 16 |.com
870 }
871
872[Rule.Common.SEC.BINARY]
873 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
874 PE32 PE32 Align = 8 |.efi
875 RAW BIN Align = 16 |.com
876 }
877
878[Rule.Common.PEI_CORE]
879 FILE PEI_CORE = $(NAMED_GUID) {
880 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
881 UI STRING="$(MODULE_NAME)" Optional
882 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
883 }
884
885[Rule.Common.PEIM]
886 FILE PEIM = $(NAMED_GUID) {
887 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
888 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
889 UI STRING="$(MODULE_NAME)" Optional
890 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
891 }
892
893[Rule.Common.PEIM.BINARY]
894 FILE PEIM = $(NAMED_GUID) {
895 PEI_DEPEX PEI_DEPEX Optional |.depex
896 PE32 PE32 Align = Auto |.efi
897 UI STRING="$(MODULE_NAME)" Optional
898 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
899 }
900
901[Rule.Common.PEIM.BIOSID]
902 FILE PEIM = $(NAMED_GUID) {
903 RAW BIN BiosId.bin
904 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
905 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
906 UI STRING="$(MODULE_NAME)" Optional
907 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
908 }
909
910[Rule.Common.USER_DEFINED.APINIT]
911 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
912 RAW SEC_BIN |.com
913 }
914#cjia 2011-07-21
915[Rule.Common.USER_DEFINED.LEGACY16]
916 FILE FREEFORM = $(NAMED_GUID) {
917 UI STRING="$(MODULE_NAME)" Optional
918 RAW BIN |.bin
919 }
920#cjia
921
922[Rule.Common.USER_DEFINED.ASM16]
923 FILE FREEFORM = $(NAMED_GUID) {
924 UI STRING="$(MODULE_NAME)" Optional
925 RAW BIN |.com
926 }
927
928[Rule.Common.DXE_CORE]
929 FILE DXE_CORE = $(NAMED_GUID) {
930 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
931 UI STRING="$(MODULE_NAME)" Optional
932 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
933 }
934
935[Rule.Common.UEFI_DRIVER]
936 FILE DRIVER = $(NAMED_GUID) {
937 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
938 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
939 UI STRING="$(MODULE_NAME)" Optional
940 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
941 }
942
943[Rule.Common.UEFI_DRIVER.BINARY]
944 FILE DRIVER = $(NAMED_GUID) {
945 DXE_DEPEX DXE_DEPEX Optional |.depex
946 PE32 PE32 |.efi
947 UI STRING="$(MODULE_NAME)" Optional
948 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
949 }
950
951[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
952 FILE DRIVER = $(NAMED_GUID) {
953 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
954 PE32 PE32 |.efi
955 UI STRING="$(MODULE_NAME)" Optional
956 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
957 }
958
959[Rule.Common.DXE_DRIVER]
960 FILE DRIVER = $(NAMED_GUID) {
961 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
962 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
963 UI STRING="$(MODULE_NAME)" Optional
964 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
965 }
966
967[Rule.Common.DXE_DRIVER.BINARY]
968 FILE DRIVER = $(NAMED_GUID) {
969 DXE_DEPEX DXE_DEPEX Optional |.depex
970 PE32 PE32 |.efi
971 UI STRING="$(MODULE_NAME)" Optional
972 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
973 }
974
975[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
976 FILE DRIVER = $(NAMED_GUID) {
977 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
978 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
979 UI STRING="$(MODULE_NAME)" Optional
980 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
981 RAW ACPI Optional |.acpi
982 RAW ASL Optional |.aml
983 }
984
985[Rule.Common.DXE_RUNTIME_DRIVER]
986 FILE DRIVER = $(NAMED_GUID) {
987 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
988 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
989 UI STRING="$(MODULE_NAME)" Optional
990 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
991 }
992
993[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
994 FILE DRIVER = $(NAMED_GUID) {
995 DXE_DEPEX DXE_DEPEX Optional |.depex
996 PE32 PE32 |.efi
997 UI STRING="$(MODULE_NAME)" Optional
998 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
999 }
1000
1001[Rule.Common.DXE_SMM_DRIVER]
1002 FILE SMM = $(NAMED_GUID) {
1003 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1004 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1005 UI STRING="$(MODULE_NAME)" Optional
1006 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1007 }
1008
1009[Rule.Common.DXE_SMM_DRIVER.BINARY]
1010 FILE SMM = $(NAMED_GUID) {
1011 SMM_DEPEX SMM_DEPEX |.depex
1012 PE32 PE32 |.efi
1013 UI STRING="$(MODULE_NAME)" Optional
1014 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1015 }
1016
1017[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
1018 FILE SMM = $(NAMED_GUID) {
1019 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1020 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1021 UI STRING="$(MODULE_NAME)" Optional
1022 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1023 RAW ACPI Optional |.acpi
1024 RAW ASL Optional |.aml
1025 }
1026
1027[Rule.Common.SMM_CORE]
1028 FILE SMM_CORE = $(NAMED_GUID) {
1029 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1030 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1031 UI STRING="$(MODULE_NAME)" Optional
1032 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1033 }
1034
1035[Rule.Common.SMM_CORE.BINARY]
1036 FILE SMM_CORE = $(NAMED_GUID) {
1037 DXE_DEPEX DXE_DEPEX Optional |.depex
1038 PE32 PE32 |.efi
1039 UI STRING="$(MODULE_NAME)" Optional
1040 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1041 }
1042
1043[Rule.Common.UEFI_APPLICATION]
1044 FILE APPLICATION = $(NAMED_GUID) {
1045 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1046 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1047 UI STRING="$(MODULE_NAME)" Optional
1048 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1049 }
1050
1051[Rule.Common.UEFI_APPLICATION.UI]
1052 FILE APPLICATION = $(NAMED_GUID) {
1053 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1054 UI STRING="Enter Setup"
1055 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1056 }
1057
1058[Rule.Common.USER_DEFINED]
1059 FILE FREEFORM = $(NAMED_GUID) {
1060 UI STRING="$(MODULE_NAME)" Optional
1061 RAW BIN |.bin
1062 }
1063
1064[Rule.Common.USER_DEFINED.ACPITABLE]
1065 FILE FREEFORM = $(NAMED_GUID) {
1066 RAW ACPI Optional |.acpi
1067 RAW ASL Optional |.aml
1068 }
1069
1070[Rule.Common.USER_DEFINED.ACPITABLE2]
1071 FILE FREEFORM = $(NAMED_GUID) {
1072 RAW ASL Optional |.aml
1073 }
1074
1075[Rule.Common.ACPITABLE]
1076 FILE FREEFORM = $(NAMED_GUID) {
1077 RAW ACPI Optional |.acpi
1078 RAW ASL Optional |.aml
1079 }
1080
EFI Development Kit II mirror for PVE