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ArmPkg: Convert whole-cache InvalidateInstructionCache to just ASSERT
[mirror_edk2.git] / ArmPkg / Library / ArmCacheMaintenanceLib / ArmCacheMaintenanceLib.c
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1/** @file\r
2\r
3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
4 Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
5\r
6 This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15#include <Base.h>\r
16#include <Library/ArmLib.h>\r
17#include <Library/DebugLib.h>\r
18#include <Library/PcdLib.h>\r
19\r
20VOID\r
21CacheRangeOperation (\r
22 IN VOID *Start,\r
23 IN UINTN Length,\r
24 IN LINE_OPERATION LineOperation\r
25 )\r
26{\r
27 UINTN ArmCacheLineLength = ArmDataCacheLineLength();\r
28 UINTN ArmCacheLineAlignmentMask = ArmCacheLineLength - 1;\r
29\r
30 // Align address (rounding down)\r
31 UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
32 UINTN EndAddress = (UINTN)Start + Length;\r
33\r
34 // Perform the line operation on an address in each cache line\r
35 while (AlignedAddress < EndAddress) {\r
36 LineOperation(AlignedAddress);\r
37 AlignedAddress += ArmCacheLineLength;\r
38 }\r
39 ArmDataSynchronizationBarrier ();\r
40}\r
41\r
42VOID\r
43EFIAPI\r
44InvalidateInstructionCache (\r
45 VOID\r
46 )\r
47{\r
48 ASSERT (FALSE);\r
49}\r
50\r
51VOID\r
52EFIAPI\r
53InvalidateDataCache (\r
54 VOID\r
55 )\r
56{\r
57 ASSERT (FALSE);\r
58}\r
59\r
60VOID *\r
61EFIAPI\r
62InvalidateInstructionCacheRange (\r
63 IN VOID *Address,\r
64 IN UINTN Length\r
65 )\r
66{\r
67 CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryByMVA);\r
68 ArmInvalidateInstructionCache ();\r
69 return Address;\r
70}\r
71\r
72VOID\r
73EFIAPI\r
74WriteBackInvalidateDataCache (\r
75 VOID\r
76 )\r
77{\r
78 ASSERT (FALSE);\r
79}\r
80\r
81VOID *\r
82EFIAPI\r
83WriteBackInvalidateDataCacheRange (\r
84 IN VOID *Address,\r
85 IN UINTN Length\r
86 )\r
87{\r
88 CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA);\r
89 return Address;\r
90}\r
91\r
92VOID\r
93EFIAPI\r
94WriteBackDataCache (\r
95 VOID\r
96 )\r
97{\r
98 ASSERT (FALSE);\r
99}\r
100\r
101VOID *\r
102EFIAPI\r
103WriteBackDataCacheRange (\r
104 IN VOID *Address,\r
105 IN UINTN Length\r
106 )\r
107{\r
108 CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA);\r
109 return Address;\r
110}\r
111\r
112VOID *\r
113EFIAPI\r
114InvalidateDataCacheRange (\r
115 IN VOID *Address,\r
116 IN UINTN Length\r
117 )\r
118{\r
119 CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA);\r
120 return Address;\r
121}\r