ArmPkg/ArmLib: add ArmHasGicSystemRegisters () helper function

[mirror_edk2.git] / ArmPkg / Library / ArmLib / AArch64 / AArch64Lib.c

/** @file\r
\r
  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
  Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
  Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <Base.h>\r
\r
#include <Library/ArmLib.h>\r
#include <Library/DebugLib.h>\r
\r
#include <Chipset/AArch64.h>\r
\r
#include "AArch64Lib.h"\r
#include "ArmLibPrivate.h"\r
\r
VOID\r
AArch64DataCacheOperation (\r
  IN  AARCH64_CACHE_OPERATION  DataCacheOperation\r
  )\r
{\r
  UINTN     SavedInterruptState;\r
\r
  SavedInterruptState = ArmGetInterruptState ();\r
  ArmDisableInterrupts();\r
\r
  AArch64AllDataCachesOperation (DataCacheOperation);\r
\r
  ArmDataSynchronizationBarrier ();\r
\r
  if (SavedInterruptState) {\r
    ArmEnableInterrupts ();\r
  }\r
}\r
\r
VOID\r
EFIAPI\r
ArmInvalidateDataCache (\r
  VOID\r
  )\r
{\r
  ASSERT (!ArmMmuEnabled ());\r
\r
  ArmDataSynchronizationBarrier ();\r
  AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);\r
}\r
\r
VOID\r
EFIAPI\r
ArmCleanInvalidateDataCache (\r
  VOID\r
  )\r
{\r
  ASSERT (!ArmMmuEnabled ());\r
\r
  ArmDataSynchronizationBarrier ();\r
  AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);\r
}\r
\r
VOID\r
EFIAPI\r
ArmCleanDataCache (\r
  VOID\r
  )\r
{\r
  ASSERT (!ArmMmuEnabled ());\r
\r
  ArmDataSynchronizationBarrier ();\r
  AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);\r
}\r
\r
/**\r
  Check whether the CPU supports the GIC system register interface (any version)\r
\r
  @return   Whether GIC System Register Interface is supported\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
ArmHasGicSystemRegisters (\r
  VOID\r
  )\r
{\r
  return ((ArmReadIdPfr0 () & AARCH64_PFR0_GIC) != 0);\r
}\r