| | 1 | //\r |
| | 2 | // Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r |
| | 3 | // \r |
| | 4 | // This program and the accompanying materials \r |
| | 5 | // are licensed and made available under the terms and conditions of the BSD License \r |
| | 6 | // which accompanies this distribution. The full text of the license may be found at \r |
| | 7 | // http://opensource.org/licenses/bsd-license.php \r |
| | 8 | //\r |
| | 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
| | 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
| | 11 | //\r |
| | 12 | //\r |
| | 13 | \r |
| | 14 | #include <AsmMacroIoLib.h>\r |
| | 15 | #include <Base.h>\r |
| | 16 | #include <Library/PcdLib.h>\r |
| | 17 | #include <AutoGen.h>\r |
| | 18 | \r |
| | 19 | .text\r |
| | 20 | .align 3\r |
| | 21 | \r |
| | 22 | GCC_ASM_IMPORT(CEntryPoint)\r |
| | 23 | GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r |
| | 24 | GCC_ASM_IMPORT(ArmReadMpidr)\r |
| | 25 | GCC_ASM_EXPORT(_ModuleEntryPoint)\r |
| | 26 | \r |
| | 27 | StartupAddr: .word CEntryPoint\r |
| | 28 | \r |
| | 29 | ASM_PFX(_ModuleEntryPoint):\r |
| | 30 | // Identify CPU ID\r |
| | 31 | bl ASM_PFX(ArmReadMpidr)\r |
| | 32 | // Keep a copy of the MpId register value\r |
| | 33 | mov r5, r0\r |
| | 34 | \r |
| | 35 | // Is it the Primary Core ?\r |
| | 36 | bl ASM_PFX(ArmPlatformIsPrimaryCore)\r |
| | 37 | \r |
| | 38 | // Get the top of the primary stacks (and the base of the secondary stacks)\r |
| | 39 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r |
| | 40 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r |
| | 41 | add r1, r1, r2\r |
| | 42 | \r |
| | 43 | // r0 is equal to 1 if I am the primary core\r |
| | 44 | cmp r0, #1\r |
| | 45 | beq _SetupPrimaryCoreStack\r |
| | 46 | \r |
| | 47 | _SetupSecondaryCoreStack:\r |
| | 48 | // r1 contains the base of the secondary stacks\r |
| | 49 | \r |
| | 50 | // Get the Core Position (ClusterId * 4) + CoreId\r |
| | 51 | GetCorePositionFromMpId(r0, r5, r2)\r |
| | 52 | // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r |
| | 53 | add r0, r0, #1\r |
| | 54 | \r |
| | 55 | // StackOffset = CorePos * StackSize\r |
| | 56 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r |
| | 57 | mul r0, r0, r2\r |
| | 58 | // SP = StackBase + StackOffset\r |
| | 59 | add sp, r1, r0\r |
| | 60 | \r |
| | 61 | _PrepareArguments:\r |
| | 62 | // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r |
| | 63 | LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r |
| | 64 | add r2, r2, #4\r |
| | 65 | ldr r1, [r2]\r |
| | 66 | \r |
| | 67 | // Move sec startup address into a data register\r |
| | 68 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r |
| | 69 | ldr r3, StartupAddr\r |
| | 70 | \r |
| | 71 | // Jump to PrePeiCore C code\r |
| | 72 | // r0 = mp_id\r |
| | 73 | // r1 = pei_core_address\r |
| | 74 | mov r0, r5\r |
| | 75 | blx r3\r |
| | 76 | \r |
| | 77 | _SetupPrimaryCoreStack:\r |
| | 78 | // r1 contains the top of the primary stack\r |
| | 79 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r |
| | 80 | \r |
| | 81 | // The reserved space for global variable must be 8-bytes aligned for pushing\r |
| | 82 | // 64-bit variable on the stack\r |
| | 83 | SetPrimaryStack (r1, r2, r3)\r |
| | 84 | b _PrepareArguments\r |
| | 85 | \r |
| | 86 | _NeverReturn:\r |
| | 87 | b _NeverReturn\r |
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