| | 1 | //\r |
| | 2 | // Copyright (c) 2011, ARM Limited. All rights reserved.\r |
| | 3 | // \r |
| | 4 | // This program and the accompanying materials \r |
| | 5 | // are licensed and made available under the terms and conditions of the BSD License \r |
| | 6 | // which accompanies this distribution. The full text of the license may be found at \r |
| | 7 | // http://opensource.org/licenses/bsd-license.php \r |
| | 8 | //\r |
| | 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
| | 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
| | 11 | //\r |
| | 12 | //\r |
| | 13 | \r |
| | 14 | EXPORT monitor_vector_table\r |
| | 15 | EXPORT return_from_exception\r |
| | 16 | EXPORT enter_monitor_mode\r |
| | 17 | EXPORT copy_cpsr_into_spsr\r |
| | 18 | EXPORT set_non_secure_mode\r |
| | 19 | \r |
| | 20 | AREA Helper, CODE, READONLY\r |
| | 21 | \r |
| | 22 | ALIGN 32\r |
| | 23 | monitor_vector_table\r |
| | 24 | ldr pc, dead\r |
| | 25 | ldr pc, dead\r |
| | 26 | ldr pc, dead\r |
| | 27 | ldr pc, dead\r |
| | 28 | ldr pc, dead\r |
| | 29 | ldr pc, dead\r |
| | 30 | ldr pc, dead\r |
| | 31 | ldr pc, dead\r |
| | 32 | \r |
| | 33 | // arg0: Secure Monitor mode stack\r |
| | 34 | enter_monitor_mode\r |
| | 35 | mov r2, lr // Save current lr\r |
| | 36 | \r |
| | 37 | mrs r1, cpsr // Save current mode (SVC) in r1\r |
| | 38 | bic r3, r1, #0x1f // Clear all mode bits\r |
| | 39 | orr r3, r3, #0x16 // Set bits for Monitor mode\r |
| | 40 | msr cpsr_cxsf, r3 // We are now in Monitor Mode\r |
| | 41 | \r |
| | 42 | mov sp, r0 // Use the passed sp\r |
| | 43 | mov lr, r2 // Use the same lr as before\r |
| | 44 | \r |
| | 45 | msr spsr_cxsf, r1 // Use saved mode for the MOVS jump to the kernel\r |
| | 46 | bx lr\r |
| | 47 | \r |
| | 48 | // We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.\r |
| | 49 | // When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into\r |
| | 50 | // 'pc'; we will not change the CPSR flag and it will crash.\r |
| | 51 | // The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.\r |
| | 52 | return_from_exception\r |
| | 53 | adr lr, returned_exception\r |
| | 54 | movs pc, lr\r |
| | 55 | returned_exception // We are now in non-secure state\r |
| | 56 | bx r0\r |
| | 57 | \r |
| | 58 | // Save the current Program Status Register (PSR) into the Saved PSR\r |
| | 59 | copy_cpsr_into_spsr\r |
| | 60 | mrs r0, cpsr\r |
| | 61 | msr spsr_cxsf, r0\r |
| | 62 | bx lr\r |
| | 63 | \r |
| | 64 | // Set the Non Secure Mode\r |
| | 65 | set_non_secure_mode\r |
| | 66 | push { r1 }\r |
| | 67 | and r0, r0, #0x1f // Keep only the mode bits\r |
| | 68 | mrs r1, spsr // Read the spsr\r |
| | 69 | bic r1, r1, #0x1f // Clear all mode bits\r |
| | 70 | orr r1, r1, r0\r |
| | 71 | msr spsr_cxsf, r1 // write back spsr (may have caused a mode switch)\r |
| | 72 | isb\r |
| | 73 | pop { r1 }\r |
| | 74 | bx lr // return (hopefully thumb-safe!)\r |
| | 75 | \r |
| | 76 | dead\r |
| | 77 | B dead\r |
| | 78 | \r |
| | 79 | END\r |
projects / mirror_edk2.git / blame_incremental